CN100442450C - Method for washing back etching in integrated circuit production - Google Patents
Method for washing back etching in integrated circuit production Download PDFInfo
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- CN100442450C CN100442450C CNB200510111385XA CN200510111385A CN100442450C CN 100442450 C CN100442450 C CN 100442450C CN B200510111385X A CNB200510111385X A CN B200510111385XA CN 200510111385 A CN200510111385 A CN 200510111385A CN 100442450 C CN100442450 C CN 100442450C
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Abstract
A kind of method for manufacturing the interlay of semiconductor, including that provides that has the upper surface, back surface and the semiconductor wafer that encloses the edge area of the outer circumference of the semiconductor wafer. In the preferred choosing instances, the upper surface is normally used to fabricate the integrate circuit component itself. The method includes to make the semiconductor wafer bear one or more technology procedures so as to make one or more material film on the back surface, to install semiconductor wafer so that to expose the back surface, to turn the semiconductor wafer in a way of circle. In a particular execution instance, the method includes the acid solution that contains the fluorin ingredient, nitric acid ingredient, surfactant ingredient and organic acid ingredient that is supplied at least on the surface of the back when the semiconductor wafer turns. The method brings to eliminate one or more contamination from the back surface, whereas some of the central area of the back surface will be still exposed when the semiconductor wafer turns in a way of circle.
Description
Technical field
Relate generally to integrated circuit of the present invention and the integrated circuit processing method of making semiconductor device.More specifically, the invention provides a kind of method and apparatus that adopts the manufacturing Semiconductor substrate of back cleaning, but will be appreciated that the present invention has wideer range of application.
Background technology
Integrated circuit develops into millions of devices from the minority interconnect devices that single silicon wafer prepares.The tradition performance that provides of integrated circuit and complexity head and shoulders above initial anticipation.In order to obtain progressively aspect complexity and the current densities (that is, on given chip area can packaged device number), the characteristic size of minimum device (device that is otherwise known as " geometric figure ") follows each to become littler for development of integrated circuits.
The current densities of Zeng Jiaing has not only been improved the complexity and the performance of integrated circuit day by day, but also the parts of lower cost are provided for the consumer.Integrated circuit or chip manufacturing equipment may be worth several hundred million, perhaps even several hundred billion dollars.Every manufacturing equipment has certain wafer throughput, and has the integrated circuit of some on each wafer.Therefore, diminish, can on each wafer, make more device, therefore the output that has increased manufacturing equipment by the individual devices that makes integrated circuit.It is very challenging making devices get smaller, because each technology that is used in the integrated manufacturing has the limit.In other words, given technology typically can only be reduced to certain characteristic size, and needs to change technology or device layout afterwards.In addition, although device needs more and more faster design, there is manufacturing limit in some traditional handicrafts and the material.
An example that has the technology of the limit based on given characteristic size is: in the manufacturing of integrated circuit to the cleaning of back surfaces of the wafer of processing.These back surfaces are contaminated along with the processing of the upper surface that is used for integrated circuit (IC)-components itself usually.Back surfaces becomes the source of the particle that causes particular device component failure or other limitation and/or less silicon fragment usually.By this specification particularly hereinafter, can find these and other limitation of traditional MOS transistor.
Can see a kind of improved technology that is used for the processing semiconductor device that needs from above content.
Summary of the invention
According to the present invention, provide the technology of processing the integrated circuit of the manufacturing that is used for semiconductor device.More specifically, the invention provides a kind of method and apparatus that adopts the manufacturing Semiconductor substrate of back cleaning, but will be appreciated that the present invention has wideer range of application.
In a particular embodiment, the invention provides a kind of Semiconductor substrate method of silicon substrate, silicon on insulating substrate, epitaxial silicon for example that is used for integrated circuit and other device that is used to make.This method comprise provide have upper surface, the semiconductor wafer of back surfaces and circumferential lateral surface.In a preferred embodiment, upper surface is generally used for for example manufacturing of MOS transistor, electric capacity, memory construction of integrated circuit (IC)-components element itself.This method comprises makes semiconductor wafer stand one or more processing steps to form one or more material membranes on back surfaces.In a particular embodiment, described one or more processing steps can be those be used in the manufacturing of integrated circuit arbitrarily, for example deposition, etching, polishing, plating, implantation, heat treatment, these combination in any and other.This method is installed in semiconductor wafer on the operating platform that is coupled to revolving member, to expose back surfaces.This method is to rotate semiconductor wafer around the mode of rotating the member rotation.In a particular embodiment, this method comprises when semiconductor wafer is rotated that at least on back surfaces supply contains the acid solution of fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition.This method causes from back surfaces removes the pollutant that causes when forming described material membrane, and because the suitable surface tension force of acid solution, apart from the circumferential lateral surface of semiconductor wafer at least the pollutant in the fringe region of 0.8mm be removed.
In optional specific embodiment, the invention provides a kind of Semiconductor substrate method of silicon substrate, silicon on insulating substrate, epitaxial silicon for example that is used for integrated circuit and other device that is used to make.This method comprise provide have upper surface, the semiconductor wafer of back surfaces and circumferential lateral surface.In a preferred embodiment, upper surface is generally used for for example manufacturing of MOS transistor, electric capacity, memory construction of integrated circuit (IC)-components element itself.This method comprises makes semiconductor wafer stand one or more processing steps to form one or more material membranes on back surfaces.In a particular embodiment, described one or more technologies can be those be used in the manufacturing of integrated circuit arbitrarily, for example deposition, etching, polishing, plating, implantation, heat treatment, these combination in any and other.This method is installed in semiconductor wafer on the operating platform that is coupled to revolving member, to expose back surfaces.This method is to rotate semiconductor wafer around the mode of rotating the member rotation.In a particular embodiment, this method comprises when semiconductor wafer rotates that at least on back surfaces supply contains the acid solution of fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition.This method causes from back surfaces removes the pollutant that causes when forming described material membrane, and because the suitable surface tension force of acid solution, apart from the circumferential lateral surface of semiconductor wafer at least the pollutant in the fringe region of 0.8mm be removed.
By the present invention, many advantages that are better than conventional art have been realized.For example, present technique provides a kind of technology of wieldy dependence conventional art.In certain embodiments, this method provides the higher wafer yield on each wafer.In addition, this method also provides with the technology of traditional technology compatibility and needn't carry out substantial modification to traditional equipment and technology.Preferably, the invention provides improved back cleaning procedure, can remove by on the upper surface of integrated circuit, forming the caused pollutant of one or more films.This improved back cleaning procedure has also been removed the pollutant that causes from the semiconductor wafer back surfaces when forming material membrane, and because the suitable surface tension force of acid solution, also be removed apart from the pollutant in the fringe region of the circumferential lateral surface certain distance of semiconductor wafer.Based on this embodiment, can realize one or more in these advantages.At this specification particularly hereinafter, will describe these and other advantage in detail.
With reference to detailed description and accompanying drawing subsequently, can more fully understand various other purpose of the present invention, feature and advantage.
Description of drawings
Fig. 1 is the simplified flow chart that illustrates the method for the back surfaces that is used for clean semiconductor wafer according to one embodiment of present invention; And
Fig. 2 to 5 is the rough schematic views that illustrate the method for the back surfaces that is used for clean semiconductor wafer according to one embodiment of present invention.
Embodiment
According to the present invention, provide the technology that is used to process the integrated circuit that is used for the semiconductor device manufacturing.More specifically, the invention provides a kind of method and apparatus that adopts the manufacturing Semiconductor substrate of back cleaning, but will be appreciated that the present invention has wideer range of application.
Method can provide as follows briefly according to an embodiment of the invention:
1. the semiconductor wafer with upper surface, back surfaces and circumferential lateral surface is provided;
2. make semiconductor wafer stand one or more processing steps on back surfaces, to form one or more layers material membrane;
3. cause the formation of the pollutant on the back surfaces;
4. semiconductor wafer is installed on the operating platform that is coupled to revolving member, to expose back surfaces;
5. to rotate semiconductor wafer around the mode of rotating the member rotation;
6. when semiconductor wafer rotates, on back surfaces, supply the acid solution that contains fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition at least;
7. the pollutant on the removal back surfaces;
8. because the suitable surface tension force of acid solution, apart from the circumferential lateral surface of semiconductor wafer at least the pollutant in the fringe region of 0.8mm be removed;
9. stop supplies acid solution;
10. use cleaning solution, for example water cleans semiconductor wafer;
11. the back surfaces of drying of semiconductor wafers; And
12. carry out other step as required.
The step of said sequence provides method according to an embodiment of the invention.In a particular embodiment, the invention provides a kind of method and resulting devices, at least a combination that utilizes surfactant and acid ingredient the back surfaces of substrate is cleaned and and the circumferential lateral surface of semiconductor wafer at least the pollutant in the fringe region of 0.8mm also be removed.Can also provide under the situation of the scope that does not break away from claim wherein increases step, removes one or more steps, and other selection of one or more steps perhaps is set with different orders.Can be by this specification and the following more details that find this method of describing more specifically.
The method that is used for the back surfaces of clean substrate according to embodiments of the invention in the manufacture process of integrated circuit can provide as follows briefly:
1. the semiconductor wafer with upper surface, back surfaces and circumferential lateral surface is provided;
2. make semiconductor wafer stand one or more processing steps on back surfaces, to form one or more layers material membrane;
3. cause the formation of the pollutant on the back surfaces;
4. semiconductor wafer is installed on the operating platform that is coupled to revolving member, to expose back surfaces;
5. to rotate semiconductor wafer around the mode of rotating the member rotation;
6. when semiconductor wafer rotates, on back surfaces, supply the acid solution that contains fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition at least;
7. the pollutant on the removal back surfaces;
8. stop supplies acid solution;
9. use cleaning solution, for example water cleans semiconductor wafer;
10. the back surfaces of drying of semiconductor wafers; And
11. carry out other step as required.
The step of said sequence provides method according to an embodiment of the invention.In a particular embodiment, the invention provides a kind of method and resulting devices, can utilize at least a combination of surfactant and acid ingredient that the back surfaces of substrate is cleaned.Can also provide under the situation of the scope that does not break away from claim wherein increases step, removes one or more steps, and other selection of one or more steps perhaps is set with different orders.Can be by this specification and the following more details that find this method of describing more specifically.
Fig. 1 is the simplified flow chart 100 that illustrates the method for the back surfaces that is used for clean semiconductor wafer according to one embodiment of present invention.This flow chart only is an example, and limits the scope of claim within bounds.Those of ordinary skill in the art will recognize many versions, substitute and modification.As shown in the figure, this method is from starting from step 101.The Semiconductor substrate that this method is used to make integrated circuit and other device is silicon substrate, silicon on insulating substrate, epitaxial silicon for example.This method comprises provides (step 103) to have the semiconductor wafer of upper surface, back surfaces and circumferential lateral surface.In a preferred embodiment, upper surface is generally used for for example manufacturing of MOS transistor, electric capacity, memory construction of integrated circuit (IC)-components element itself.
In a particular embodiment, this method comprises and makes semiconductor wafer stand (step 105) one or more processing steps to form one or more material membranes on back surfaces.In a particular embodiment, these one or more processing steps can be that those are used in the manufacturing of integrated circuit any, for example deposition, etching, polishing, plating, implantation, heat treatment, these combination in any and other.In a particular embodiment, Semiconductor substrate is characterised in that to have the pattern that one or more design rules are 110 nanometers, but also can have other design rule.In the manufacturing of integrated circuit, for example, the back is polluted by one or more films, and these one or more films may looselys be attached to the back surfaces of wafer and apart from some part (step 107) of the fringe region of semiconductor wafer circumferential lateral surface certain distance.With reference to figure 2, illustrate back surfaces 200.Also illustrate one or more particles 201.These particles as pollutant can comprise silicon fragment (for example spicule), the film of part deposition, and/or other unwanted material.Certainly, can change, revise and substitute.
Again as shown in Figure 3, In a particular embodiment, this method is installed (step 109) to expose back surfaces with semiconductor wafer 305.As shown in the figure, wafer is installed on the platform 301 that is coupled to revolving member 323, and revolving member 323 is arranged on and drives in engine and/or the mechanism 321.As shown in the figure, this method is to rotate (seeing step 111) semiconductor wafer around the mode of rotating the member rotation shown in arrow 319.In a particular embodiment, this rotation is configured to per minute 800 commentaries on classics or bigger to about 1200 commentaries on classics of per minute.Other variation, modification and alternative can be arranged certainly.In addition, this rotation can be with the speed of Chang Su, variation, adjustable speed, and/or these other combination carries out, and this depends on certain embodiments.
In a certain embodiments, this method comprises when semiconductor wafer is rotated, and supplies the acid solution that (step 113) contains fluorine-containing composition 322, nitric acid composition 325, surfactant component 327 and organic acid composition 329 at least on back surfaces 309.In a preferred embodiment, use conduit 311 to provide acid solution 315 in the central area in direct mode, conduit 311 utilizes piping arrangement 333 to be coupled to concetrated pipe 331.In a particular embodiment, concetrated pipe is coupled to chemicals source 322,325,327,329.Concetrated pipe also can be directly and/or is coupled to the water source indirectly, and the water source can comprise hydrogen peroxide, ultra-clean water etc.
According to a specific embodiment, can suitably mix acid solution realize to remove back surfaces and/or apart from the pollutant in the fringe region of the circumferential lateral surface certain distance of semiconductor wafer.In a particular embodiment, fluorine-containing composition comprises the hydrofluoric acid that is called HF usually.According to a specific embodiment, the nitric acid composition comprises HNO3 in addition.According to a specific embodiment, the organic acid composition comprises CH3COOH.Surfactant component reduces the surface tension of acid solution with auxiliary removal back surfaces with apart from the pollutant in the fringe region of semiconductor wafer circumferential lateral surface certain distance, will discuss in further detail below.In a preferred embodiment, the organic acid composition reduces the surface tension of acid solution.The organic acid composition is also as the buffer composition that is used for acid solution.In a particular embodiment, acid solution is HNO3: HF: surfactant: CH3COOH was with about 160: 1: 30: the mixture of 8 ratio, but also can be other ratio.Only as an example, specific prescription of following summary:
1. mixed (surfactant can reduce the surface tension of mixed liquid with HNO3/HF and surfactant and CH3COOH; CH3COOH avoids HNO3 to dissociate too quickly as buffer medium and increases the chemicals operating period; CH3COOH can also help to reduce the surface tension of mixed liquid simultaneously);
2. the ratio of mixture can be 160: 1: 30: 8 (HNO3: HF: surfactant: CH3COOH);
3. some detailed prescriptions provide as follows:
Chemicals: HNO3+HF+ surfactant+CH3COOH (～160: 1: 30: 8)
HNO3: oxidant, Si+HNO3--＞SiO2
HF: etching SiO2
Surfactant: the otch and the etch uniformity that increase the wafer front portion
CH3COOH: buffer medium, avoid HNO3 to dissociate too quickly
Room temperature
Other variation, modification and alternative can be arranged certainly.
In a particular embodiment, this method causes from back surfaces removal (step 115) one or more pollutants.In a particular embodiment, this method has also been removed apart from the circumferential lateral surface of the semiconductor wafer pollutant (step 117) in the fringe region of 0.8mm at least.In a preferred embodiment, above-mentioned fringe region can have silicon nitride coating or polycrystalline silicon material.According to one embodiment of present invention, this method continues (step 119) up to forming the edge and the back is cleaned and do not have pollutant substantially.
In a particular embodiment, this method is also carried out other (step 121) processing step.Promptly this method can comprise the acid solution that uses on the aqueous solution clean semiconductor substrate.In a preferred embodiment, can provide the aqueous solution 313 by nozzle or spraying.In addition, this method also comprises the nitrogen drying Semiconductor substrate of utilizing cleaning dry, shown in the rough schematic view of Fig. 4.When wafer was dry, this method can stop, as step 123.Other variation, modification and alternative can be arranged certainly.
With reference to figure 5, illustrate semiconductor wafer 500.The film 501 that has one or more patternings on this wafer.This wafer also has the back surfaces 507 that basic cleaning does not have pollutant.In a particular embodiment, wafer has the fringe region 503 that this method utilized forms.According to specific embodiment, at least 0.8 millimeter of the width d of this fringe region 503.This fringe region can have the coating such as silicon nitride, polysilicon or other suitable material, perhaps also can be the silicon with exposure of thin oxide layer.Certainly, other variation, modification and alternative can be arranged.
It is also understood that example as described herein and embodiment just for illustrative purposes, those of ordinary skill in the art can be according to the foregoing description modifications and variations of the present invention are.These modifications and variations are all in the application's spirit and scope, and also within the scope of the claims.
Claims (19)
1. method of making Semiconductor substrate, described method comprises:
Semiconductor wafer is provided, and described semiconductor wafer has the circumferential lateral surface of upper surface, back surfaces and described semiconductor wafer;
Make described semiconductor wafer stand one or more processing steps on described back surfaces, to form one or more layers material membrane;
Described semiconductor wafer is installed on the operating platform that is coupled to revolving member, to expose described back surfaces;
Rotate described semiconductor wafer in the mode of rotating around described revolving member;
When described semiconductor wafer is rotated, on the described back surfaces of described semiconductor wafer, supply the acid solution that contains fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition at least;
Remove the pollutant that when forming described material membrane, causes from described back surfaces; And because the suitable surface tension force of described acid solution, the described circumferential lateral surface of the described semiconductor wafer of the distance interior pollutant of fringe region of 0.8mm at least is removed.
2. the method for claim 1, wherein said rotation are provided as that per minute 800 changes or change to per minute 1200 greatlyyer.
3. the method for claim 1, wherein said fluorine-containing composition comprises HF.
4. the method for claim 1, wherein said nitric acid composition comprises HNO3.
5. the method for claim 1, wherein said organic acid composition comprises CH3COOH.
6. the method for claim 1, wherein said surfactant component reduces the surface tension of described acid solution.
7. the method for claim 1, wherein said organic acid composition reduces the surface tension of described acid solution.
8. the method for claim 1, wherein said organic acid composition is as buffer composition.
9. the method for claim 1, wherein said fringe region comprises silicon nitride coating or polycrystalline silicon material.
10. the method for claim 1, wherein said pollutant comprises one or more particles.
11. the method for claim 1, wherein said pollutant comprises the acicular texture that one or more are siliceous.
12. the method for claim 1 also comprises and utilizes the aqueous solution to clean acid solution on the described Semiconductor substrate.
13. method as claimed in claim 12 also comprises and utilizes the described Semiconductor substrate of nitrogen drying.
14. a method that is used for the back of clean semiconductor substrate, described method comprises:
Semiconductor wafer is provided, and described semiconductor wafer has the circumferential lateral surface of upper surface, back surfaces and described semiconductor wafer;
Make described semiconductor wafer stand one or more processing steps on described back surfaces, to form one or more layers material membrane;
Described semiconductor wafer is installed on the operating platform that is coupled to revolving member, to expose described back surfaces;
Rotate described semiconductor wafer in the mode of rotating around described revolving member;
When described semiconductor wafer is rotated, at least on the described back surfaces of described semiconductor wafer, supply the acid solution that contains fluorine-containing composition, nitric acid composition, surfactant component and organic acid composition, to remove the pollutant that when forming described material membrane, causes from described back surfaces, and because the suitable surface tension force of described acid solution, the described circumferential lateral surface of the described semiconductor wafer of the distance interior pollutant of fringe region of 0.8mm at least is removed;
Clean the described back surfaces of described semiconductor wafer; And
The described back surfaces of dry described semiconductor wafer.
15. method as claimed in claim 14, wherein said rotation are provided as, and per minute 800 changes or the bigger per minute 1200 that arrives changes.
16. method as claimed in claim 14, described fluorine-containing composition comprises HF.
17. method as claimed in claim 14, wherein said nitric acid composition comprises HNO3.
18. method as claimed in claim 14, wherein said organic acid composition comprises CH3COOH, and described organic acid composition reduces the surface tension of described acid solution and as buffer composition.
19. method as claimed in claim 14, wherein said surfactant component reduces the surface tension of described acid solution.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200510111385XA CN100442450C (en) | 2005-12-05 | 2005-12-05 | Method for washing back etching in integrated circuit production |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB200510111385XA CN100442450C (en) | 2005-12-05 | 2005-12-05 | Method for washing back etching in integrated circuit production |
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| Publication Number | Publication Date |
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| CN1979771A CN1979771A (en) | 2007-06-13 |
| CN100442450C true CN100442450C (en) | 2008-12-10 |
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| CNB200510111385XA Expired - Fee Related CN100442450C (en) | 2005-12-05 | 2005-12-05 | Method for washing back etching in integrated circuit production |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6203625B1 (en) * | 1997-12-12 | 2001-03-20 | Stmicroelectronics S.A. | Method of cleaning of a polymer containing aluminum on a silicon wafer |
| US20020197887A1 (en) * | 2001-06-21 | 2002-12-26 | Ching-Yu Chang | Method of removing a photoresist layer on a semiconductor wafer |
| US20040187896A1 (en) * | 2003-03-31 | 2004-09-30 | Nobuo Konishi | Substrate processing method and apparatus |
| JP2004319990A (en) * | 2003-03-31 | 2004-11-11 | Tokyo Electron Ltd | Substrate processing method and substrate processing equipment |
-
2005
- 2005-12-05 CN CNB200510111385XA patent/CN100442450C/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6203625B1 (en) * | 1997-12-12 | 2001-03-20 | Stmicroelectronics S.A. | Method of cleaning of a polymer containing aluminum on a silicon wafer |
| US20020197887A1 (en) * | 2001-06-21 | 2002-12-26 | Ching-Yu Chang | Method of removing a photoresist layer on a semiconductor wafer |
| US20040187896A1 (en) * | 2003-03-31 | 2004-09-30 | Nobuo Konishi | Substrate processing method and apparatus |
| JP2004319990A (en) * | 2003-03-31 | 2004-11-11 | Tokyo Electron Ltd | Substrate processing method and substrate processing equipment |
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|---|---|
| CN1979771A (en) | 2007-06-13 |
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Effective date of registration: 20111129 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |
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