CN100440437C - Method for manufacturing thin film transistor, electro-optical device and electronic apparatus - Google Patents

Abstract

The invention provides a technique for forming a gate electrode and a semiconductor film for a thin film transistor with the precision of sub-micro order of magnitude through a simple and low cost procedure. The invention provides a method for manufacturing a thin film transistor, comprising the method for forming a gate electrode and/or a semiconductor film, wherein, the method for forming the gate electrode comprises the procedures as follow: liquid drops (114) including the semiconductor material is prepared on a substrate; the drops are dried and the semiconductor material is separated out at least at the periphery of the drops so as to form the semiconductor film (16). While the method for forming the grate electrode comprises the procedures as follow: liquid drops including a conductive material are prepared; the drops are dried and the conductive material is separated out at least at the periphery of the drops so as to form the gate electrode.

Description

Method of manufacturing thin film transistor, electro-optical device and electronic instrument

Invention field

The present invention relates to the manufacture method of semiconductor film and the method for manufacturing thin film transistor of this semiconductor film of use.

Background technology

In the past,, extensively adopted and use semi-conducting material to form the film that has greater than the area of needs, by being patterned the method that part is not come moulding of removing as the formation method of the semiconductor film of thin-film transistor manufacturing process.In addition, gate electrode is also mostly to be the conductive membranes that form tantalum, aluminium etc., is patterned and makes.

As an example of patterning method, enumerate photoetching process.Photoetching process is on the film that forms very widely, uses photomask to form the resist pattern of wishing, is not the method for purpose shape with this film forming by the part of resist pattern covers by etch processes.In recent years, because semiconductor element is highly integrated, forming technique less than 1 micron the so-called sub-micron order of magnitude becomes necessary, forms finer mask pattern when adopting etching or uses the short X ray of wavelength and the high method of resolution of electron ray exposure.

In addition, the film of fine shape also can form by ink-jet method.For example, the proposition solution that will comprise the semi-conducting material of organic semiconducting materials etc. is ejected into the method that forms semiconductor film on the substrate by the ink jet type blowoff.Under the situation by the ink-jet method ejection, because the wettability of substrate surface, the drop of ejection is expanded owing to moistening, is difficult to correctly describe fine pattern sometimes.Therefore, propose on substrate surface, to be pre-formed the configuration that drop is controlled in storage lattice cofferdam (bank), thereby according to the method (for example with reference to patent documentation 1 or patent documentation 2) of the drop of the pattern arrangement ejection of hope.

[patent documentation 1] spy opens clear 59-75205 communique

[patent documentation 2] spy opens the 2000-353594 communique

But in photoetching process, the formation of fine pattern and being used to uses the device of exposure of X ray and electron ray very expensive, and throughput is also low.In addition, in the ink-jet method, therefore liquid-drop diameter is difficult to the film of the moulding sub-micron order of magnitude more than several microns.Use in the method in storage lattice cofferdam,, must use above-mentioned photoetching process and ink-jet method, therefore produce cost and efficiency for forming storage lattice cofferdam.

Summary of the invention

Therefore, first problem of the present invention provides a kind of by simple and easy and cheap operation, forms the method for manufacturing thin film transistor of the effective semiconductor film of film crystal with the precision of the sub-micro order of magnitude.

In addition, second problem of the present invention provides a kind of by simple and easy and cheap operation, forms the method for manufacturing thin film transistor of the effective gate electrode of film crystal with the precision of the sub-micro order of magnitude.

And then the 3rd problem of the present invention provides a kind of by simple and easy and cheap operation, forms the method for manufacturing thin film transistor of the corresponding gate electrode of a plurality of and a plurality of thin-film transistors with the precision of the sub-micro order of magnitude.

For solving above-mentioned first problem, first mode of method of manufacturing thin film transistor of the present invention is a kind of method of manufacturing thin film transistor, this thin-film transistor possesses source region that semiconductor film, the channel region that is provided with, clamping channel region be provided with and drain region on semiconductor film, through gate insulating film and the opposed gate electrode of channel region, comprising the operation that on substrate, disposes the drop that comprises semi-conducting material; Make droplet drying produce the closed loop phenomenon, separate out the operation of semi-conducting material at the periphery at least of this drop; Separate out at the central portion of this drop under the situation of above-mentioned semi-conducting material, form the operation of semiconductor film by the above-mentioned semi-conducting material of removing central portion.

Usually, the drop that disposes on substrate carries out soon in periphery (edge) drying.Therefore, drop comprises under the situation of solute or dispersed substance (following general designation solute etc.), and in the dry run of this drop, the concentration of solute etc. at first reaches capacity in the drop periphery, begins to separate out.On the other hand, drop is inner to be produced from the liquid flow of drop central portion to periphery, with the drop that the refill droplet periphery is lost by evaporation, the solute of drop central portion etc. run to periphery along with this flows, along with the drying of drop begins to separate out at periphery.Like this, with solute of comprising in the drop etc., the phenomenon that the periphery ring-type of the droplet profile that disposes on the substrate is separated out is called " closed loop " (pinning).

First mode of method of manufacturing thin film transistor of the present invention is characterized in that, configuration comprises the drop of semi-conducting material on substrate, by making this droplet drying, by the closed loop phenomenon semi-conducting material is precipitate into the drop periphery.According to the closed loop phenomenon, can simple procedures form the fine semiconductor film of the sub-micron order of magnitude.In addition, the shape of semiconductor film, the wettability adjustment of adjustment that can be by rate of drying, the substrate surface of configuration drop is controlled, and can form ring-type, or be formed on also film forming circle of central portion or ellipse.In any case, by causing closed loop, can prevent that periphery is shunk back in the dry way, film diminishes or fly out.In addition, under the also film forming situation of drop central portion, as described later, can be processed into fine shape by removing its part.

In addition, the term that uses in this specification " thin-film transistor ", as long as be included in the channel region that is provided with on the semiconductor film, the source region corresponding and drain region, through gate insulating film and the opposed gate electrode of channel region with channel region, then do not limit its formation, can be the so-called overhead grid type that stacks gradually by the order of semiconductor film, gate insulating film, gate electrode on insulated substrate, also can be to put grid type in the so-called end that stacks gradually by the order of gate electrode, gate insulating film, semiconductor film on insulated substrate.

In first mode of method of manufacturing thin film transistor of the present invention, preferably in the operation of configuration drop, the drop of configuration more than 2 separated out the periphery of the droplet profile that the semiconductor film material obtains when these drops merge.

If the drop more than 2 very near or dispose with overlapping, then owing to drop more than 2 is merged in the moistening expansion of each drop.Thus, droplet profile can be done all changes, thereby the freedom shape of the semiconductive thin film that obtains improves also.For example, by linearity and put and merge a plurality of drops, can obtain the drop of wire.If the drop by wire causes closed loop, when then its periphery is separated out semi-conducting material, can obtain the semiconductor film of linearity of the width of the sub-micron order of magnitude.In addition,, whole drops form 1 big drop except that being merged, and also can be by merging the drop more than 2 repeatedly and separating out the semiconductor film that semiconductor film obtains linearity at its periphery.

In addition, in first mode of method of manufacturing thin film transistor of the present invention, the operation that preferably also is included in the configuration drop improves the operation of the semiconductor film concentration of material of drop periphery in the drop afterwards.

As the operation that improves the semiconductor film concentration of material of drop periphery in the drop, can enumerate for example on the substrate of configuration drop, add temperature gradient come with drop in produce convection current operation, be disposed at the operation of overlapping ejection solvent (or dispersion solvent) on the drop on the substrate etc.By this operation, semi-conducting material concentrates on the drop periphery, promotes separating out of periphery.As mentioned above, even if there is not this operation, the concentration difference of the solute by drop central portion and periphery etc. produces from the liquid flow of drop central portion to periphery, but energetically semi-conducting material is transported to flowing of drop periphery by producing, can more effectively prevents the residual semi-conducting material of drop central portion by this operation.

First mode of method of manufacturing thin film transistor of the present invention, preferably also be included in after the operation that forms semiconductor film, a part of removing semiconductor film is with the operation of dividing semiconductor film and form gate electrode with the operation of the corresponding semiconductor film of cutting apart respectively.

As the operation of removing semiconductor film, can enumerate method, etching method etc. that for example additional organic solvent comes the stripping semi-conducting material and removes each solvent.Remove in the operation, do not need the precision of the sub-micron order of magnitude, so the useful etch method is carried out less expensively.By such dividing semiconductor film, form gate electrode with corresponding each semiconductor film, but high density forms a plurality of fine thin-film transistors expeditiously.In addition, during droplet drying, except that the drop periphery, also separate out under the situation of semi-conducting material,, can only obtain the fine semiconductor film of periphery by using the semiconductor film of removing central portion with quadrat method at for example drop central portion.

In addition, first mode of method of manufacturing thin film transistor of the present invention, the operation that preferably is included in the configuration drop is carried out the operation of planarization substrate surface before.

The operation of planarization is for example undertaken by cmp (CMP), etching method etc.In addition, form the method for SOG (rotation on glass) film in the spin-coating method, see that from cost for obtaining tabular surface also be good method.Therefore if substrate surface is smooth, the moistening equably expansion of drop can be carried out the patterning of semiconductor film accurately.

In first mode of method of manufacturing thin film transistor of the present invention, preferably with heat or optical energy irradiation to the semiconductor film that obtains by closed loop.As heat or optical energy irradiation, can enumerate for example rapid thermal treatment (Rapid Thermal Process) processing, laser radiation (RTP).Thus, can improve the crystallinity of semiconductor film.

In addition, in first mode of method of manufacturing thin film transistor of the present invention, the operation that also can be included in the formation semiconductor film is afterwards by injecting impurity the operation that semiconductor film forms source region and drain region.Above-mentioned semiconductor film can be used for thin-film transistor by this operation.

In addition, for solving above-mentioned second problem, second mode of method of manufacturing thin film transistor of the present invention is a kind of method of manufacturing thin film transistor, this thin-film transistor possesses the source region of the channel region that is provided with, corresponding channel region and drain region on semiconductor film, through gate insulating film and the opposed gate electrode of channel region, comprising: the droplet configuration operation, by the wettability on control gate dielectric film surface, the configuration drop is mutually opposed with channel region so that comprise the periphery of drop of conductive material; With separate out operation, make droplet drying produce the closed loop phenomenon, conductive material is separated out at the periphery at least of this drop, and separate out at the central portion of this drop under the situation of above-mentioned semi-conducting material, form gate electrode by the above-mentioned semi-conducting material of removing central portion.

Promptly, second mode of method of manufacturing thin film transistor of the present invention is characterized in that, by utilizing above-mentioned " closed loop " phenomenon configuration drop, make that the drop periphery and the channel region that comprise conductive material are opposed, the conductive film of separating out is used as gate electrode.According to the closed loop phenomenon, available simple procedures forms the fine conductive film of the sub-micron order of magnitude.

In second mode of method of manufacturing thin film transistor of the present invention, preferably in the droplet configuration operation, the wettability on the surface by controlling above-mentioned gate insulating film, the periphery that is configured to above-mentioned drop is mutually opposed with above-mentioned channel region.

As the periphery and the opposed method of above-mentioned channel region that are configured to above-mentioned drop by the control wettability, for example can enumerate except that with the opposed position of channel region, formation has the finishing film of low compatibility to conductive material, and (self-organization monomolecular film (SAMs:Self-Assembled Monlayer) for example forms the method that the back configuration comprises the drop of conductive material at this finishing film.According to this method, conductive material avoids forming the zone of the low finishing film of compatibility, easily with the opposed position of channel region on separate out.

In second mode of method of manufacturing thin film transistor of the present invention, preferably in separating out operation, comprise the operation of the conductive material that removal separates out at the central portion of drop.

The method of the conductive material of separating out as removal can be enumerated method, etching method etc. that for example additional organic solvent, acid solution come the stripping conductive material and remove each solvent.Remove in the operation, do not need the precision of the sub-micron order of magnitude, so the useful etch method is carried out less expensively.By removing the conductive membrane of central portion, can only obtain the fine conductive membrane of periphery.

In second mode of method of manufacturing thin film transistor of the present invention, preferably a plurality of channel regions are arranged under the situation on the semiconductor film of 1 thin-film transistor, one or more drops of configuration make that the periphery of drop is mutually opposed with these a plurality of channel regions in the droplet configuration operation, form a plurality of gate electrodes that are opposite to these a plurality of channel regions respectively in separating out operation.

As under the situation of the highly integrated structure that is provided with a plurality of raceway grooves on the semiconductor film of a thin-film transistor, the manufacture method according to the benzene invention also can form gate electrode simply.The control of the configuration of drop, also can by as the control of above-mentioned wetability carry out, and also can regulate drying and control.By adjusting drying, on the drop central portion, also separate out conductive material, also can form the conductive membrane of circle or elliptical shape, and after forming described film, remove the film of central portion and can form gate electrode.

In second mode of method of manufacturing thin film transistor of the present invention, preferably separate out operation and comprise that removal separates out the removal operation of the part of conductive material at above-mentioned drop periphery, this removal process interruption is convinced electrical material by patient analysis to form a plurality of gate electrodes that are opposite to above-mentioned a plurality of channel regions respectively.

For example, by removing a part that disconnects the conductive material that forms with ring-type, form a plurality of gate electrodes of circular shape.Can simple procedures form a plurality of gate electrodes by this structure, can form the short high performance thin-film transistor of gate length more to high-density.

In addition, in second mode of method of manufacturing thin film transistor of the present invention, preferably in the droplet configuration operation, dispose the drop more than 2, in separating out operation, the periphery at least of the droplet profile that conductive material obtains when above-mentioned drop more than 2 merges is separated out.

As mentioned above, by merging the drop more than 2, droplet profile is done all changes, thereby the freedom shape of the conductive membrane that obtains improves also.For example, by linearity and put and merge a plurality of drops, can obtain the drop of wire.If the drop by wire causes closed loop, when then its periphery is separated out conductive material, can obtain the gate electrode pattern of linearity of the width of the sub-micron order of magnitude.In addition,, whole drops form 1 big drop except that being merged, and can also be by merging the drop more than 2 repeatedly and separating out the conductive membrane that conductive membrane obtains linearity at its periphery.

In addition, in second mode of method of manufacturing thin film transistor of the present invention, preferably also be included in the operation that the droplet configuration operation improves the concentration of the conductive material of drop periphery in the drop afterwards.

As the operation that improves the concentration of the conductive material of drop periphery in the drop, can enumerate for example on the substrate of configuration drop, add temperature gradient come with drop in produce convection current operation, be disposed at the operation of overlapping ejection solvent (or dispersion solvent) on the drop on the substrate etc.By this operation, conductive material concentrates on the drop periphery, promotes separating out of periphery.As mentioned above, even if there is not this operation, the concentration difference of the solute by drop central portion and periphery etc. produces from the liquid flow of drop central portion to periphery, but energetically conductive material is transported to flowing of drop periphery by producing, can more effectively prevents the residual conductive material of drop central portion by this operation.

In addition, the present invention also provide possess the source region that contains 1 semiconductor film of 2 channel regions, corresponding above-mentioned channel region and drain region, through the gate electrode of opposed above-mentioned 2 channel regions of gate insulating film, the conducting film that forms above-mentioned gate electrode is the thin-film transistor of 1 ring-type conducting film.

This thin-film transistor can be the drop that comprises conductive material of diameter by the distance that is configured to 2 channel regions on gate insulating film under the situation of for example overhead grid type, by being dried and causing that the closed loop phenomenon makes.This thin-film transistor gate length is the sub-micron order of magnitude, and extremely Duan gate electrode separates the formation of slight gap high density, therefore can be highly integrated.

In addition, possess under the situation of thin-film transistor of above-mentioned 2 channel regions, also can form the 1 group of source region and the drain region of 2 channel regions of clamping, each that also can corresponding 2 channel regions forms 2 thin-film transistors.As the former application, the so-called multiple-grid type thin-film transistor that forms the gate electrode of 1 group of source region of correspondence more than 3 and drain region also is contained among the present invention.The electric current of supplying with has increased the part that gate electrode increases, and performance also improves these.In addition, under the situation that the magnitude of current equates, the electric current of per 1 gate electrode tails off, and current loss and heating can be suppressed, and are preferred.In addition, under the latter instance, that is, each of corresponding 2 channel regions forms under the situation of 2 thin-film transistors, corresponding N channel type MOS transistor in 2 thin-film transistors, and another can be the complementary type MOS transistor of corresponding P channel type MOS transistor.

In addition, for solving above-mentioned the 3rd problem, the Third Way of method of manufacturing thin film transistor of the present invention is a kind of method of making the thin-film transistor more than 2, this thin-film transistor possesses the semiconductor film that contains channel region, opposed source region of the above-mentioned channel region of clamping and drain region, through gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, possess: arrangement step, wettability by control gate dielectric film surface, configuration comprises the drop of electric conducting material, so that at least a portion of this drop periphery is mutually opposed with the above-mentioned channel region more than 1; Separate out operation, form above-mentioned gate electrode by only separating out above-mentioned electric conducting material at the periphery of above-mentioned drop, wherein other gate electrode of each and at least one of the above-mentioned gate electrode that will form is connected.

Promptly, in the Third Way of method of manufacturing thin film transistor of the present invention, above-mentioned by utilizing " closed loop phenomenon ", drip and comprise the drop of electric conducting material and form conductive membrane, used as gate electrode, thereby can be cheap and obtain the annular grid electrode of the width of the sub-micron order of magnitude easily, in addition, can form a plurality of gate electrodes of corresponding a plurality of thin-film transistors easily.

In addition, but the conductive membrane ring-type is separated out, the rate of drying, the particle diameter of electric conducting material, contact angle, the concentration that comprise the drop of electric conducting material by control, or, be thing in the design and adopt which shape or control method by the shape beyond can separating out ring-type in methods such as other drops of overlay configuration on once the drop of configuration.

The Third Way of method of manufacturing thin film transistor of the present invention is characterized in that, in the thin-film transistor of making, other gate electrodes of each gate electrode and at least one of formation are electrically connected.This drop that is formed in configuration only is under 1 the situation, also droplet configuration can be become the periphery of this drop and a plurality of channel region opposed.

The drop of configuration is under the situation more than 2, the at least a portion and the above-mentioned channel region more than 1 of the periphery by each drop are opposed, and at least a portion of the periphery of each drop is overlapping with the periphery of other drops at least, and each gate electrode is electrically connected other gate electrodes more than at least 1.

By this formation, can have been connected many channel transistors of a plurality of thin-film transistors side by side, available 1 gate signal drives a plurality of transistors.

In addition, for solving above-mentioned the 3rd problem, the invention provides a kind of method of manufacturing thin film transistor, it is a method of making the thin-film transistor more than 2, this thin-film transistor possesses the semiconductor film that contains channel region, opposed source region of the above-mentioned channel region of clamping and drain region, through gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, comprise: arrangement step, wettability by control gate dielectric film surface, configuration comprises the drop of electric conducting material, so that at least a portion of each drop periphery is mutually opposed with the above-mentioned channel region more than 1; Separate out operation, form above-mentioned gate electrode by only separating out above-mentioned electric conducting material at the periphery of above-mentioned drop; Separation circuit, with each gate electrode of opposed above-mentioned channel region respectively form with and the island separated of the opposed gate electrode of other channel regions.

In this method, by separating the conductive membrane that is formed by the closed loop phenomenon and forming gate electrode, can form each the corresponding a plurality of gate electrode with a plurality of thin-film transistors easily, the while can obtain micro gate electrode to high-density.

Preferably above-mentioned separation circuit is undertaken by a part of for example removing the gate electrode of separating out.The removal of conductive membrane can be by for example supplying with basic solvent and stripping film, undertaken by method, the etching method of each removal of solvents electric conducting material.

In addition, in the method for fabricating thin film transistor of the present invention, preferably the thin-film transistor of Zhi Zaoing has a gate electrode separately, is formed with one group of source region and drain region for each gate electrode.By this structure, but high density forms multi-link transistor.In addition, the formation with total source region of other adjacent thin-film transistors and/or drain region also is contained among the present invention.

In addition, next drop of configuration in above-mentioned droplet configuration operation preferably makes it on the part of the drop periphery electric conducting material of being separated out of overlapping configuration formerly, the part of dispersed electro-conductive material again.By adopting this formation, can have the degree of freedom according to the shape of the conductive membrane of separating out.

In addition, the drop of configuration more than 2 in the droplet configuration operation preferably separated out the periphery at least of the droplet profile that conductive material obtains when the drop more than 2 merges separated out.Thus, can obtain bigger ring-type conductive membrane, the conductive membrane of linearity etc.

In the method for manufacturing thin film transistor of the present invention, preferably the semiconductor film of each thin-film transistor that will make forms the island that separates with the semiconductor film of other thin-film transistors.

In addition, method of manufacturing thin film transistor of the present invention is preferably in the operation that is included in the gate insulating film that formation has an even surface on each channel region before the droplet configuration operation.If dielectric film has an even surface, moistening equably expansion when then disposing drop, thus control droplet profile easily.

In addition, second and Third Way of method for fabricating thin film transistor of the present invention preferably before above-mentioned droplet configuration operation, are included in the operation of the gate insulating film that formation has an even surface on above-mentioned each channel region, and in above-mentioned drop ejection operation, dispose drop on this gate insulating film.

Smooth gate insulating film for example is the application type dielectric film.For example, on the substrate that forms semiconductor pattern, when forming sog film with spin-coating method, the zone that is formed on semiconductor pattern approaches, is not having the regional thick dielectric film of semiconductor pattern, the dielectric film that can obtain having an even surface.Sog film can be 1 layer, and alternative above-mentioned CMP etc. can be with sog film as planarization mechanism.On the other hand, when on semiconductor film, forming dielectric film by sputtering method, the part that forms on stacked part and the zone that does not have semiconductor film on the semiconductor film produces jump in dielectric film, but under this situation, can pass through formation such as cmp (CMP) and etching.

If having an even surface of gate insulating film, therefore moistening equably expansion when then disposing drop on the gate insulating film is desirable shape with droplet configuration easily, can carry out the patterning of gate electrode accurately.

In addition, the present invention also comprises and possesses by the electro-optical device of the thin-film transistor of the method for fabricating thin film transistor manufacturing of the invention described above, possesses the electronic instrument of this thin-film transistor.

Here, electro-optical device generally is to possess the passing through electro ultrafiltration of thin-film transistor of the present invention and luminous or possess the device of change from the electrooptic cell of the state of the light of outside, comprises selfluminous device and the control device that passes through from the light of outside.For example, as electrooptic cell, liquid crystal cell is arranged, have the decentralized medium that has disperseed electrophoresis particle electrophoresis element, EL (electroluminescence) element, possess the active matrix type display that makes the electronics that applies generation by electric field come luminous electronic emission element over against luminous plaque etc.

In addition, so-called electronic instrument generally is the instrument that possesses the certain function of realization of thin-film transistor of the present invention, for example possesses electro-optical device, memory.It constitutes qualification especially, but can comprise for example IC-card, mobile phone, video tape recorder, personal computer, head mounted display, rear-projection or just throwing type projecting apparatus, in addition in addition with the view finder of the picture unit of Presentation Function, digital camera, pocket TV, DSP device, PDA, electronic notebook, electric light telegraph board, exploitation with display etc.

In addition, the semiconductor film that the present invention also provides a kind of use to form on substrate forms the manufacture method of the semiconductor device of semiconductor element, comprising: configuration contains the operation of the drop of semi-conducting material on substrate; With make droplet drying produce the closed loop phenomenon, separate out the operation of semi-conducting material at the periphery at least of this drop; By separating out at the central portion of this drop under the situation of above-mentioned semi-conducting material, the above-mentioned semi-conducting material of removing central portion forms the operation of semiconductor film.Available simple procedures high density forms fine semiconductor film in this manufacture method.

Description of drawings

Fig. 1 is the key diagram of the semiconductor film device of first execution mode.

Fig. 2 is the key diagram of the semiconductor film device of first execution mode.

Fig. 3 is the stereogram of ink jet type blowoff.

Fig. 4 is the side cross-sectional views of ink gun.

Fig. 5 is the key diagram of the semiconductor film device of second execution mode.

Fig. 6 is the key diagram of the semiconductor film device of second execution mode.

Fig. 7 is the key diagram of the semiconductor film device of the 3rd execution mode.

Fig. 8 is the key diagram of the semiconductor film device of the 3rd execution mode.

Fig. 9 is the key diagram of the semiconductor film device of the 4th execution mode.

Figure 10 is the key diagram of the semiconductor film device of the 4th execution mode.

Figure 11 is the key diagram of the semiconductor film device of the 4th execution mode.

Figure 12 is the key diagram of the semiconductor film device of the 5th execution mode.

Figure 13 is the key diagram of the semiconductor film device of the 5th execution mode.

Figure 14 is the key diagram of the semiconductor film device of the 6th execution mode.

Figure 15 is the key diagram of the semiconductor film device of the 6th execution mode.

Figure 16 is the key diagram of the semiconductor film device of the 7th execution mode.

Figure 17 is the key diagram of the semiconductor film device of the 7th execution mode.

Figure 18 is the key diagram of the semiconductor film device of the 8th execution mode.

Figure 19 is the key diagram of the semiconductor film device of the 8th execution mode.

Figure 20 is the key diagram of manufacture method of the semiconductor film device of the 9th execution mode.

Figure 21 is the key diagram of manufacture method of the semiconductor film device of the 9th execution mode.

Figure 22 is the key diagram of manufacture method of the semiconductor film device of the 9th execution mode.

Figure 23 is the key diagram of the semiconductor film device of the tenth execution mode.

Figure 24 is the key diagram of the semiconductor film device of the 11 execution mode.

Figure 25 is the key diagram of the semiconductor film device of the 11 execution mode.

Figure 26 is the figure of equivalent electric circuit of the semiconductor film device of expression the 11 execution mode.

Figure 27 is the figure in order to the formation method of the gate electrode that the 11 execution mode is described.

Figure 28 is the key diagram of the semiconductor film device of the 12 execution mode.

Figure 29 is the figure of equivalent electric circuit of the semiconductor film device of expression the 12 execution mode.

Figure 30 is the key diagram of the semiconductor film device of the 13 execution mode.

Figure 31 is the figure in order to the formation method of the gate electrode that the 13 execution mode is described.

Figure 32 is the key diagram of the semiconductor film device of the 14 execution mode.

Figure 33 is the figure in order to the formation method of the gate electrode that the 14 execution mode is described.

Figure 34 is the figure of an example of the connection status of expression electro-optical device.

Figure 35 is the key diagram that adopts the various electronic instruments of electro-optical device formation.

Figure 36 adopts electro-optical device and the key diagram of the various electronic instruments that constitute.Among the figure:

10,50-substrate, 12,52,72-dielectric film, 14,54-drop, 16,56,74, the 88-semiconductor film, 18,58, the 76-gate insulating film, 20,62-gate electrode, 22,78-source/drain region, 25,80-source/drain electrode, 30-ink jet type blowoff, 31-ink jet type shower nozzle, the 100-electro-optical device

Embodiment

Embodiments of the present invention are described with reference to the accompanying drawings.

＜the first execution mode 〉

Fig. 1 and Fig. 2 are the key diagrams of semiconductor film manufacture method of first mode of expression method of manufacturing thin film transistor of the present invention.In the present embodiment, it is characterized in that configuration contains the drop of semi-conducting material and makes its drying on insulated substrate, utilize the closed loop phenomenon to form semiconductor film.

(dielectric film formation operation)

Fig. 1 (A) is the plane graph that forms the substrate of dielectric film 12.Sectional view along this Fig. 2 A-2A line is represented at Fig. 2 (A).Shown in Fig. 2 (A), dielectric film 12 is formed on the substrate 10 that insulating material such as glass constitutes.In the present embodiment, form silicon oxide film as dielectric film 12.Silicon oxide film can pass through film forming such as physical vapor volumetric method such as for example plasma activated chemical vapour deposition (PECVD method), rpcvd method (LPCVD method), sputtering method.Also can form sog film in addition by rubbing method.After the film forming, under the surperficial very not smooth situation, use the wet etching of fluoric acid or use CMP method planarized surface.Sog film by the spin-coating method film forming has the planarization effect, and therefore above-mentioned planarization operation does not need.Thus, the concave-convex surface of dielectric film 12 has disappeared, the even moistening expansion of drop, thus dispose the drop of desirable shape easily.

(droplet configuration operation)

Then shown in Fig. 1 (B), configuration contains the drop 14 of semi-conducting material on dielectric film 12.Sectional view along this Fig. 2 B-2B line is represented at Fig. 2 (B).

As semi-conducting material, can use for example organic semiconducting materials.Organic semiconducting materials is dissolvable in water non-polar organic solvents such as toluene, dimethylbenzene, trimethylbenzene, can be used as droplet configuration on dielectric film 12.As organic semiconducting materials, can enumerate low molecular compounds such as naphthalene, anthracene, aphthacene, pentacene, hexacene, or and hydroxyl oxadiazole derivative (PBD), hydroxyl diazole dimer (OXD-8), beryllium-benzoquinoline complex compound (Bebq), triphenylamine derivative (MTDATA) and triarylamine derivative, triazole derivative, polyhenylene, poly alkyl fluorene, poly-alkylthrophene, (P3HT), polyethylene pyrene, polyethylene naphthalenedicarboxylate, (poly (9 for F8T2,9-dioctylfluorene-co-bithiophene)) etc. macromolecular compound, but be not limited to this.Organic semiconductor can be processed in room temperature, does not need extensive manufacturing installation, can cheaply make.In addition, as the drop that comprises the semiconductor film material, can use at least a silicon compound that from encircle the group that penta silane and silane basic ring penta silane constitutes, to select to be dissolved in the liquid that obtains in the organic solvent of dimethylbenzene etc.,, can form the inorganic semiconductor film according to these materials.

As the method for configuration drop 14 on dielectric film 12, can enumerate the method for using micro pipette (micropipette), little sprinkling, ink-jet etc., but the ink ejecting method that can carry out correct especially patterning is best.Ink-jet method uses ink jet type blowoff described later to carry out.

(semi-conducting material is separated out operation)

Shown in Fig. 1 (B) and Fig. 2 (B), than fast at the central portion rate of drying, the periphery 15 semiconductor-on-insulator materials concentration that reaches capacity earlier begins to separate out the drop 14 of configuration at periphery 15 on dielectric film 12.Become the state that the periphery of drop is pegged by the semi-conducting material of separating out, cause that inhibition shrinks " the closed loop phenomenon " of (external diameter contraction) along with the drop of the drying after it.Because the rate of drying of periphery 15 is fast, produce from the liquid flow of drop central portion to periphery 15, material is transported to the result of periphery 15 on the semiconductor film, forms the ring-type semiconductor film 16 of following the drop profile.

Express material on drop bone dry, the semiconductor film among Fig. 1 (C) and separate out, form the state of semiconductor film 16 along drop periphery shape.Sectional view along the 2C-2C line of this figure is represented in Fig. 2 (C).Semiconductor film 16 forms the ring-type of width below 1 micron.

During drop 14 dryings, may be controlled to the semiconductor material section concentration that improves the drop periphery in the drop.For example, regulate the temperature of substrate, or, in drop, produce convection current, can effectively semi-conducting material be moved to periphery 15 by on temporary transient dry semiconductor film, spraying vaporized state or the viscosity that drop is controlled drop once more.So, semi-conducting material concentrates on the drop periphery, can more effectively prevent central portion 17 residual semi-conducting materials, can separate out the thin ring-type semiconductor film of width, thereby not need patterning just can be directly used in the formation of semiconductor element at semiconductor film 16.

Can improve crystallinity by irradiation heat or luminous energy on the semiconductor film 16 that obtains.For example, can enumerate the heat treatment of rapid thermal treatment (RTP), or can enumerate X ray, ultraviolet ray, luminous ray, infrared ray (hot line), laser, millimeter wave, microwave, electron ray, radioactive ray (α line, β line, γ line) etc. as luminous energy, laser that especially preferably can high output irradiation.As laser, can enumerate all gases laser, Solid State Laser (semiconductor laser) etc., but excimer laser, Nd-YAG laser, Ar laser, CO2 laser, He-Ne laser etc. are suitable.The excimer laser that wherein has the following wavelength of 350nm of semiconductor film surface absorption irradiation energy is particularly suitable for.

(element formation operation)

Then be that the example explanation uses the semiconductor film of above-mentioned manufacture method manufacturing to form the operation of semiconductor element with the thin-film transistor.

Expression forms the state of gate insulating film 18 and gate electrode 20 among Fig. 1 (D) and Fig. 2 (D).Fig. 2 (D) is the sectional view along the 2D-2D line of Fig. 1 (D).

Shown in Fig. 2 (D), on semiconductor film 16, form gate insulating film 18 and gate electrode 20.Gate insulating film 18 is for example silicon oxide film, and silicon oxide film can become embrane method and sog film to form by for example electron cyclotron resonance PECVD method (ECR-PECVD method) etc.Gate electrode 20 can be by forming by carrying out patterning behind the electric conductor membrane that forms tantalum, aluminium etc. in the one-tenth embrane method by sputtering method etc.

Among Fig. 1 (D),, omitted gate insulating film 18 for the position relation of expression semiconductor film 16 and gate electrode 20.Gate electrode 20 is configured to cross the semiconductor film 16 of ring-type.

Be the impurity element that mask injects to be become the alms giver and led then, carry out so-called from mating ion injection, formation source/drain region 22 and channel region 23 on semiconductor film 16 with gate electrode 20.For example, inject phosphorus (P) as impurity element, afterwards, the energy density that XeCl excimer laser is adjusted into 400mJ/cm2 shines the activated impurity element, thereby forms N type source/drain region.In addition, substitute laser radiation, the activation of impurity element is carried out in the heat treatment that can carry out about 250 ℃～400 ℃.

Then shown in Fig. 1 (E) and 2 (E), express the formation operation of interlayer dielectric and source/drain electrode.Fig. 2 (E) is the sectional view along the 2E-2E line of Fig. 1 (E).And shown in 2 (E), form the interlayer dielectric 24 that constitutes by silicon oxide film with covering gate dielectric film 18 and gate electrode 20.Silicon oxide film becomes embrane method to form about 500nm by for example PECVD method, SOG method etc.Then connect gate insulating film 18 and interlayer dielectric 24 and form the contact hole of striding source/drain region 22, in these contact holes, imbed patterning behind the electric conductor of aluminium, tungsten etc. by one-tenth embrane methods such as sputtering methods, thus formation source/drain electrode 25.Form thin-film transistor like this.

Among Fig. 1 (E),, gate insulating film and interlayer dielectric have been omitted for the position relation of clear and definite source/drain region 22, gate electrode 20, source/drain electrode 25 etc.In the semiconductor film that ring-type forms not the part of stacked gate electrode be source/drain region 22, the part of stacked gate electrode is a channel region, forms thin-film transistor.Source/drain electrode is formed on the central authorities of source/drain region.

Like this, in the present embodiment, use the configuration of the liquid that comprises semi-conducting material and the semiconductor film that its dry such simple procedures can form the regulation shape, just can carry out dielectric film continuously without the patterned semiconductor film and form operation.

(droplet ejection apparatus)

Above-mentioned each drop is by forming from ink jet type blowoff ejection liquid.Therefore, use Fig. 3 that the ink jet type blowoff is described.Fig. 3 is the stereogram of ink jet type blowoff 30.Ink jet type blowoff 30 is mainly by base 32, first moving-member 34, second moving-member 36, constitute as the electronic balance (not shown) of gravimetry parts, 31, capping unit 33 and clearing cell 35.The action that comprises the ink jet type blowoff 30 of first moving-member 34, second moving-member 36 is controlled by control device.Among Fig. 3, directions X is the left and right directions of base 32, and the Y direction is a fore-and-aft direction, and the Z direction is an above-below direction.

First moving-member 34, make 2 guide rails 38 and Y direction as one man be set directly at base 32 above.This first moving-member 34 has the slide block 39 that can move along 2 guide rails 38.As the driver part of this slide block 39, can adopt for example linear motor.Thus, slide block 39 can move along Y direction, can be positioned on the optional position.

Fixed motor 37 above the slide block 39, fixed station on the rotor of motor 37 (table) 46.This 46 maintenance substrate 10 and location.That is, by making not shown absorption holding member action, the hole 46A absorption substrate 10 by platform 46 can remain on substrate 10 on the platform 46.In addition, motor 37 for example is a direct drive motor.By this motor 37 energising platforms 46 are rotated the direction to θ z with rotor, be provided with 31 on the platform 46 and throw away liquid, or attempt the preparation ejection zone of ejection (preparation ejection).

On the other hand, base 32 rears are upright establishes 2 pillar 36A, and this pillar 36A has set up pillar 36B in the upper end.And the whole face of pillar 36B is provided with second moving-member 36.This second moving-member 36 has 2 guide rail 84A along X-direction configuration, has the slide block 82 that can move along guide rail 84A.As these slide block 82 driver parts, can adopt for example linear motor.Thus, slide block 82 can move along X-direction, can be positioned on the optional position.

Slide block 82 is provided with 31.31 connect as the motor 84,85,86,87 that shakes positioning element.Motor 84 can make 31 to move in Z-direction, and can be positioned on the optional position.Motor 85 can make 31 to shake in the β direction around Y-axis, and can be positioned on the optional position.Motor 86 can make 31 to shake in the γ direction around X-axis, and can be positioned on the optional position.Motor 87 can make 31 to shake in the α direction around the Z axle, and can be positioned on the optional position.

As mentioned above, substrate 10 can move on the Y direction and locate, and can shake on θ z direction and locate.31 can move on X, Z direction and locate, and can shake on α, β, γ direction and locate.Therefore, correctly the ink ejection face 31P of control head 31 and the relative position and the posture of the substrate 10 on the platform of the ink jet type blowoff 30 of present embodiment.

(ink gun)

Here, with reference to the structure of Fig. 4 explanation 31.Fig. 4 is the side cross-sectional views of ink gun.31 by drop ejection mode with liquid L from nozzle 41 ejections.As drop ejection mode, applicable utilization sprays known all technology such as mode of liquid as the piezoelectricity mode of the piezoelectric element ejection liquid of piezoelectric element, by the bubble (bubble) of heating liquid generation.Wherein the piezoelectricity mode is to liquid heat, therefore has not the advantage that material composition etc. is exerted an influence.The 31 employing piezoelectricity mode of Fig. 4.

Be formed with liquid reservoir (reservoir) 45 on 31 the head main body 40 and from a plurality of ink chamber 43 of liquid reservoir 45 branches.Liquid reservoir 45 becomes in order to the stream to each 43 feed fluid L of ink chamber.In addition, head main body 40 lower surfaces are equipped with the nozzle plate that constitutes ink ejection face.Open a plurality of nozzles 41 of ejection liquid L on this nozzle plate corresponding to each ink chamber 43.And, be formed with ink flow path towards the nozzle 41 of correspondence from each ink chamber 43.On the other hand, head main body 40 upper surfaces are equipped with oscillating plate 44.Oscillating plate 44 is forming the wall of each ink chamber 43.These oscillating plate 44 outsides are provided with piezoelectric element 42 corresponding to each ink chamber 43.Piezoelectrics such as piezoelectric element 42 usefulness pair of electrodes (not shown) clamping crystals.This pair of electrodes is connected in drive circuit 49.

And, from drive circuit 49 when piezoelectric element 42 applies voltage, piezoelectric element 42 dilatancies or contraction distortion.During piezoelectric element 42 contraction distortions, the pressure of ink chamber 43 reduces, from liquid reservoir 45 to the 43 influent L of ink chamber.The pressure of piezoelectric element 42 reduces in addition, from liquid reservoir 45 to the 43 influent L of ink chamber.During piezoelectric element 42 dilatancies, the pressure of ink chamber 43 increases, from nozzle 41 ejection liquid L.In addition, the deformation velocity of the frequency shift may command piezoelectric element 42 by applying voltage.That is, by the ejection condition that apply voltage control liquid L of control to piezoelectric element 42.

On the other hand, ink jet type blowoff shown in Figure 3 has capping unit 33 and clearing cell 35.Capping unit 33 is used to prevent an ink ejection face 31P drying of 31, covers ink ejection face 31P when 30 standbies of ink jet type blowoff.Clearing cell 35 is the deposits that are used to remove on 31 the nozzle, thus the parts of inlet nozzle inside.Clearing cell 35 is carried out wiping for the pollutant of removing the ink ejection face 31P on 31 to ink ejection face 31P.

＜the second execution mode 〉

Fig. 5 and Fig. 6 represent the manufacture method of the semiconductor film of second mode of the present invention.In the present embodiment, also be the example explanation with the thin-film transistor.In the present embodiment, it is characterized in that except that semiconductor film that gate electrode also forms by configuration and the dry liquid that comprises conductive of material.

(semiconductor film formation operation)

At first, as Fig. 5 (A) with (B), configuration comprises the drop 54 of semi-conducting material on dielectric film 52, makes it dry and obtain semiconductor film 56.The 6A-6A line among two figure and the sectional view of 6B-6B line are represented at Fig. 6 (A) with (B).Dielectric film 52 is layered on the substrate 50 of glass substrate etc.Dielectric film formation operation, droplet configuration operation, semi-conducting material are separated out operation, are undertaken by the method identical with first execution mode, omit explanation.

(gate electrode formation operation)

Then use Fig. 5 (C) (D) and Fig. 6 (B ')～(D), the operation of the gate electrode of the semiconductor element that is formed for using the semiconductor film of being made by above-mentioned manufacture method is described.The 6C-6C line of Fig. 5 and the sectional view of 6D-6D line are respectively Fig. 6 (C) and (D).For the position relation of expression semiconductor film and gate electrode, omitted gate insulating film 58 among Fig. 5.

At first, use Fig. 6 (B ') to be illustrated in the operation that forms gate insulating film 58 on the semiconductor film 56.Gate insulating film 58 can be a silicon oxide film for example, and silicon oxide film can become embrane method to form by for example electron cyclotron resonance PECVD method (ECR-PECVD method) etc.Shown in Fig. 6 (B), on the gate insulating film 58 that forms by this method, stacked zone and other region generating jumps on semiconductor film 56.Planarized surface is arranged on the gate insulating film 58 when concavo-convex.As flattening method, use for example CMP method or etch-back method.Like this, comprise the drop of conductive material, droplet profile is controlled in moistening more equably expansion easily on gate insulating film 58.In addition, when using sog film in the gate insulating film, sog film absorbs the jump of semiconductor film 56 automatically, can obtain smooth gate insulating film surface.

Then shown in Fig. 5 (C) and 6 (C), configuration contains the drop 60 of gate material on gate insulating film 58.As gate material conductive particle preferably, for example Ag, Au, Cu equal diameter are counted the particulate about nm.These particulates are distributed in the organic dispersing agents such as water or tetradecane, use ink-jet method etc., as droplet configuration on gate insulating film 58.

Shown in Fig. 5 (D) and 6 (D), during dry drop 60, gate material begins to separate out from the drop periphery, obtains the annular grid electrode 62 along the drop profile.The part of gate electrode 62 is configured to cross semiconductor film 56.For the not residual conductive material of drop central portion, can actively control and make gate material concentrate on the drop periphery.About control method, to use and the same method of above-mentioned semiconductor film, explanation here is omitted.

(element formation operation)

Be mask then, inject the impurity element that becomes the alms giver and led, formation source/drain region on semiconductor film 56 with gate electrode 62.Then form interlayer dielectric, with covering gate dielectric film 58 and gate electrode 62, and connect gate insulating film and interlayer dielectric formation contact hole, by in this contact hole, imbedding electric conductor and formation source/drain electrode.The operation of these operations and above-mentioned first execution mode is carried out equally, and explanation is omitted.

According to the method for present embodiment, semiconductor film not only, gate electrode also can form at short notice by droplet configuration and dry such simple procedures.Gate electrode can be below 1 micron width form, be mask implanted dopant formation source/drain region with it, be thin-film transistor below 1 micron thereby can obtain grid length.Long by shortening grid, gate capacitance can be reduced, thereby high performance thin-film transistor can be formed.

＜the three execution mode 〉

The summary of the manufacture method of the semiconductor film of expression Third Way among Fig. 7.In the present embodiment, from making 2 thin-film transistors by the configuration and dry 1 semiconductor film that obtains of drop.

At first, shown in Fig. 7 (A),, on dielectric film 72, form semiconductor film 74 with the method identical with first and second execution modes.Then shown in this figure (B), remove the part of this semiconductor film, obtain semiconductor film 74a and 74b.For removing the part of semiconductor film 74, enumerate for example solvent of additional above-mentioned drop, stripping semiconductor material section and the method for pressing each removal of solvents, or etching method in the place that will remove.The zone of removing does not need the precision than the larger area sub-micron order of magnitude, and therefore can use etching method this is not high-precision especially method, but cheap common method.

After then forming gate insulating film (not shown) and covering semiconductor film 74, form the central portion separately that gate electrode 76a and 76b cross semiconductor film 74a and 74b.The droplet configuration that gate electrode will comprise gate material is on gate insulating film and be dried, by the moulding of closed loop phenomenon.With formation electric conductor membranes such as sputtering methods, also can form, but, form the gate electrode of width easily with sub-micron order of magnitude according to the closed loop phenomenon by patterning.The patterning of gate electrode can be undertaken by supplying with method and the etching method that acid drop stripping electrode removes.At this moment, do not need the precision of the sub-micron order of magnitude in removing operation, therefore using etching method this is not high-precision especially method but the method for cheap common method yet.

Then, inject the impurity element that becomes the alms giver and led, formation source/drain region 78a～78d with gate electrode 76a and 76b as mask.Then form interlayer dielectric (not shown) with covering grid electrode 76a, 76b and gate insulating film (not shown) connect gate insulating film and interlayer dielectric and form contact hole, by imbed electric conductor and formation source/drain electrode 80a～80d in this contact hole.The operation of these operations and above-mentioned first execution mode is carried out equally, and explanation is omitted.

According to the method for present embodiment, available simple procedures obtains 2 semiconductor films that are used for semiconductor element, but high density is made semiconductor device expeditiously.In addition, gate electrode is also made by the closed loop phenomenon, and manufacturing process is simpler, obtains grid length simultaneously and be the semiconductor device below 1 micron.In addition, in the present embodiment, form 2 semiconductor films, but can form the semiconductor film more than 3.

In above-mentioned in addition first to the 3rd execution mode, the drop that comprises semi-conducting material or gate material only disposes 1, carries out drying, has obtained annular membrane, but can dispose a plurality of drops.

Fig. 8 is the key diagram of 2 film forming situations of above drop of explanation configuration.Shown in Fig. 6 (A), separate certain intervals and dispose when comprising the drop of semi-conducting material, shown in this figure (B), by the droplets wet expansion, drop merges, and shown in this figure (C), becomes 1 wire drop.Cause the closed loop phenomenon by dry this wire drop, shown in this figure (D), obtain along the film of the ring-type of the drop periphery of wire.Can obtain the semiconductor film 88 of linearity by this method.In addition, if the part of overlapping each drop and dispose each drop in the present embodiment then merges 2 above drops by each droplets wet expansion.Thus, droplet profile can be done all changes, thereby the freedom shape of the semiconductive thin film that obtains improves.For example, by linearity and put and merge a plurality of drops, can obtain the wire drop.Cause closed loop with the wire drop, then when its periphery is separated out semi-conducting material, can obtain the semiconductor film of linearity of the width of the sub-micron order of magnitude.In addition, except that whole drops being fused to 1 big drop, can also be by merging the drop more than 2 repeatedly and separating out the semiconductor film that semiconductor film obtains linearity at its periphery.

＜the four execution mode 〉

Fig. 9 and Figure 10 are the key diagrams of the method for manufacturing thin film transistor of expression first execution mode of the present invention.Thin-film transistor with the present embodiment manufacturing is the top gate type thin film transistor T shown in Figure 11 (B).Thin-film transistor T has the channel region 424 that is provided with on semiconductor film, corresponding to the source/drain region 424 of channel region 424 with through gate insulating film 416 and channel region 424 opposed gate electrodes 420.

(semiconductor film formation operation)

Fig. 9 (A) is illustrated in the state that forms semiconductor film 414 on the dielectric film 412 that forms on the substrate 410.Dielectric film 412 is formed on the substrate 410 that insulating material such as glass constitutes.In the present embodiment, form silicon oxide film as dielectric film 412.Silicon oxide film can pass through physical vaporous depositions such as for example plasma activated chemical vapour deposition (PECVD method), rpcvd method (LPCVD method), sputtering method etc. and film forming.In addition, can use fluent material, as the dielectric film (sog film) of application type.

In the present embodiment, form silicon fiml as semiconductor film 414.Silicon fiml is by CVD method or PVD methods formation such as sputtering method, vapour deposition method such as APCVD method, LPCVD method, PECVD methods.Perhaps, can be same with the formation method of the gate electrode that uses in the method for manufacturing thin film transistor of the invention described above, use the closed loop phenomenon to form silicon fiml.

When utilizing the closed loop phenomenon, the drop of configuration packet material makes the periphery of this drop be positioned at the zone that forms silicon fiml.Again can be according to a plurality of drops that comprise silicon materials of shape configuration of silicon fiml, the periphery of the droplet profile that obtains when these drops merge is separated out silicon fiml.In addition, can be same with the formation method of gate insulating film of the present invention, improve the operation of the silicon fiml material concentration of drop periphery, after silicon fiml forms, remove a part of operation, provide heat or luminous energy to improve crystalline operation the semiconductor film that forms.

Forming under the situation of silicon fiml with the LPCVD method, making substrate temperature is about 400 ℃～700 ℃, is that raw material is to 500 ℃ of left and right sides deposit silicon about 100 ℃ at substrate temperature with disilane (Si2H6) etc.When using sputtering method, substrate temperature is from about the room temperature to 400 ℃.Like this, the silicon fiml initial condition of deposition mostly is all states such as noncrystalline, mixed crystal matter, microcrystalline or docrystalline, but can be arbitrary state.The thickness of silicon fiml is that 20nm is suitable to about 100nm being used under the transistorized situation of semiconductor film.Deposited semiconductor film is provided heat energy and comes crystallization.In this specification, so-called " crystallization " is not only amorphous semiconductor film crystallization, also comprises the crystallization of docrystalline and microlitic semiconductor film.The crystallization of semiconductor film can use the method for laser irradiating method and solid state growth, but is not limited to this.

(dielectric film formation operation)

Use Fig. 9 (B) and the formation operation of gate insulating film 416 (C) is described.Forming gate insulating film 416, to cover semiconductor film 414 and dielectric film 412, for example is silicon oxide film.Silicon oxide film can become embrane method to form by for example electron cyclotron resonance PECVD method (ECR-PECVD method), PECVD method, aumospheric pressure cvd method (APCVD method) or Low Pressure Chemical Vapor Deposition (LPCVD method) etc.The gate insulating film 416 of Xing Chenging produces jump in zone stacked on the semiconductor film 414 and between area part stacked on the dielectric film 412, the plane unevenness shown in Fig. 1 (B) like this.Supply with thereon when covering the drop of conductive material, can not even moistening expansion, can not separate out conductive material and obtain gate electrode in the position of hope.Therefore, shown in Fig. 9 (C), before configuration comprises the drop of conductive material, planarization gate insulating film 416.Planarization can be undertaken by cmp (CMP) or etching method.

Gate insulating film also can use spin coating, by the hafnium and the SOG formation of coating liquid.Under the situation by fluent material coating, only obtain smooth surface by painting process, thus dielectric film not carry out planarization after forming also passable.Film that can stacked spin-coating method forms on the gate insulating film that forms with PECVD method etc.But by spin-coating method stacked film planarized surface.

(droplet configuration operation)

Then shown in Fig. 9 (D), configuration contains the drop 418 of conductive material on dielectric film 416.As conductive material, can use diameter for example to count Ag, Au, metal microparticles such as Cu, Ni about nm, for example Ag colloid China ink etc. is suitable.These metal microparticles are distributed in the organic dispersing agents such as tetradecane, supply with as drop.

As the method for configuration drop 418 on dielectric film 416, can enumerate the method for using micro pipette, little sprinkling, ink-jet etc., but the ink ejecting method that can carry out correct especially patterning suits.Ink-jet method uses ink jet type blowoff described later to carry out.

The plane graph of Figure 10 (A) expression droplet configuration operation.The sectional view along the IXD-IXD line among Figure 10 (A) is Fig. 9 (D).Among Figure 10 (A), for the position relation of clear and definite semiconductor film 414 and drop 418 has been omitted gate insulating film 416.Drop 418 is configured to periphery and channel region is opposed, and the part of its periphery arc is crossed near semiconductor film 414 central authorities.

During the configuration drop, by the wettability on control gate dielectric film 416 surfaces, it is mutually opposed with channel region to be configured to drop 418 peripheries, and promptly the periphery of drop 418 crosses near semiconductor film 414 central authorities.The control use of a wettability for example end has the compound that the functional group, the other end that form SAMs on the gate insulating film surface have lyophobicity functional group, forms monomolecular film on the gate insulating film surface and carries out.Except that the zone that forms gate electrode, by forming this SAM film, the drop that comprises conductive material moves to the part that does not form the SAM film, and drying is separated out conductive material there.

(conductive material is separated out operation)

On dielectric film 416, in the drop 418 of configuration, cause above-mentioned closed loop phenomenon, form the ring-type conductive film 420 of following the drop profile.

Express drop bone dry, conductive material among Fig. 9 (E) and separate out, form the state of ring-type conductive film 420 along drop periphery shape.The plane graph that Figure 10 (B) expression conductive material is separated out operation.The sectional view of the IXE-IXE line in Figure 10 (B) is represented in Fig. 9 (E).Conductive film 420 forms the ring-type of width below 1 micron, the substantial middle that is configured to cross semiconductor film 414.

In addition, during drop 418 dryings, may be controlled to the conductive material concentration that improves the drop periphery.For example, regulate the temperature of insulated substrate, or, in drop, produce convection current, can effectively conductive material be moved to periphery by on temporary transient dry conductive film, spraying vaporized state or the viscosity that drop is controlled drop once more.So, conductive material can not remain in the central portion of conductive film 420, can separate out conductive material by the thin ring-type of width.After conductive material is separated out, can condense metal microparticle, thereby can improve the conductivity of film heat-treating on the conductive film that obtains.

(source/drain region forms operation))

As Figure 11 (A) shown in, be the impurity element that mask injects to be become the alms giver and led then, carry out so-calledly mating the ion injection certainly with gate electrode 420, thus on semiconductor film 414 formation source/drain region 422 and active region 424.For example, inject phosphorus (P), afterwards, the energy density that XeCl excimer laser is adjusted into about 400mJ/cm2 is shone the activated impurity element, thereby form N type thin-film transistor as impurity element.In addition, substitute laser radiation, the activation of impurity element is carried out in the heat treatment that can carry out about 250 ℃～400 ℃.

As mentioned above, gate electrode 20 its width are less than 1 micron, so by being that mask forms source/drain region with it, can obtaining grid length and be the semiconductor element of the sub-micron order of magnitude.

Like this, in the present embodiment, just the conductive film with sub-micron order of magnitude width can be formed desirable shape, just can be used as gate electrode without this conductive film of patterning with configuration and its dry such simple procedures of the liquid that comprises conductive material.Constitute according to this, can be simply and form the long very short and high integrated semiconductor element of high-performance of grid at an easy rate, this is very suitable.

(droplet ejection apparatus)

Above-mentioned each drop is by the formation of gushing out from the ink jet type blowoff.The structure of ink jet type blowoff and ink gun uses Fig. 3 and Fig. 4 to be illustrated in the first embodiment, and explanation here is omitted.

＜the five execution mode 〉

As 12 and Figure 13 represent the thin-film transistor of second execution mode of the present invention.Sectional view along the XIII-XIII line of Figure 12 is Figure 13.

As shown in figure 13, the thin-film transistor of present embodiment forms the what is called " double grid transistor npn npn " of 2 gate electrode 463a and 463b between source/drain region 464a and 464b.The transistor of this structure has the low feature of so-called leakage current, on the whole as 1 transistor.From Figure 12 and Figure 13 as can be known, gate electrode 463a and 463b are respectively the part of 1 ring-type conductive membrane 463.

This semiconductor device is by in the method for manufacturing thin film transistor of the invention described above, and the droplet configuration that will comprise conductive material becomes its periphery to arrive on the position that should form gate electrode 463 to form.Perhaps, the contraction of the drop in the process that can see drying again, the droplet configuration that will comprise conductive material is on than bigger position, the position that should form gate electrode 463.For example, dispose drop in the semiconductor film 464, make it cover the remainder except that the zone that should form source/drain region 464a and 464b that begins from the semiconductor film two ends.

Like this, can on the position of hope, form 2 gate electrodes by the drop that disposes 1 conductive material, easy the to be cheap operation that makes its drying.The gate electrode that obtains can be the width of the sub-micron order of magnitude, so do not need patterning after this, also can reduce the gate capacitance of semiconductor device.When grid quantity increased, electric current also increased, and its performance improves.Flow through under the situation of same amount electric current, the electric current of per 1 grid is considerably less, thereby can suppress current loss and heating.

In addition, as the 5th execution mode, for example understand the double grid type that forms 2 gate electrodes for 1 source/drain region, but use the formation method of gate electrode of the present invention, can be to 1 source/gate electrode of drain region formation more than 3, become the multiple-grid transistor npn npn, this transistor is also contained among the present invention.

＜the six execution mode 〉

Figure 14 and Figure 15 represent the semiconductor device of the 6th execution mode of the present invention.Sectional view along the XV-XV line of Figure 14 is Figure 15.

The semiconductor device of present embodiment, the semiconductor element that comprise the semiconductor element that contains source/ drain region 472a and 472b, contains source/ drain region 472c and 472d be the thin-film transistor of the dual link that constitutes of totally 2 semiconductor elements.Each gate electrode 474a of the thin-film transistor of dual link shown in Figure 15 and 474b are the part of 1 ring-type conductive membrane 474 shown in Figure 14.The transistor of this dual link can be considered 2 transistors and connects side by side, on the whole as 1 big transistor of grid width (or channel width).

This semiconductor device, by in the method for manufacturing thin film transistor of the invention described above, the droplet configuration that will comprise conductive material promptly with on the opposed position of channel region forms in the position that should form conductive membrane 474.Perhaps, the contraction of the drop in the process that also can see drying, the droplet configuration that will comprise conductive material is on than bigger position, the position that should form gate electrode 474.For example, dispose drop in the semiconductor film 472, make it cover the remainder except that the zone that should form drain region 472a and 472b that begins from the semiconductor film two ends.

Like this, the drop by disposing 1 conductive material, easy the to be cheap operation that makes its drying can be formed for 2 gate electrodes of the thin-film transistor of dual link on the position of hope.The gate electrode that obtains can be the width of the sub-micron order of magnitude, so do not need patterning after this, also can reduce the gate capacitance of semiconductor device.Can form the thin-film transistor of dual link easily, the microfabrication of semiconductor element, densification are also carried out easily.

＜the seven execution mode 〉

The semiconductor device of expression the 7th execution mode of the present invention among Figure 16 and Figure 17.Sectional view along the XVII-XVII line of Figure 16 is Figure 17.

The semiconductor device of present embodiment, the semiconductor element that comprise the semiconductor element that contains leakage/ source region 484a and 484b, contains source/ drain region 484c and 484d be the thin-film transistor of the dual link that constitutes of totally 2 semiconductor elements.As shown in figure 16, each gate electrode 486a and 486b of the thin-film transistor of dual link shown in Figure 17 form by a part of removing 1 ring-type conductive membrane.The transistor of this dual link is considered to carry out different 2 transistors that move and has common source.

This semiconductor device, by in the method for manufacturing thin film transistor of the invention described above, the drop that is configured to comprise conductive material is positioned on the position that should form conductive membrane 486a and 486b and forms.Perhaps, the contraction of the drop in the process that sees drying, the droplet configuration that will comprise conductive material becomes to have larger diameter than the circle that should form conductive membrane 486a and 486b.For example, just can dispose drop in the semiconductor film 484, make it cover the remainder except that the zone that should form source/ drain region 484a and 484b that begins from the semiconductor film two ends.After then separating out conductive material, remove the film of the part of not wanting as gate electrode, obtain gate electrode 486a and 486b by drying process.As the removal method of film, can use the acid solution of supplying with hydrochloric acid, sulfuric acid etc., this acid solution and the conductive membrane of not wanting are come along the method for removing, or peel off the method, etching method etc. of silicon oxide film with fluoric acid.The zone of removing film is not the sub-micron order of magnitude, so etching method is less expensive universal method.

According to present embodiment, the drop by disposing 1 conductive material, easy the to be cheap operation that makes its drying can be formed for 2 gate electrodes of the thin-film transistor of dual link on the position of hope.The gate electrode that obtains can be the width of the sub-micron order of magnitude, so do not need patterning after this, also can reduce the gate capacitance of semiconductor device.Can form the thin-film transistor of dual link easily, the microfabrication of semiconductor element, densification are also carried out easily.

＜the eight execution mode 〉

The semiconductor device of expression the 5th execution mode of the present invention among Figure 18 and Figure 19.Sectional view along the XIX-XIX line of Figure 18 is Figure 19.

As shown in figure 19, the semiconductor device of present embodiment is to possess N channel type MOS transistor T _NWith P channel type MOS transistor T _PComplementary type MOS semiconductor device.Leakage/source region (492a and 492b) and source/drain region (492c and 492d) conductivity type are different, and electrode 496b and P portion and the both sides of N portion conduct.

The 494a of gate electrode separately and the 494b of N channel type MOS transistor and P channel type MOS transistor as shown in figure 18, become the part of a conductivity annular membrane 494.

This semiconductor device in the manufacturing process of complementary type MOS semiconductor device, when forming gate electrode, should form N channel type MOS transistor T _NWith P channel type MOS transistor T _PThe position of gate electrode on configuration comprise the drop of conductive material, make its drying, separate out conductive material and form.

According to present embodiment, by disposing 1 drop, making the simple operation of its drying can form the gate electrode of pair transistor.The gate electrode that obtains can be the width of the sub-micron order of magnitude, so do not need patterning after this, also can reduce the gate capacitance of semiconductor device.

＜the nine execution mode 〉

Figure 20 and 21 is key diagrams of manufacture method of the gate electrode of expression the 9th execution mode of the present invention.Express in the present embodiment and use method of manufacturing thin film transistor of the present invention, make the method for the many channel-types thin-film transistor that comprises 2 thin-film transistors.

(semiconductor film formation operation)

Figure 20 (A) is illustrated in the state that forms semiconductor film 514 on the dielectric film 512 that forms on the substrate 510.Dielectric film 512 is formed on the substrate 510 that insulating material such as glass constitutes.In the present embodiment, form silicon oxide film as dielectric film 512.Silicon oxide film can pass through film forming such as physical vaporous depositions such as for example plasma activated chemical vapour deposition (PECVD method), rpcvd method (LPCVD method), sputtering method, SOG (rotation on glass) method.

In the present embodiment, form silicon fiml as semiconductor film 514.Silicon fiml is by CVD method or PVD methods formation such as sputtering method or vapour deposition method such as APCVD method, LPCVD method, PECVD methods.Forming under the situation of silicon fiml with the LPCVD method, making substrate temperature is about 400 ℃～700 ℃, is the raw material depositing silicon with silane (SiH4), disilane (Si2H6) etc.In the PECVD method with silane (SiH4) but etc. be raw material at substrate temperature be depositing silicon down about 100 ℃ to 500 ℃.Like this, the silicon fiml initial condition of deposition has all states such as noncrystalline, mixed crystal matter, microcrystalline or docrystalline, but can be arbitrary state.The thickness of silicon fiml is that 20nm is suitable to about 100nm being used under the transistorized situation of semiconductor film.Deposited semiconductor film is provided heat energy and comes crystallization.In this specification, so-called " crystallization " is not only amorphous semiconductor film crystallization, also comprises the crystallization of docrystalline and microlitic semiconductor film.The crystallization of semiconductor film can use the method for laser irradiating method and solid state growth, but is not limited to this.

Then, using photoetching process that the semiconductor film that forms is turned to by etched pattern needs shape, obtains silicon fiml 514.

(dielectric film formation operation)

Use Figure 20 (B) and the formation operation of gate insulating film 516 (C) is described.Forming gate insulating film 516 to cover semiconductor film 514 and dielectric film 512, for example is silicon oxide film.Silicon oxide film can become embrane method to form by for example electron cyclotron resonance PECVD method (ECR-PECVD method), PECVD method, aumospheric pressure cvd method (APCVD method), Low Pressure Chemical Vapor Deposition (LPCVD method) etc.The gate insulating film 516 of Xing Chenging produces jump in zone stacked on the semiconductor film 514 and between part stacked on the dielectric film 512, the plane unevenness shown in Figure 20 (B) like this.Supply with thereon when covering the drop of conductive material, can not even moistening expansion, can not separate out conductive material and obtain gate electrode in the position of hope.Therefore, shown in Figure 20 (C), before configuration comprises the drop of conductive material, planarization gate insulating film 516.Planarization can be undertaken by cmp (CMP), etching method.

SOG material and low-K material that gate insulating film also can use spin coating to pass through coating liquid form.Under the situation of fluent material coating, also can make formation even have the substrate of pattern or jump with having an even surface, thus dielectric film not carry out planarization after forming also passable.

(droplet configuration operation)

Then shown in Figure 20 (D), configuration contains the drop 518 of conductive material on dielectric film 516.As conductive material, can use diameter for example to count metal microparticles such as Ag, Au about nm, Cu, for example Ag colloid China ink etc. is suitable.These metal microparticles are distributed in the organic dispersing agents such as tetradecane, supply with as drop.

As the method for configuration drop 518 on dielectric film 516, can enumerate the method for using micro pipette, little sprinkling, ink-jet etc., but the ink ejecting method that can carry out correct especially patterning suits.Ink-jet method uses ink jet type blowoff described later to carry out.

The plane graph of Figure 21 (A) expression droplet configuration operation.The sectional view along the XXD-XXD line among Figure 21 (A) is Figure 20 (D).Among Figure 21 (A), for the position relation of clear and definite semiconductor film 514 and drop 518 has been omitted gate insulating film 516.

In the present embodiment, form 2 thin-film transistors, the formation that the gate electrode of these 2 thin-film transistors connects for using semiconductor film 514.Configuration drop 518 makes the periphery of drop 518 cross semiconductor film 514 2 times.Say that more specifically the diameter of drop 518 is the distance between the position of gate electrode that should form 2 thin-film transistors.The contraction of drop in the process that perhaps sees drying, setting has than the large diameter slightly drop of this distance.

(conductive material is separated out operation)

On dielectric film 516, in the drop 518 of configuration, cause above-mentioned closed loop phenomenon, form the ring-type conductive film 520 of following drop 518 profiles.

Express drop bone dry, conductive material among Figure 20 (E) and separate out, form the state of ring-type conductive film 520 along droplet profile.The plane graph that Figure 21 (B) expression conductive material is separated out operation.The sectional view of the XXE-XXE line in Figure 21 (B) is Figure 20 (E).Conductive film 520 forms the ring-type of width below 1 micron, is configured to 2 times and crosses semiconductor film 514.

During drop 518 dryings, may be controlled to so that improve the conductive material concentration of drop periphery.For example, regulate the temperature of insulated substrate, or, in drop, produce convection current, can effectively conductive material be moved to periphery by in a single day dry conductive film, spraying vaporized state and the viscosity that drop is controlled drop once more.So, semi-conducting material can not remain in the central portion of conductive film 520, can separate out semi-conducting material by the thin ring-type of width.After conductive material is separated out, to heat-treating cohesion metal microparticle, thereby the conductivity of raising film on the conductive membrane that obtains.

(source/drain region forms operation)

Shown in Figure 22 (A), be the impurity element that mask injects to be become the alms giver and led then, carry out so-called from mating the ion injection with regional 520a and 520b in the gate electrode 520.

For example, inject phosphorus (P) as impurity element, afterwards, the energy density that XeCl excimer laser is adjusted into 400mJ/cm2 shines the activated impurity element, thereby forms N type thin-film transistor.In addition, substitute laser radiation, the activation of impurity element is carried out in the heat treatment that can carry out about 250 ℃～400 ℃.

By being mask implanted dopant element, form regional 514a, 514b and 514c with regional 520a and 520b.Zone 514a is as comprising the drain region of the thin-film transistor of gate electrode 520a, regional 514c as the drain region that comprises the thin-film transistor of gate electrode 520a.Zone 514b is as thin-film transistor that comprises gate electrode 520a and the source region that comprises the thin-film transistor of gate electrode 520b.

Then shown in Figure 22 (B), at gate insulating film 516, gate electrode 520a and formation dielectric film 517 above the 520b.For example available PECVD method forms the silicon oxide film of about 500nm.Then, open the contact hole that arrives source region 514b, drain region 514a and 514c in dielectric film 516 and 517, the contact hole periphery with dielectric film 517 in contact hole forms source/drain electrode 528.Source/drain electrode 528 can form by for example sputtering method deposition of aluminum.In dielectric film 517, open the contact hole of striding gate electrode 528, form gate electrode terminal electrode (not shown).

2 thin-film transistors of Xing Chenging as mentioned above, gate electrode 520a separately and 520b become the part of 1 ring-type conductive membrane 520.This transistor acts on as 2 transistors of common source zone and gate electrode.

In the present embodiment, just can make described 2 transistors by disposing 1 drop and its dry so easy and cheap operation that comprises conductive material.Gate electrode 520 its width that this method obtains are less than 1 micron, so after this without patterning.By being that mask forms source/drain region and can obtain the semiconductor element that grid length is the sub-micron order of magnitude with this gate electrode, thereby can become the little high performance thin-film transistor of gate capacitance.According to the method for present embodiment, can carry out small processing, the densification of semiconductor element easily.

(droplet ejection apparatus)

Above-mentioned each drop is by forming from the ejection of ink jet type blowoff.The formation of ink jet type blowoff and ink gun uses Fig. 3 and Fig. 4 to be illustrated in the first embodiment, and explanation here is omitted.

＜the ten execution mode 〉

The semiconductor device of expression the tenth execution mode of the present invention among Figure 23 (A) and 23 (B).Use method of manufacturing thin film transistor of the present invention in the present embodiment, make the thin-film transistor of dual link.The thin-film transistor of dual link is meant that 2 thin-film transistors are connected in series.Sectional view along the XXIIIB-XXIIIB line of Figure 23 (A) is Figure 23 (B).

In the manufacture method of present embodiment, semiconductor film formation operation, dielectric film formation operation, droplet configuration operation, conductive material are separated out operation, carry out with the described method of above-mentioned first execution mode or based on this method, and explanation here is omitted.

(gate electrode separation circuit)

In the present embodiment,, after ring-type is separated out conductive membrane on the dielectric film, remove its part, opposed each gate electrode of channel region separately of the thin-film transistor of separation and dual link by the closed loop phenomenon.The state plane figure that separates is Figure 23 (A).The gate electrode 566a of the channel region 563a of the thin-film transistor of opposed dual link and 563b and 566b are island separated from one another shown in Figure 23 (A) respectively.

As the removal method of film, can use the acid solution of supplying with hydrochloric acid, sulfuric acid etc., this acid solution and the conductive membrane of not wanting are come along the method for removing, or peel off the method, etching method etc. of silicon oxide film with fluoric acid.The zone of removing film is not the sub-micron order of magnitude, so etching method is less expensive universal method.

(source/drain region forms operation)

Shown in Figure 23 (A), be the impurity element that mask injects to be become the alms giver and led then, carry out so-called from mating the ion injection with gate electrode 566a and 566b.

For example, inject phosphorus (P), afterwards, XeCl excimer laser is adjusted into 400mJ/cm as impurity element ²About energy density shine the activated impurity element, thereby form N type thin-film transistor.In addition, substitute laser radiation, the activation of impurity element is carried out in the heat treatment that can carry out about 250 ℃～400 ℃.

By being mask implanted dopant element, form regional 564a, 564b and 564c with gate electrode 566a and 566b.Zone 564a is used as the source region of the thin-film transistor that comprises gate electrode 566b simultaneously as comprising the source region of the thin-film transistor of gate electrode 566a, regional 564b as the drain region that comprises the thin-film transistor of gate electrode 566a.And regional 564c acts on as the drain region of the thin-film transistor that comprises gate electrode 566b.

Then shown in Figure 23 (B), at gate insulating film 516, gate electrode 566a and formation dielectric film 517 above the 566b.For example available PECVD method forms the silicon oxide film of about 500nm.Then, open the contact hole that arrives regional 564a, 564b and 564c in dielectric film 516 and 517, the contact hole periphery with dielectric film 517 in contact hole forms source/drain electrode 568.Source/drain electrode 568 can form by for example sputtering method deposition of aluminum.In dielectric film 517, open the contact hole of striding gate electrode 566a and 566b, form gate electrode terminal electrode (not shown).

In the present embodiment, the gate electrode of 2 islands separated from one another that the drop by disposing 1 conductive material and its dry so easy and cheap operation just can form dual link on the position of hope film crystal is effective.The gate electrode that obtains is the width of the sub-micron order of magnitude, so after this without patterning, can reduce the gate capacitance of semiconductor device.Owing to form the thin-film transistor of dual link easily, can carry out microfabrication, the densification of semiconductor element easily.

＜the ten one execution mode 〉

Figure 24 represents the semiconductor device of the 11 execution mode of the present invention, represents the sectional view of the XXV-XXV line of semiconductor device shown in Figure 24 among Figure 25.In addition, Figure 26 represents the equivalent circuit diagram of the semiconductor device of present embodiment.The semiconductor device of present embodiment comprises 4 thin-film transistor T1～T4, and the source electrode 672a of each thin-film transistor T1～T4,672c, 672e and drain electrode 672b, 672d be shared (with reference to Figure 24 and Figure 26) respectively.On the other hand, form gate electrode 674a～674d of each thin-film transistor T1～T4, become the part of 2 ring-type conductive membranes (the following ring-type conductive membrane that cries) 674 that periphery forms as shown in figure 24 with overlapping.Such transistor is many channel transistors that raceway groove is connected in parallel, on the whole the following formation of semiconductor device that should constitute as 1 big transistor of channel width.

As mentioned above, at first, on the dielectric film 67 that forms on the substrate 670, use formation such as CVD method, PVD method to become the semiconductor film 675 (with reference to Figure 25) of semiconductor layer.Form a plurality of channel regions on this semiconductor layer subsequently.Cover the semiconductor film 675 and the dielectric film 671 that form like this by sog film and form the gate insulating film 673 that has an even surface.And, use ink jet type blowoff (with reference to Fig. 4) order to drip on this gate insulating film 673 and comprise the drop of conductive material, form a plurality of ring-type conductive membranes (conductive pattern) 674.Specifically, at first, the first drop periphery that becomes to comprise conductive material of dripping is such, opposed each channel region (zone of clamping between source region and the drain region).This drop that drips is because periphery is faster than the rate of drying of central portion, produces from the drop central portion to the flowing of periphery, and conductive material arrives periphery.Consequently form the ring-type conductive membrane 674 (for example ring-type conductive membrane in left side shown in Figure 24) of following the first drop profile.

After the ring-type conductive membrane 674 of corresponding first drop formed, second liquid that then drips made it comprise opposed each channel region of a part of the part of ring-type conductive membrane 674 (in other words, separately a part is overlapping between each drop) and periphery.Thus, form the ring-type conductive membrane 674 (for example ring-type conductive membrane on right side shown in Figure 24) of following the second drop profile.By forming this 2 ring-type conductive membranes 674, become the gate electrode 674a～674d of the part of each conductive membrane 674.Like this, can be by the position of the ormal weight that only staggers a plurality of drops that comprise conductive material that drip, and easy the to be cheap operation that makes its drying just can be on desired location forms 4 with the width of the sub-micron order of magnitude and connects 4 effective gate electrode 674a～674d of film crystals.4 gate electrodes form the part of 2 ring-type conductive membranes, therefore the structure for being electrically connected to each other.

Afterwards, with the above-mentioned gate electrode 674a～674d that forms is that mask suitably injects the ion of coupling certainly that becomes the alms giver or led, thereby on semiconductor layer, form source region 675a, 675c, 675e and drain region 675b, a plurality of channel regions (with reference to Figure 25) of clamping between 675d and each source region and each drain region.Through the operation of above explanation, the many channel-types semiconductor device that comprises 4 thin-film transistors that the grid that can obtain having the sub-micron order of magnitude shown in Figure 25 are long, comprise the gate electrode of the continuous shape that connects each other.In addition, 4 thin-film transistors have been described in the present embodiment, but can have been 3 thin-film transistors or 5 thin-film transistors.At this moment, by number of drops that increases configuration or the configuration of adjusting source region and drain region, can form such thin-film transistor.

In addition, more than in the explanation, example is depicted as the situation that forms 4 thin-film transistors and form 2 ring-type conductive membranes 674, but the number of this ring-type conductive membrane 674 can be corresponding to the reasonable quantity change (with reference to Figure 27) of the thin-film transistor that should form n (n 〉=2) connection.In addition, the configuration space of each ring-type conductive membrane 674 and its diameter etc. also can be corresponding to suitably changes such as the designs that should form thin-film transistor.

＜the ten two execution mode 〉

The semiconductor device of expression the 12 execution mode of the present invention among Figure 28, the equivalent circuit diagram of the semiconductor device of expression present embodiment among Figure 29.The semiconductor device of present embodiment is the semiconductor device (with reference to Figure 29) with structure that the thin-film transistor T1～T4 of the gate electrode that island each other separates is connected in series.Gate electrode 674a～the 674d that forms this each thin-film transistor T1～T4 forms by a part of removing front 2 ring-type conductive membranes 674 shown in Figure 24.Formation method about each gate electrode 674a～674d describes, and at first, as the 3rd execution mode was illustrated, a plurality of drops that comprise conductive material that drip formed 2 ring-type conductive membranes 674.

Then, remove the film (be the part of opposed channel region beyond film) of the part of not wanting as gate electrode, obtain gate electrode 674a～674d from these ring-type conductive membranes 674.As the removal method of film, can use the acid solution of supplying with hydrochloric acid, sulfuric acid etc., this acid solution and the conductive membrane of not wanting are come along the method removed and peel off the method, etching method etc. of silicon oxide film with fluoric acid.The zone of removing this conductive membrane is not the sub-micron order of magnitude, so etching method is less expensive universal method.After removing conductive membrane not, can form gate electrode pad (pad) 676 (with reference to Figure 28) as required.

In addition, in the present embodiment, 4 thin-film transistors that connect have been described, but can have been 3 thin-film transistors that connect or 5 thin-film transistors that connect.At this moment, can increase the number of drops of configuration or the configuration of adjustment source region and drain region and form this thin-film transistor.

＜the ten three execution mode 〉

The semiconductor device of expression the 13 execution mode of the present invention among Figure 30.The semiconductor device of present embodiment has and the identical circuit structure of semiconductor device shown in the Figure 28 of front, and the formation method of gate electrode is different with this semiconductor device.The following describes the gate electrode formation method of present embodiment.

Figure 31 is the figure in order to the gate electrode formation method of explanation present embodiment.

At first shown in Figure 31 (A), dripping comprises first drop of conductive material, and forms the ring-type conductive membrane 674 of following the first drop profile by drying.Second liquid that then drips makes it comprise the part of this ring-type conductive membrane 674 (with reference to Figure 31 (B)).Particle diameter, contact angle, concentration, first drop of the conductive material that comprise by dispersant, rate of drying, second drop of controlling second drop this moment drips the back to the time interval that second drop drips, and disperses or dissolve the part of the ring-type conductive membrane 674 (i.e. the ring-type conductive membrane that is formed by first drop) that second drop comprises again.Like this, disperse or dissolve again ring-type conductive membrane 674 that second drop comprises again after, by dry second drop etc., form the ring-type conductive membrane 674 of following the second drop profile shown in Figure 31 (C).

After corresponding gate electrode number is carried out a series of operation of above-mentioned explanation repeatedly, remove the film (with reference to the tenth execution mode) of the part of not wanting as gate electrode, obtain gate electrode 674a～674d shown in Figure 30 from each calculating (surveying) conductive membrane 674.Can just can form a plurality of gate electrodes by easy the to be cheap operation that makes its drying with thin-film transistor of sub-micron order of magnitude width.In the present embodiment, same with the tenth execution mode, part is removed conductive membrane, makes each gate electrode 674a～674d independent, but does not remove conductive membrane, and it is also passable to connect each gate electrode.

＜the ten four execution mode 〉

The formation of the semiconductor device of expression the 14 execution mode of the present invention among Figure 32.The semiconductor device of present embodiment has the semiconductor device identical circuit formation shown in Figure 30 with the front, only the shape difference of gate electrode.Specifically, gate electrode 674a～674d shown in Figure 32 is roughly linearity.The following describes this linearity gate electrode formation method.

Figure 33 is the figure in order to the gate electrode formation method of explanation present embodiment.

In the present embodiment, for obtaining the roughly gate electrode of linearity, drip this drop continuously (with reference to Figure 33 (A) with the time interval faster than the droplet drying time that comprises conductive material.Specifically, the dry back of the drop that drips earlier (for example drop of going up most shown in the dotted line among Figure 33 (A)) before this drop periphery forms ring-type conductive membrane, with the drop that drips earlier next drop (for example Centromedian drop shown in the dotted line among Figure 33 (A)) that drips with overlapping.Each drop that drips merges by moistening expansion, finally obtains shown in Figure 33 (A), the conductive membrane of 2 continuous a pair of roughly linearities of each drop end (below be the linearity conductive membrane).

Like this, form 2 a pair of linearity conductive membranes 674 (the gate electrode 674a shown in corresponding Figure 33 (A), in the time of 674b), with above-mentioned a plurality of drops that drip equally, with form new 2 to linearity conductive membrane 674.But, in the present embodiment, the configuration space w1 of each gate electrode (with reference to Figure 33 (C)) sets narrowly than the interval w2 (with reference to Figure 33 (C)) of 2 a pair of linearity conductive membranes 674, therefore can drip drop continuously to comprise the part of the linearity conductive membrane 674 that has formed.

Its result shown in Figure 33 (C), obtains gate electrode 647a～674d that double-deck 2 pair of straight wire conductive membranes that form 674 constitute.By the method for last explanation,, and make its dry so easy to be cheap operation can form the gate electrode of the thin-film transistor of a plurality of width with sub-micron order of magnitude by a plurality of drops that comprise electric conducting material that drip.In addition, in the present embodiment, the configuration space w1 of each gate electrode sets narrowlyer than the interval w2 of 2 a pair of linearity conductive membranes 674, but the configuration space w1 of each gate electrode can certainly be set widelyer than the interval w2 of 2 a pair of linearity conductive membranes 674.

In addition, in the above-mentioned execution mode, semiconductor regions is expressed 1 continuous zone, but corresponding to a plurality of transistorized each can form the zone, island respectively.At this moment, each transistorized source and drain region are independent, compare with the situation of forming circuit, have more Suresh Kumar.But the configuration clamping channel region of source and drain region is opposite each other in each execution mode.

＜the ten five execution mode 〉

The 15 execution mode of the present invention relates to the electro-optical device that comprises the semiconductor device made by method of manufacturing thin film transistor of the present invention etc.As an example of electro-optical device, enumerate organic EL (electroluminescence) display unit.

Figure 34 is the figure of formation of the electro-optical device 100 of explanation the 4th execution mode.The electro-optical device of present embodiment (display unit) 100 comprises: comprise the pixel-driving circuit of thin-film transistor T1～T4 by rectangular configuration and the circuit substrate (active-matrix substrate) that constitutes on substrate; Drive and luminous luminescent layer by pixel-driving circuit; The pixel-driving circuit that constitutes to comprising each thin-film transistor T1～T4 provides the driver 101 and 102 and constitute of drive signal.Driver 101 is through scan line Vsel and light emitting control line Vgp and provide drive signal to each pixel region.Driver 102 provides drive signal through data wire Idata and power line Vdd to each pixel region.Carry out electric current program for each pixel region by gated sweep line Vsel and data wire Idata, may command illuminating part OELD's is luminous.Constitute each thin-film transistor T1～T4 of pixel-driving circuit and the manufacture method formation that driver 101,102 is suitable for above-mentioned first or second execution mode.

In addition, as an example of electro-optical device organic EL display has been described, but can have made various electro-optical devices such as liquid crystal indicator in addition equally.

Then explanation is suitable for electro-optical device 100 of the present invention and the various electronic instruments of formation.Figure 35 is the figure that adopts the electronic instrument example of electro-optical device 100.Figure 35 (A) is the suitable example to mobile phone, and this mobile phone 230 has antenna part 231, audio output unit 232, sound input part 233, operating portion 234 and electro-optical device of the present invention 100.Like this, electro-optical device of the present invention can be used as display part.Figure 35 (B) is the suitable example to video camera, and this video camera 240 has and is subjected to picture portion 241, operating portion 242, sound input part 243 and electro-optical device of the present invention 100.Like this, electro-optical device of the present invention can be used as view finder or display part.Figure 35 (C) is the suitable example to portable personal computer (so-called PDA), and this computer 250 has camera section 251, operating portion 252 and electro-optical device of the present invention 100.Electro-optical device of the present invention like this can be used as display part.

Figure 35 (D) is the suitable example to head mounted display, and this head mounted display 260 has belt 261, optical system accommodation section 262 and electro-optical device of the present invention 100.Electro-optical device of the present invention like this can be used as image and shows the source.In addition, electro-optical device 100 of the present invention is not limited to above-mentioned example, applicable to all electronic instruments of the display unit that can adopt organic EL display, liquid crystal indicator etc.For example, the view finder, pocket TV, electronic notebook, electric light telegraph board, exploitation that can be used to picture unit, digital camera with Presentation Function in addition flexibly is with display etc.

Figure 36 (A) is the suitable example to television set, and this television set 300 has electro-optical device 100 of the present invention.For the monitor apparatus that is used for personal computer etc., same applicable electro-optical device of the present invention.Figure 36 (B) is that this furling type television set has electro-optical device 100 of the present invention to the suitable example of furling type (roll up) television set.

The manufacture method of the respective embodiments described above can be used for the manufacturing of the various instruments except that the electro-optical device manufacturing.For example, can make FeRAM (ferroelectric RAM), SRAM, DRAM, NOR type RAM, NAND type RAM, unsteady gate nonvolatile semiconductor memory, magnetic ram various memories such as (MRAM).Be suitable in the noncontact communication of microwave, loaded under the situation of mark (tag) of cheapness of small circuit chip (IC chip) also applicable in manufacturing.

The present invention is not limited to the content of the respective embodiments described above, can carry out all distortion in purport scope of the present invention.For example, in the above-mentioned execution mode,, adopt silicon fiml to be illustrated, but semiconductor film is not limited to this as an example of semiconductor film.In the above-mentioned execution mode, an example of the semiconductor element that forms as using semiconductor film of the present invention use thin-film transistor to be illustrated, but semiconductor element is not limited to this, can form other elements (for example thin film diode etc.).In addition, thin-film transistor of the present invention also can be used as the transistor of integrated circuit except that as the pixel transistor.

Claims (21)

1. method of manufacturing thin film transistor, be possess source region that the above-mentioned channel region of semiconductor film, the channel region that is provided with, clamping is provided with and drain region on above-mentioned semiconductor film, through the method for manufacturing thin film transistor of gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, comprising:

Configuration comprises the operation of the drop of semi-conducting material on substrate;

Make above-mentioned droplet drying produce the closed loop phenomenon, separate out the operation of above-mentioned semi-conducting material at the periphery at least of this drop;

Separate out at the central portion of this drop under the situation of above-mentioned semi-conducting material, the above-mentioned semi-conducting material by removing central portion is to form the operation of above-mentioned semiconductor film.

2. method of manufacturing thin film transistor according to claim 1, wherein

In the operation of the above-mentioned drop of configuration, the above-mentioned drop of configuration more than 2,

In forming the operation of above-mentioned semiconductor film, the periphery of the droplet profile that above-mentioned semiconductor film material obtains when above-mentioned drop more than 2 merges is separated out.

3. method of manufacturing thin film transistor according to claim 1 and 2 wherein also comprises:

After the operation of the above-mentioned drop of configuration, by regulating the temperature of substrate, or by on temporary transient dry semiconductor film, spraying vaporized state or the viscosity that drop is controlled drop once more, in drop, produce convection current, make semi-conducting material move to periphery effectively, thereby improve the operation of the above-mentioned semiconductor film concentration of material of drop periphery in the above-mentioned drop.

4. method of manufacturing thin film transistor according to claim 1 wherein also comprises:

After the operation that forms above-mentioned semiconductor film, remove the part of above-mentioned semiconductor film to cut apart the operation of above-mentioned semiconductor film; With

Form above-mentioned gate electrode with the operation of the corresponding above-mentioned semiconductor film of cutting apart respectively.

5. method of manufacturing thin film transistor according to claim 1 is supplied with heat or luminous energy to above-mentioned drop in the operation that forms above-mentioned semiconductor film.

6. method of manufacturing thin film transistor according to claim 1, the operation that also is included in the above-mentioned semiconductor film of formation is afterwards by injecting impurity the operation that above-mentioned semiconductor film forms above-mentioned source region and above-mentioned drain region.

7. method of manufacturing thin film transistor, be possess the source region of the channel region that on semiconductor film, is provided with, corresponding above-mentioned channel region and drain region, through the method for manufacturing thin film transistor of gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, comprising:

The droplet configuration operation, by the wettability on control gate dielectric film surface, it is mutually opposed with above-mentioned channel region so that comprise the periphery of drop of conductive material to dispose above-mentioned drop; With

Separate out operation, make above-mentioned droplet drying produce the closed loop phenomenon, above-mentioned conductive material is separated out at the periphery at least of this drop, and separate out at the central portion of this drop under the situation of above-mentioned conductive material, form the conductive film that is used as above-mentioned gate electrode by the above-mentioned conductive material of removing central portion.

8. method of manufacturing thin film transistor according to claim 7, wherein

A plurality of above-mentioned channel regions are arranged on the above-mentioned semiconductor film of 1 above-mentioned thin-film transistor, one or more drops of configuration make that the periphery of above-mentioned drop is mutually opposed with above-mentioned a plurality of channel regions in above-mentioned droplet configuration operation, form a plurality of gate electrodes that are opposite to above-mentioned a plurality of channel regions respectively in the operation above-mentioned separating out.

9. method of manufacturing thin film transistor according to claim 8, wherein

In the above-mentioned removal operation of separating out the part of the above-mentioned conductive material that possesses the ring-type that removal separates out at above-mentioned drop periphery in the operation,

Above-mentioned removal process interruption is opened the above-mentioned conductive material of above-mentioned ring-type, to form a plurality of gate electrodes that are opposite to above-mentioned a plurality of channel regions respectively.

10. method of manufacturing thin film transistor according to claim 7, wherein

In above-mentioned droplet configuration operation, the drop of configuration more than 2,

Separate out in the operation above-mentioned, the periphery at least of the droplet profile that above-mentioned conductive material obtains when above-mentioned drop more than 2 merges is separated out.

11. method of manufacturing thin film transistor according to claim 7, comprising:

After above-mentioned droplet configuration operation, by regulating the temperature of substrate, or by on temporary transient dry conductive film, spraying vaporized state or the viscosity that drop is controlled drop once more, in drop, produce convection current, make conductive material move to periphery effectively, thereby improve the operation of the concentration of the above-mentioned conductive material of drop periphery in the above-mentioned drop.

12. method of making two above thin-film transistors, be possess the opposed source region of the above-mentioned channel region of semiconductor film, clamping that has channel region and drain region, through the method for manufacturing thin film transistor of gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, comprising:

The droplet configuration operation, by the wettability on control gate dielectric film surface, configuration comprises the drop of electric conducting material, so that at least a portion of this drop periphery is mutually opposed with the above-mentioned channel region more than 1;

Separate out operation, form above-mentioned gate electrode by only separating out above-mentioned electric conducting material, wherein at the periphery of above-mentioned drop

The above-mentioned gate electrode that forms is connected with at least one other gate electrode separately.

13. method of manufacturing thin film transistor according to claim 12, wherein in above-mentioned droplet configuration operation, the above-mentioned drop of configuration more than 2, the at least a portion that is configured to each drop periphery is opposite to the above-mentioned channel region more than 1, and at least a portion of each drop periphery is overlapping with the periphery of at least 1 other drop.

14. method of making the thin-film transistor more than 2, be possess the opposed source region of the above-mentioned channel region of semiconductor film, clamping that contains channel region and drain region, through the method for manufacturing thin film transistor of gate insulating film and the opposed gate electrode of above-mentioned channel region, it is characterized in that, comprising:

The droplet configuration operation, by the wettability on control gate dielectric film surface, configuration comprises the drop of electric conducting material, so that at least a portion of each drop periphery is mutually opposed with the above-mentioned channel region more than 1;

Separate out operation, form above-mentioned gate electrode by only separating out above-mentioned electric conducting material at the periphery of above-mentioned drop;

Separation circuit, with each gate electrode of opposed above-mentioned channel region respectively form with and the island separated of the opposed gate electrode of other channel regions.

15. method of manufacturing thin film transistor according to claim 14, wherein above-mentioned separation circuit forms above-mentioned gate electrode by a part of removing above-mentioned gate electrode the island of separation.

16. method of manufacturing thin film transistor according to claim 14, wherein each of above-mentioned thin-film transistor all has one group of source region and drain region for the gate electrode of above-mentioned separation each.

17. according to claim 13 or 14 described method of manufacturing thin film transistor, next drop of configuration in the wherein above-mentioned droplet configuration operation, make it on the part of the drop periphery electric conducting material of being separated out of overlapping configuration formerly this part of disperseing this electric conducting material again.

18. according to claim 12 or 14 described method of manufacturing thin film transistor, wherein

Each drop that disposes in the above-mentioned droplet configuration operation further is made up of the sub-drop more than 2 respectively,

Above-mentioned separating out in the operation separated out the periphery at least of the droplet profile that above-mentioned conductive material obtains when above-mentioned sub-drop more than 2 merges.

19. according to claim 12 or 14 described method of manufacturing thin film transistor, wherein the above-mentioned semiconductor film of 1 above-mentioned thin-film transistor forms the island that separates with the above-mentioned semiconductor film of other above-mentioned thin-film transistors.

20. according to claim 7 or 12 described method of manufacturing thin film transistor, wherein, in above-mentioned droplet configuration operation, on above-mentioned gate insulating film, dispose drop in the operation that also is included in the above-mentioned gate insulating film that formation has an even surface on above-mentioned each channel region before the above-mentioned droplet configuration operation.

21. the semiconductor film that a use forms on substrate forms the manufacture method of the semiconductor device of semiconductor element, it is characterized in that, comprising:

Configuration contains the operation of the drop of semi-conducting material on aforesaid substrate; With

Make above-mentioned droplet drying produce the closed loop phenomenon, separate out the operation of above-mentioned semi-conducting material at the periphery at least of this drop;

Separate out at the central portion of this drop under the situation of above-mentioned semi-conducting material, form the operation of above-mentioned semiconductor film by the above-mentioned semi-conducting material of removing central portion.

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