CN100437353C - Preparation method of nano mould in nano-seal technology - Google Patents
Preparation method of nano mould in nano-seal technology Download PDFInfo
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- CN100437353C CN100437353C CNB200410065998XA CN200410065998A CN100437353C CN 100437353 C CN100437353 C CN 100437353C CN B200410065998X A CNB200410065998X A CN B200410065998XA CN 200410065998 A CN200410065998 A CN 200410065998A CN 100437353 C CN100437353 C CN 100437353C
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- multilayer film
- template
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Abstract
The present invention relates to a method for preparing nanometer grade templates in a nanometer seal technique. A multilayer film is firstly prepared and has a multilayer film modulated structure of amorphous silicon (a-Si)/ silicon nitride (SiNx), (a-SiC)/(SiNx), (a-Ge)/(SiNx), Ge/Si, etc. A cross section of a multilayer film sample is processed via slicing, grinding and polishing, and a smooth multilayer film side surface is exposed. After selective corrosion, a nanometer grade embossing template is formed on the cross section of the multilayer film sample. The present invention omits expensive electron beam photoetching devices. The period of a-Si/SiNx multilayer film prepared by a PECVD technique can be accurately controlled to nanometer grades, and the smallest layer thickness can be 2 nm. Therefore, pattern dimensions of the template can be reduced to 2 nm, and the nanometer grade patterns can be generated when the patterns are transferred to a Si piece.
Description
One, technical field:
The present invention relates to a kind of method of semiconductor technology, the preparation method of nanoscale template in the nanometer seal technology especially, the present invention has proposed the new technology that a kind of preparation scale is nano level template from know-why and implementing process two aspects.The template that this technology provides can be applicable to be expected to become the nanometer seal technology of critical process in nano-device preparation of new generation.
Two, background technology:
Photoetching technique is a modem semi-conductor devices, comprises integrated circuit, photoelectric device etc., the critical process of preparation.Along with the raising day by day of microelectronic chip integrated level, the size of its function element is also corresponding to be reduced.Expect the year two thousand twenty, the function element size on the chip will enter below 50 nanometers, i.e. the scope of nanoelectronics, and at this moment classical theory is no longer suitable.Therefore the electron device that begins one's study at nanoscale of people is a nano electron device.Because their principle of work depends on the Quantum Properties of device, its function also will obtain breakthrough raising.The most noticeable single-electron device that surely belongs in nano electron device, it is compared with current microelectronic component, has low-power consumption, the characteristics of fast switching speed and high storage density.Correspondingly photoetching technique has been proposed the requirement that etching precision reaches nanometer scale, obviously the existing conventional photoetching method can not meet the demands.The lithographic method of seeking a kind of low price, high production becomes the main research topic in the current microelectronic.
Development in recent years multiple lithographic method with nano-precision.As scanning beam etching (ScanningElectron Beam Lithography), it utilizes electron beam to expose, and the I of the diameter of electron beam reaches 0.5nm.Up to now the I of this method etches the live width of 10nm.But bit by bit carry out during because of electron beam exposure, the efficient of this method is too low, and output is not high, and is also far from industrial mass production.X ray etching (X-ray lithography) and for example, the gold layer that it utilizes nanoscale in the template produces light intensity difference to the absorption of X ray, thereby exposes etching.Existing report can etch the live width of 20nm.Although this method has high production, golden template preparation and exposure system are present still very expensive.Use scanning tunnel microscope (Scanning Tunneling Microscope) to carry out etching for another example, report the live width that can etch 10nm.But this method is still immature, and still because of apparatus expensive, still in development.
The nanometer seal technology is a kind of technology of new development, comprises two step processes: impression (imprinting) and design transfer (pattern-transfer).In moulding process, a template that is carved with nanostructured by designing requirement is pressed in the special film of the one deck that is deposited on the Si substrate.In pattern transfer processes, with the anisotropic etching method the residual thin film corrosive that is pressed into part is fallen, so just the design transfer that mint-mark is produced has arrived on the Si substrate.Obviously, obtain high-quality imprinted pattern, at first must the high-quality template of preparation.According to the S.Y.Chou group that proposes the nanometer seal technology in the world the earliest, the SiO that they are used
2Nanostructured on the template is made through beamwriter lithography (Electron Beam Lithography), and the nanostructured yardstick on the template can be accomplished 10nm, referring to S.Y.Chou et al.Science
272, 85-87 (1995) and H.Cao, S.Y.Chou et al.Appl.Phys.Lett.
81, 174-176,2002.So this method is not left beamwriter lithography yet.Because the beamwriter lithography apparatus expensive wishes to find the low method for preparing high-quality template of a kind of cost, this is a starting point of the present invention.
Adopt amorphous silicon (a-Si)/silicon nitride (SiN
X) preparation of multilayer film preparation is the method for the applicant's long-run development, many innovations are open in patented claim.As CN03113046, or referring to M.X.Wang, K.J.Chen et.al.Appl.Phys.Lett.
72, 722 (1998); X.F.Huang, K.J.Chen et.al.J.Non.Cryst.,
266, (2000) 1015 documents such as grade.
Three, summary of the invention
The objective of the invention is: propose the preparation method of nanoscale template in a kind of nanometer seal technology, the lower method of especially a kind of cost prepares semiconductor nano level template, and this is a starting point of the present invention.
The object of the present invention is achieved like this: the preparation method of nanoscale template in the nanometer seal technology, utilize the a-Si/SiN that is obtained by the plasma chemical vapor deposition technology growth
XVertical modulated structure of multilayer film and two kinds of different chemical corrosion rates of modulation material are successfully prepared the one dimension periodic structure template with nano-precision.
Amorphous silicon (a-Si)/silicon nitride (SiN
X) the multilayer film preparation: the a-Si film and the SiN that utilize plasma chemical vapor deposition (PECVD) technology growth nanometer grade thickness
XFilm, repeated growth a-Si film and SiN
X, obtain a-Si/SiN
XMultilayer film; Prepare multilayer film section sample then: the section to above-mentioned multilayer film sample is cut into slices, abrasive disc and polishing, exposes bright and clean multilayer film side.Carry out selective corrosion then, as chemical corrosion, in the section formation nanoscale embossment template of multilayer film sample.After the embossment template is finished the Si substrate is impressed, a template that is carved with nanostructured by designing requirement is pressed in the special film of the one deck that is deposited on the Si substrate.In pattern transfer processes, the residual thin film corrosive that is pressed into part is fallen, so just the design transfer that mint-mark is produced has arrived on the Si substrate.
The multilayer film modulated structure removes amorphous silicon (a-Si)/silicon nitride (SiN
X) outside, can also adopt (a-SiC)/(SiN
X), (a-Ge)/(SiN
X), multilayer film modulated structure such as Ge/Si, the parameter of multilayer film modulated structure is determined as required.To the multilayer film modulated structure of above-mentioned unlike material, as long as adopt corrosion or the differentiated method of etch rate that constitutes two kinds of materials.As use N
H4OH is to the selective corrosion of Ge/Si.Referring to Chinese patent 01108247.
The present invention can use as plasma reinforced chemical vapor deposition (PECVD) technology, also can use molecular beam epitaxy (MBE), the preparation of chemical vapor deposition methods such as (MOCVD), and these methods all do not exceed the scope of prior art.
The corrosive liquid that uses during corrosion, it corrodes a-Si and SiN
XSpeed bigger difference is arranged, so just can form groove, thereby form our desired nanometer linear array template in the side of multilayer film sample.Our used corrosive liquid is a nitric acid, the mixed liquor of hydrofluorite and water.It corrodes a-Si and SiN
XSpeed bigger difference is arranged, so just can form groove, thereby form our desired nanometer linear array template in the side of multilayer film sample.Corrosive liquid nitric acid, the mixed liquor ratio of hydrofluorite and water is: HNO
3: HF: H
2O=2-6: 60-200: 100, as 3: 100: 100.Etching time is 10-60s.
The lithographic method that the template that the present invention developed will relate to is the improvement of nanometer seal technology (NanoimprintLithography), and method of the present invention is with amorphous silicon (a-Si)/silicon nitride (SiN
X) wait multi-layer film structure to prepare nanoscale embossment template to be applied to the nanometer seal technology.The inventive method has lot of advantages than general lithographic technique: first, it has cast aside electron beam fully, photon beam and ion beam, it is a process of utilizing a simple physics deformation, this lithographic method precision height, so it can not be subjected to many restrictions that limit other lithographic method factors of accuracy; The second, it not only has high precision, and the very big zone of mint-mark simultaneously is so it has high production; The 3rd, it does not need complexity and expensive electron-beam generator, thereby has reduced cost.These advantages make it very likely to enter the commercial production field.
Show by domestic and international result of study in recent years: make microelectronic age enter the nano-electron epoch, promptly will make nanometer electronic device walk out the laboratory, must seek a kind of low price, the alternative conventional photoetching of the high lithographic method that produces and electron beam lithography.And the template graphics that nanometer embossing is realized is directly transferred on the silicon chip, is subjected to extensive attention just day by day.One of key of this technology is the preparation of nanoscale template.The present invention designs and provides a kind of technology of preparing of new nanoscale template experimentally, can control the yardstick of nano-form by the cycle of regulation and control multilayer film, reaches nanometer scale, thereby form the pattern of nanoscale on silicon substrate.This method was both compatible mutually with current microelectronic process engineering, avoided the hyperfine process technology of use cost costliness again.The nano-form of preparing based on this technology is applied to nanometer embossing and will will become devices field that great application prospect and value are arranged with the nano photoelectric subclass at the nanoelectronic in future.
Advantage of the present invention:
1. utilization of the present invention is successfully prepared the one dimension periodic structure template with nano-precision by vertical modulated structure and two kinds of different chemical corrosion rates of modulation material of the multilayer films such as a-Si/SiNx of plasma chemical vapor deposition (PECVD) technology growth acquisition.Avoided using expensive beamwriter lithography equipment.
2. the a-Si/SiN of using plasma chemical vapour deposition (PECVD) technology preparation
XThe cycle of multilayer film can accurately control to nanometer scale, and the I of bed thickness reaches 2nm, thereby makes the pattern dimension of template can be reduced to 2nm, can produce the pattern of nanoscale to the Si sheet when figure transfer.
3. as the vertical modulated structure of multilayer film is transferred on the plane, then can obtain the nanoscale template of the multiple pattern of large tracts of land, flexible design.
4. etch nanoscale embossment template with cheap chemical corrosion liquid, bright and clean smooth during corrosion at the auxiliary template surface that obtains down of ultrasonic vibration.Also can adopt reactive ion etching (RIE) technology to form high-quality embossment template.
Three, description of drawings
Fig. 1 is a-Si of the present invention (20nm)/SiN
X(20nm) small angle X-ray diffraction of multilayer film sample spectrum (XRD), it shows precipitous interface between the sublayer
Fig. 2 is a-Si of the present invention (20nm)/SiN
X(20nm) the section transmission electron microscope picture of multilayer film, it shows equally precipitous interface between the sublayer
Fig. 3 is a-Si of the present invention (20nm)/SiN
X(20nm) scanning electron microscope of the template of multilayer film specimen preparation (SEM) photo
Fig. 4 is a-Si of the present invention (20nm)/SiN
X(20nm) template scanning electron microscope (SEM) photo of usefulness ultrasonic vibration assistant chemical etching after 20 seconds of multilayer film specimen preparation
Fig. 5 is the present invention a-Si (50nm)/SiN
X(100nm) the SEM photo of the nanoscale template of multilayer film formation.Etching is observed perfect striped embossment after 10 seconds, even observed roughness is only below 1nm under high-amplification-factor
Five, embodiment
1, a-Si/SiN
XPreparing multilayer modulated structure
Utilize computer-controlled plasma reinforced chemical vapor deposition (PECVD) technology, adopt silane (SiH
4), ammonia (NH
3) and argon gas (Ar) as reactant gas source; Deposit a-Si/SiN on monocrystalline silicon piece and quartz or optical glass substrate
XMultilayer modulated structure.Concrete process conditions during preparation are as follows:
Power source frequency: 13.56MHz, power density during deposit: 0.2-0.3W/cm
2
Reaction chamber pressure: 33-40Pa, underlayer temperature: 250 ℃
When deposition of amorphous silicon (a-Si) sublayer, by SiH
4+ Ar forms by the aura decomposition reaction, wherein SiH
4Flow is 8sccm (a per minute standard cubic centimeter), and its deposition rate is 0.10nm/s; And amorphous silicon nitride (SiN
X) sublayer is by SiH
4+ NH
3+ Ar mixed gas reaction forms, NH during reaction
3/ SiH
4Gas flow ratio is 5, like this SiN of Huo Deing
XThe optical band gap of film is about 3.0eV, and deposition rate is 0.11nm/s.A-Si and SiN
XSublayer thickness can design as requested.In our example, a-Si sublayer thickness is 20nm, SiN
XSublayer thickness is 20nm, has 50 cycles.Most importantly utilize the switch of computer control gas valve to make in the reaction chamber that gas can quick exchange when the different sublayer of deposit in the deposition process.
2, multilayer film section specimen preparation:
Preparation multilayer film section sample will experience section and clean, and to sticking and intermediate plate, with 303,304,305 and No. 306 emery abrasive sheets, carries out polishing process subsequently.Smooth finish requirement for polishing back sample is very high, and it directly influences the quality of template.
3, chemical corrosion forms nanoscale embossment template at the section of multilayer film sample:
Our used corrosive liquid is nitric acid (70%), the mixed liquor of hydrofluorite (42%) and water.Ratio is: HNO
3: HF: H
2O=3: 100: 100.The room temperature etching time is 10s, uses ultrasonic vibration during corrosion.
4, utilize reactive ion etching to prepare nano-form
Dry etching has application widely as reactive ion etching in integrated circuit large-scale production.Select suitable source of the gas for the sublayer that different materials in the multilayer film is formed, also can carry out selective etching and handle, obtain periodic bar/groove structure at section, and can control etching depth by etching time.For example, we select CF for a-Si/SiNx multilayer film system
4Source of the gas for reactive ion beam etching (RIBE).In etching process, CF
4Under the oscillating electric field effect, resolve into CF
3 +And F
-Ion, F
-Ion and Si reaction, the SiF of generation gaseous state
4Vapor away.Under identical etching condition, the a-Si etching speed compares SiN
xFaster, so can form periodically bar/groove structure.
In our reactive ion etching experimentation, radio-frequency power 20-100W, vacuum tightness 0.01-0.005Pa and CF
4Under the condition of flow 10-40sccm, it can be bar/groove structure of 20nm/20nm in the acquisition cycle.
Example: radio-frequency power 30W, vacuum tightness 0.01Pa and CF
4Under the condition of flow 20sccm, can obtain groove depth is 100nm, cycle to be bar/groove structure of 20nm/20nm.
Claims (1)
1, the preparation method of nanoscale template in the nanometer seal technology, it is characterized in that preparation multilayer film earlier: multilayer film is amorphous silicon a-Si/ silicon nitride SiN
XThe multilayer film modulated structure, to the section of above-mentioned multilayer film sample cut into slices, abrasive disc and polishing, expose bright and clean multilayer film side, carry out selective corrosion again, form nanoscale embossment template at the section of multilayer film sample; Amorphous silicon a-Si/ silicon nitride SiN
XUse acidic chemical corrosion or reactive ion etching during the multilayer film corrosion, the corrosive liquid that adopts when described acidic chemical corrodes is the mixed liquor of nitric acid, hydrofluorite and water; The mixed liquor ratio of nitric acid, hydrofluorite and water is: 3: 100: 100, etching time was 10-60s; Described reactive ion etching is with CF
4For the source of the gas of reactive ion beam etching (RIBE), in etching process, CF
4Under the oscillating electric field effect, resolve into CF
3 +And F
-Ion, F
-Ion and Si reaction, the SiF of generation gaseous state
4Vapor away; Radio-frequency power 20-100W, vacuum tightness 0.01-0.005Pa and CF
4Flow 10-40sccm.
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| CN100437353C true CN100437353C (en) | 2008-11-26 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1129355A (en) * | 1994-09-16 | 1996-08-21 | 株式会社半导体能源研究所 | Method of manufacturing a thin film semiconductor device |
| CN1225499A (en) * | 1998-02-04 | 1999-08-11 | 佳能株式会社 | Semiconductor substrate and method for mfg. the same |
| US6365059B1 (en) * | 2000-04-28 | 2002-04-02 | Alexander Pechenik | Method for making a nano-stamp and for forming, with the stamp, nano-size elements on a substrate |
| CN1438168A (en) * | 2003-03-25 | 2003-08-27 | 南京大学 | Laser-inducing preparation of size-controllable high-density nano silicon quanta array of points |
| US20040081798A1 (en) * | 2002-10-24 | 2004-04-29 | Heon Lee | Hardened nano-imprinting stamp |
-
2004
- 2004-12-29 CN CNB200410065998XA patent/CN100437353C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1129355A (en) * | 1994-09-16 | 1996-08-21 | 株式会社半导体能源研究所 | Method of manufacturing a thin film semiconductor device |
| CN1225499A (en) * | 1998-02-04 | 1999-08-11 | 佳能株式会社 | Semiconductor substrate and method for mfg. the same |
| US6365059B1 (en) * | 2000-04-28 | 2002-04-02 | Alexander Pechenik | Method for making a nano-stamp and for forming, with the stamp, nano-size elements on a substrate |
| US20040081798A1 (en) * | 2002-10-24 | 2004-04-29 | Heon Lee | Hardened nano-imprinting stamp |
| CN1438168A (en) * | 2003-03-25 | 2003-08-27 | 南京大学 | Laser-inducing preparation of size-controllable high-density nano silicon quanta array of points |
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