CN100433672C - Method of flow-concourse and flow-distribution in multi speed rates synchronous digital network and device - Google Patents
Method of flow-concourse and flow-distribution in multi speed rates synchronous digital network and device Download PDFInfo
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- CN100433672C CN100433672C CNB021483604A CN02148360A CN100433672C CN 100433672 C CN100433672 C CN 100433672C CN B021483604 A CNB021483604 A CN B021483604A CN 02148360 A CN02148360 A CN 02148360A CN 100433672 C CN100433672 C CN 100433672C
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Abstract
The present invention relates to a multi-rate converging and diverging method and multi-rate converging and diverging equipment. The converging method comprises the following steps: each branch signal is received to extract a clock and data, and a frame search and frame tracking are completed according to the frame alignment byte of an SDH/SONET frame; signal overhead is processed to extract all the overhead signals and store and interpret all the overhead signals, and byte interposition is carried out on the signal of each channel so as to form a plurality of management units; the overhead signals are inserted into the formed management units, and new line overhead and an integrated high-speed signal are formed by byte interleaving multiplexing. The diverging method is the inverse process of the converging method; the equipment adopting the converging method and the diverging method enables low-speed optical signals of multiple paths to converge into a high-speed optical signal, or enables the high-speed optical signal to diverge into a plurality of low-speed optical signals. A plurality of branch signals can be transparently transmitted at one wavelength at the same time by using the method and the equipment, and the present invention has the advantages of convenient fault localization, flexible networking and greatly saved investment.
Description
Technical field
The present invention relates to a kind of many speed synchronous digital network and converge and separate assemblage method and converge and separate convergence device, the many speed SDH (Synchronous Digital Hierarchy) SDH/ Synchronous Optical Network SONET in particularly a kind of optical communication system converges and separates assemblage method and converge and separate convergence device.
Background technology
In current optical communication system, network technology is growing, miscellaneous service is poly-to be increased, especially inserting side, various low speed are professional to be increased, as STM-1/4 (also comprising the SONET business), if in an optical fiber, only transmit the waste that a channel service must cause the fiber bandwidth resource as STS-3/12.And to transmission system, bandwidth resources are very valuable, because the size of bandwidth has directly limited the transmittability of transmission system.For improving transmission rate, be to enlarge bandwidth on the one hand, be to increase bandwidth utilization on the other hand.But it is limited that the expansion of bandwidth is used, and with the increase of bandwidth, networking cost can improve, and makes the compatibility of system, maintainable variation.And enlarge bandwidth utilization is under the constant situation of bandwidth, increases the effective rate of utilization of unit bandwidth, and it is compatible, maintainable preferably that the system that makes has, and networking is more flexible.
When the SDH/SONET of a plurality of low rates of online appearance was professional, existing solution was following two kinds basically:
The first, be that the SDH signal of each STM-1 or STM-4 service rate is directly gone up at the DWDM looped network, STM-1 or STM-4 signal take a wavelength;
The second, use SDH equipment, several STM-1 or the synthetic STM-16 of STM-4 signal are transmitted.
There is following shortcoming in prior art solutions:
1. if adopt first kind of scheme, the SDH signal of each STM-1 or STM-4 service rate is directly gone up (the Dense Wavelength-division Multiplexing at DWDM, dense wave division multipurpose) looped network, STM-1 or STM-4 signal take a wavelength, must waste a large amount of wavelength resources like this;
2. if adopt second kind of scheme, STM-1 or the synthetic STM-16 of STM-4 signal are transmitted, though efficiently solve the utilance problem of wavelength like this, but there is the deficiency of handling complicated and apparatus expensive in this solution, the expense of STM-1 or STM-4 will all be terminated simultaneously, and every function of originally existing network management system also can't be implemented.
Summary of the invention
The object of the present invention is to provide a kind of synchronous digital network to converge and separate assemblage method, several low speed wavelength service signals are converged in the high speed business signal, the transparency that keeps overhead transmission simultaneously, thus defective at the bottom of the prior art scheme takies a large amount of wavelength resources, bandwidth availability ratio solved.
The object of the present invention is to provide a kind of convergence device that converges and separate, several low speed service signals are converged in the high speed business signal transmit, the transparency that keeps overhead transmission simultaneously, thus solve that the prior art scheme takies that wavelength is many, at the bottom of the bandwidth availability ratio, the defective of networking cost height, very flexible.
For realizing purpose of the present invention, we provide a kind of many speed synchronous digital network assemblage method, and it comprises the following steps: a1) receive through each tributary signal after the opto-electronic conversion, extract clock and data; B1) finish frame search and frame tracking according to the frame alignment byte of SDH/SONET frame; C1) signal overhead is handled, extracted all overhead signal and storage, simultaneously it is made an explanation; D1) each road signal being carried out byte divides slotting, and Administrative Unit Pointer is carried out pointer interpreter according to the SDH/SONET standard, orient the virtual container payload signal of each branch road according to pointer information, then according to the relation of input and output clock phase relation and frame head, produce new pointer value, each tributary signal is carried out phase alignment, form several administrative units; E1) overhead signal is inserted in the administrative unit signal that forms; F1) by byte intertexture division multiplexing, form new line overhead and complete high speed signal.
According to a further aspect in the invention, we provide a kind of many speed synchronous digital network to separate assemblage method, comprise the following steps: a2) receive the high speed signal that converts the signal of telecommunication to, search frame location byte finishes frame search and frame is followed the tracks of; B2) extract line overhead, and from undefined overhead byte, go out the overhead signal of each branch road client side signal according to converging Rule Extraction; C2) according to SDH/SONET pointer interpreter rule, signal is carried out pointer interpreter, orient the virtual container payload signal, and form new pointer value, and form a plurality of administrative unit signals according to the clock and the phase relation of signal; D2) by definition of order overhead byte and administrative unit signal are put into the corresponding overhead byte of each branch road, form complete low speed signal.
According to a further aspect in the invention, we provide a kind of many speed synchronous digital network convergence device, and its described convergence module comprises: the frame structure processing unit is used to receive each branch road signal of telecommunication, extract clock and data, finish frame search and frame tracking according to the frame alignment byte of SDH; The branch road transport overhead (toh) monitors and extraction unit that the receiving branch signal is used for this signal overhead is handled, and extracts all overhead signal and output; The branch road transport overhead (toh) unit that remaps is used to receive the overhead signal and the storage of extraction, output then; The pointer processing unit, another road signal of received frame structure treatment unit output, each road signal is carried out byte to be divided slotting, and Administrative Unit Pointer is carried out pointer interpreter according to the SDH standard, orient the virtual container payload signal of each branch road according to pointer information, according to the relation of input and output clock phase relation and frame head, produce new pointer value then, each tributary signal is carried out phase alignment, form several administrative units and output; Synthesis unit is used for the receiving branch TOH expense that the unit extracts that remaps, and this overhead signal is inserted in the administrative unit signal of pointer processing unit output; Become frame module,, form new line overhead by byte intertexture division multiplexing.
According to a further aspect in the invention, we provide a kind of many speed synchronous digital network to separate convergence device, the wherein said convergence module of separating comprises: separate into frame module, be used to receive the high speed signal that converts the signal of telecommunication to, search frame location byte finishes frame search and frame is followed the tracks of; The circuit transport overhead (toh) monitors and extraction module, receives the signal output of separating into frame module, is used to extract line overhead, and goes out the overhead signal of each branch road client side signal according to converging Rule Extraction from undefined overhead byte; The branch road transport overhead (toh) recovers module, is used for the overhead signal and the storage of receiving branch client side signal; The pointer processing module according to SDH pointer interpreter rule, is carried out pointer interpreter to signal, orients the virtual container payload signal, and forms new pointer value according to the clock and the phase relation of signal, and forms a plurality of administrative unit signals, then output; Synthesis module, the administrative unit signal and the branch road TOH of the output of reception pointer processing module recover the overhead signal of module output, overhead byte and administrative unit signal are put into the corresponding overhead byte of each branch road by definition of order; Become frame module, receive the signal of synthesis unit output, form the frame of complete low speed signal.
In sum, provided by the invention converging separated assemblage method and converged and separate convergence device, it supports that n (n≤16) individual STM-1 or the individual STM-4 transparent multiplexing of m (m≤4) are a STM-16 signal, and the overhead byte of STM-1 or STM-4 will transmit by the unused bytes in the STM-16 overhead byte, the transparency that keeps overhead transmission, each STM-1 or STM-4 signal can continue to implement own existing function, guarantee the transparent transmission of STM-1 or STM-4 signal, only take simultaneously a channel, its bandwidth availability ratio is 100%, can on a wavelength, transmit a plurality of STM-1 or STM-4 signal (supporting the SONET business) simultaneously, and wherein STM-1 or STM-4 signal do not caused any damage, fault location is convenient, networking is more flexible, and reduces investment outlay greatly.
Description of drawings
Fig. 1 is that many speed SDH/SONET of the present invention converges and separates the position view of convergence device in transmission system;
Fig. 2 is that many speed SDH/SONET of the present invention converges the cut-away view of separating convergence device;
Fig. 3 be the multi-path low speed signal gathering of present device become one road high speed signal converge the direction signal flow diagram;
Fig. 4 is that the high speed signal of present device is separated and pooled separating of multi-path low speed signal and converge the direction signal flow diagram;
Fig. 5 is clock processing module figure of the present invention.
Embodiment
Below in conjunction with accompanying drawing technical scheme of the present invention is described in detail:
The position of present device in transmission system be as shown in Figure 1: wherein dotted portion is that of the present invention converging separated convergence device.Converging direction, from several roads low speed service signal that client's side is transmitted up, as n STM-1 and m STM-4 service signal, cut-in convergent equipment (in the present invention, to converge the reconciliation aggregation feature synthesizes on a single-board device), pool standard wave length's high-speed optical signal, send into and tell original optical wavelength by channel-splitting filter after wave multiplexer is grown Distance Transmission again, send into and separate convergence device, separate and converge out original low speed service signal, assurance client side joint is gone into the transparent transmission of traffic overhead in the whole process.
Referring to Fig. 2, be the internal structure schematic diagram of present device, the arrow in the frame of broken lines of Fig. 2 is represented the signal of telecommunication, the arrow of the band shade that frame of broken lines is outer is represented light signal.Direction is represented to converge in top in the frame of broken lines, and the bottom is represented to separate and converged direction.
Converging direction, receive the low speed service signal that client's side is come, opto-electronic conversion through receiver-transmitter integrated module, convert the signal of telecommunication to, send into convergence module and be processed into high speed signal, convert standard wave length's light signal afterwards through electrooptic conversion module to, be divided into two-way by a splitter again and send, realize two sending out.
Converge direction separating, equipment receives the two-way high-speed optical signal, respectively behind photoelectric conversion module to selector, realize choosing receipts function, select wherein one road signal of telecommunication access to separate convergence module and handle, separate at last and pool the multi-path low speed signal, send into receiver-transmitter integrated module, convert light signal to and send.
Introduce the emphasis module of present device inside below in detail---converge and separate convergence module, be divided into to converge to conciliate and converge two part introductions:
Converging direction signal handles:
Referring to Fig. 3, Fig. 3 be the multi-path low speed signal gathering of present device become one road high speed signal converge the direction signal flow diagram.As can be seen from Figure 3, come through the signal after the opto-electronic conversion from client's side, after extracting clock and data, send into frame structure processing unit 31, at first frame alignment byte A1, the A2 according to the SDH frame finishes frame search in inside, frame is followed the tracks of, promptly finish and decide frame, then each tributary signal is carried out descrambling.Signal after frame structure processing unit 31 is handled is divided into two-way, and a route branch road TOH (Transmission Overhead, transport overhead) monitors and extraction unit 36 is handled, and other one the tunnel sends into pointer processing unit 32 again handles.Monitor and extraction unit 36 parts that at branch road TOH proceed in two phases, the first step is that signal overhead is handled, and extracts all overhead signal, deposit branch road TOH in and remap in the unit 37; Second step made an explanation to expense exactly, the transmission performance and LOS (the Loss Of Signal that report these client's side joints to collect mail number by the alarm output line, dropout), LOF (Lossof Frame, LOF), OOF (Out-of-Frame, OOF), software is given in alarms such as LOC (Loss ofClock, loss of clock), B1, B2.In branch road TOH supervision and extraction unit Unit 36, all expenses can be exported to the external world by the expense Serial Port Line, monitor and extraction for software processes.In pointer processing unit 32, each road signal is carried out byte divide slotting (inverse process that byte interleaves), and according to SDH standard rule to AU (AdministrativeUnit, administrative unit) pointer carries out pointer interpreter, according to pointer information, orient VC-4 (the Virtual Container of each branch road, virtual container) payload signal, then according to the relation of input and output clock phase relation and frame head, produce new pointer value H1, H2, H3, to carry out the alignment of phase place from each road signal of client's side, form 16 AU-4, send into synthesis unit 34.At POH (Path Overhead, path overhead) monitor unit 33, be specially the VC-4 signal in the pointer processing unit 32 to be carried out the supervision of path overhead, such as bytes such as J1, B3, C2, G1.
AU-4 signal after handling through pointer processing unit 32 in synthesis unit 34, inserts the branch road TOH expense that unit 37 sends here that remaps.16 AU-4 signals are through after handling at synthesis unit 34, enter into frame module 35, in inside, by byte intertexture division multiplexing (industrywide standard rule), form STM-16 frame (or STS-48 frame), and generate new STM-16 (or STS-48) line overhead, but the line overhead that certain also receiving lines TOH regeneration unit 38 provides.The final signal that forms complete STM-16 (or STS-48) frame structure, the light signal by electric light conversion formation standard dwdm system requires transmits in dwdm system.
Separate and converge the direction signal processing:
Referring to Fig. 4, Fig. 4 is that the present invention sends out the high speed signal that is equipped with and separates and pool separating of multi-path low speed signal and converge the direction signal flow diagram, and separating and converging direction is the opposite direction that converges.As can be seen from Figure 4, the high speed signal of 2.5G becomes the signal of telecommunication through opto-electronic conversion, sends into and separates frame module 41, finishes frame search and frame tracking in inside search A1A2 byte, promptly finishes and decides frame, and STM-16 (or STS-48) signal is carried out descrambling.Signal behind the descrambling is divided into two-way, and a route lines TOH monitors and extraction module 42 is handled, and another route pointer processing module 43 is handled.In circuit TOH supervision and extraction module 42, extract line overhead, report necessary performance and LOS, LOF, OOF, LOC, warning information such as B1, B2 to give software according to Overhead by the alarm output line, and from undefined overhead byte, go out the overhead signal of each branch road client side signal according to converging Rule Extraction, put into the buffer that branch road TOH recovers module 45.Simultaneously, the expense that extracts in circuit TOH supervision and extraction module 42 can be exported to the external world by the expense Serial Port Line, for software monitors and extraction.In pointer processing module 43, according to SDH pointer interpreter rule, signal is carried out pointer interpreter, orient the VC-4 payload signal, and form new pointer value H1, H2, H3 according to the clock and the phase relation of signal, form 16 AU-4.Monitor by POH simultaneously and pointer module 44 supervision POH (such as bytes such as J1, B3, C2, G1) and pointer counting that these can be read by extraneous software.Through 16 AU-4 signals after 43 processing of pointer processing module, at synthesis module 46 places, the DWDM side of recovering to take out in the buffer of module 45 with branch road TOH passes the overhead byte of coming, put into the corresponding overhead byte of each branch road STM-1 or STM-4 according to definition of order, send into at last frame module 47, form the signal of complete STM-1 of each branch road or STM-4 structure, realize professional transparent transmission.
Converge the reconciliation convergence module and can support SONET and SDH form, support the cascade form simultaneously, support OC-3c (Optical Carrier Level 3, STS-3 frame light signal), OC-12c (Optical Carrier Level 12, STS-12 frame light signal), OC-48c, VC4-4c.
Describing expense and pointer below in detail handles:
Provided by the invention converge separate convergence device achieve a butt joint into the expense transparent transmission function of branch service, will be inserted into the idle bytes of 2.5G expense between the branch road expense, the 2.5G expense of can regenerating simultaneously.
For example 16 branch road STM-1 signal multiplexings see table 1 to the STM-16 frame structure, and table 1 is that 16 road STM-1 expenses of the present invention are shone upon schematic diagram again, represents the frame structure of 16 branch road STM-1 signal multiplexings to STM-16; As can be seen from the table, non-shaded portion is Remap (mapping again) position of branch road STM-1 in the table, and 16 branch road overhead part arrive the STM-16 position by byte intertexture division multiplexing.Dash area is the section overhead of STM-16 regeneration.
Table 1
Again for example with the frame structure of 4 road STM-4 signal multiplexings to STM-16.Referring to table 2, table 2 is that 4 road STM-4 expenses of the present invention are shone upon schematic diagram again, and as can be seen from Table 2, dash area is the Remap position of branch road STM-4 in the table, and 4 branch road overhead part arrive the STM-16 position by byte intertexture division multiplexing.Non-shaded portion is the section overhead of STM-16 regeneration.
Table 2
By to being inserted into byte idle in the STM-16 frame structure expense between expense, realize transparent transmission to the branch road expense with branch road.
Because 4 branch road SDH signals, from different clocks, through clock re-timing, branch clock and local clock are asynchronous, and the pointer adjustment must take place.The pointer count value of adjustment will be provided when receiving.
For the expense of line side (DWDM port), module of the present invention provides the generation of expense.1, provides B1, B2 error code counting.2, the J0 byte provides 1 byte, 16 bytes, 64 byte formats.3, (D1～D12) is for system provides in-band management to provide data communication channel DCC channel interface.4, fill in S1 byte according to the tranmitting data register synchronous situation.5, other bytes are inserted and are extracted, as: E1, E2, F1, F2, X1 etc.
Clock is handled:
Referring to Fig. 5, Fig. 5 is clock processing module figure of the present invention, and as can be seen from the figure, equipment of the present invention provides 6 clock sources at least: 4 branch line signal recovery clocks, 1 line-recovered clock, 1 local clock.
During device power-on, default conditions are operated in (free oscillation) on the local clock.The operation back is carried out the clock configuration according to network condition to equipment on webmaster.Configuration provides inquiry of port precedence table and inquiry SSM (Synchronication status message), and Synchronication status message is through the S1 byte transmission.
The clock index request guarantees that single-board device of the present invention can use internal clock source under the synchronization loss outside, requires frequency accuracy to be ± 20ppm (regularly requiring with the regenerator network element internal).
Description of the invention, describe in detail and above-mentioned accompanying drawing be not be used for limiting of the present invention.To those skilled in the art, under instruction of the present invention, can carry out various corresponding modification and can not exceed the spirit and scope of the present invention, but this variation should be included within claim of the present invention and the equivalent scope thereof.
Claims (10)
1. the assemblage method of speed synchronous digital network more than a kind is characterized in that comprising the following steps:
A1) receive through each tributary signal after the opto-electronic conversion, extract clock and data;
B1) finish frame search and frame tracking according to the frame alignment byte of SDH/SONET frame;
C1) signal overhead is handled, extracted all overhead signal and storage, simultaneously it is made an explanation;
D1) each tributary signal being carried out byte divides slotting, and Administrative Unit Pointer is carried out pointer interpreter according to the SDH/SONET standard, orient the virtual container payload signal of each branch road according to pointer information, then according to the relation of input clock phase place and frame head and the relation of output clock phase and frame head, produce new pointer value, each tributary signal is carried out phase alignment, form several administrative units;
E1) described overhead signal is inserted in the administrative unit that forms;
F1) form new line overhead and complete high speed signal by described administrative unit being carried out byte intertexture division multiplexing.
2. many speed synchronous digital network assemblage method as claimed in claim 1 is characterized in that described step c1) also comprise the transmission performance and the dropout that report received signal, LOF, OOF, loss of clock, the step of bit interleaved parity sign indicating number B1 and B2.
3. many speed synchronous digital network assemblage method as claimed in claim 1 is characterized in that described steps d 1) also comprise virtual container signals is carried out the step that path overhead monitors.
4. the speed synchronous digital network is separated assemblage method more than one kind, comprises the following steps:
A2) receive the high speed signal that converts the signal of telecommunication to, search frame location byte finishes frame search and frame is followed the tracks of;
B2) extract line overhead, and from undefined overhead byte, go out the overhead signal of each branch road client side signal according to converging Rule Extraction;
C2) according to SDH/SONET pointer interpreter rule, described high speed signal is carried out pointer interpreter, orient the virtual container payload signal, and form new pointer value, and form a plurality of administrative unit signals according to the clock and the phase relation of signal;
D2) by definition of order overhead signal and administrative unit signal are put into the corresponding overhead byte of each branch road, form complete low speed signal.
5. many speed synchronous digital network as claimed in claim 4 is separated assemblage method, it is characterized in that described step b2 also comprises transmission performance and the dropout that reports necessity according to described overhead signal, LOF, OOF, loss of clock, bit is checked the step of parity check code B1 and B2.
6. many speed synchronous digital network as claimed in claim 4 is separated assemblage method, it is characterized in that described step c2 also comprises the step that monitors path overhead and pointer counting.
7. the convergence device of speed synchronous digital network more than a kind is characterized in that described convergence module comprises:
The frame structure processing unit is used to receive each branch road signal of telecommunication, extracts clock and data, finishes frame search and frame tracking according to the frame alignment byte of SDH;
The branch road transport overhead monitors and extraction unit, is used for the expense of described each branch road signal of telecommunication is handled, and extracts all overhead signal and output;
The branch road transport overhead unit that remaps is used to receive the overhead signal and the storage of extraction, output then;
The pointer processing unit, another road signal of received frame structure treatment unit output, described each subcircuits signal is carried out byte to be divided slotting, and Administrative Unit Pointer is carried out pointer interpreter according to the SDH standard, orient the virtual container payload signal of each branch road according to pointer information, according to the relation of input clock phase place and frame head and the relation of output clock phase and frame head, produce new pointer value then, each tributary signal is carried out phase alignment, form several administrative units and output;
Synthesis unit is used to receive the described branch road transport overhead expense that the unit extracts that remaps, and this overhead signal is inserted in the administrative unit of pointer processing unit output;
Become frame module,, form new line overhead and complete high speed signal by described administrative unit is carried out byte intertexture division multiplexing.
8. many speed synchronous digital network convergence device as claimed in claim 7 is characterized in that also comprising the circuit regeneration unit, is used for the outlet line expense to becoming frame module, to form complete frame structure signal.
9. the speed synchronous digital network is separated convergence device more than one kind, it is characterized in that the described convergence module of separating comprises:
Separate into frame module, be used to receive the high speed signal that converts the signal of telecommunication to, search frame location byte finishes frame search and frame is followed the tracks of;
The circuit transport overhead monitors and extraction module, receives the high speed signal of the output of separating into frame module, and extracts line overhead, goes out the overhead signal of each branch road client side signal according to converging Rule Extraction from undefined overhead byte;
The branch road transport overhead recovers module, is used for the overhead signal and the storage of receiving branch client side signal;
The pointer processing module according to SDH pointer interpreter rule, is carried out pointer interpreter to described high speed signal, orient the virtual container payload signal, and form new pointer value, and form a plurality of administrative unit signals, output then according to the clock and the phase relation of branch road client side signal;
Synthesis module, the administrative unit signal and the described branch road transport overhead of the output of reception pointer processing module recover the overhead signal of module output, overhead signal and administrative unit signal are put into the corresponding overhead byte of each branch road by definition of order;
Become frame module, receive the signal of described synthesis module output, form complete low speed signal.
10. many speed synchronous digital network as claimed in claim 9 is separated convergence device, it is characterized in that described converging separate convergence module and comprise that also path overhead monitors and the pointer counting module, is used for monitoring that the pointer of pointer processing module counts.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN100349390C (en) | 2004-08-11 | 2007-11-14 | 华为技术有限公司 | Method for transmitting low-speed service signal in optical transport network and its device |
| CN1787412B (en) * | 2004-12-08 | 2010-05-05 | 中兴通讯股份有限公司 | AU pointer interpretating apparatus of time division multiplex based on double terminal RAM |
| CN1859430B (en) * | 2005-08-09 | 2010-04-28 | 华为技术有限公司 | IP Transmission system and its method |
| CN101119172B (en) * | 2007-09-13 | 2014-08-20 | 中兴通讯股份有限公司 | Parallel overhead extracting method and device in optical synchronization digital transmission system |
| CN102318279B (en) * | 2009-02-10 | 2014-03-05 | 三菱电机株式会社 | High-speed optical signal control unit, parent station device, and grant allocation method |
| CN101631050B (en) * | 2009-06-24 | 2012-05-23 | 中兴通讯股份有限公司 | Device and method for positioning fault point in transmission network |
| CN107786299B (en) * | 2016-08-25 | 2021-06-08 | 华为技术有限公司 | Method, device and network system for sending and receiving service |
| CN107579797B (en) * | 2017-11-09 | 2019-03-29 | 深圳震有科技股份有限公司 | A kind of multi tate SDH optical interface multiplex circuit, fpga chip and equipment |
| CN109120369B (en) * | 2018-11-23 | 2019-03-05 | 湖南有马信息技术有限公司 | A kind of SDH data processing method, system and relevant apparatus |
| CN113285852B (en) * | 2021-05-14 | 2022-11-11 | 李国志 | Method for realizing synchronous test of multi-path E1 signals |
| CN114389753B (en) * | 2021-12-15 | 2024-01-30 | 中国电子科技集团公司第三十研究所 | POS interface capable of adapting to various rates |
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