CN100433541C - Apparatus and method for frequency signal starting - Google Patents
Apparatus and method for frequency signal starting Download PDFInfo
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- CN100433541C CN100433541C CNB021320942A CN02132094A CN100433541C CN 100433541 C CN100433541 C CN 100433541C CN B021320942 A CNB021320942 A CN B021320942A CN 02132094 A CN02132094 A CN 02132094A CN 100433541 C CN100433541 C CN 100433541C
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Abstract
The present invention discloses a frequency signal starting device and a method, which is used for filtering the noise of a frequency signal after an integrated circuit enters an operating mode from an electricity saving mode. The frequency signal starting device comprises a first pulse wave generator, a second pulse wave generator and a positive and negative device, wherein when the width of a pulse wave of a high level of an input frequency signal is larger than the threshold value of the width of a preset pulse wave, a corresponding first short pulse wave is generated; when the width of a pulse wave of a low level of the input frequency signal is larger than a threshold value, a corresponding second short pulse wave is generated; the positive and negative device is connected to the first pulse wave generator and a second pulse wave generator and generates a reconstruction frequency signal by using the relative position of the first short pulse wave and the second short pulse wave; the reconstructed frequency signal can be used as a working frequency of a microprocessor or other digital integrated circuits. The present invention occupies a small wafer area, can be started rapidly when the integrated circuit enters the operating mode from the electricity saving mode and can not appear the phenomena of shut-down or computational errors easily. In addition, the present invention can also be used for eliminating noises and convex waves.
Description
Technical field
The present invention relates to the generation of the service frequency signal in the integrated circuit, particularly about a kind of frequency signal generation device and method thereof of filtering noise and integrated circuit can be worked on fast after entering the work module by battery saving mode.
Background technology
Because electronic product has the trend of moving towards compact and portability at present, therefore how to strengthen the emphasis that electricity-saving function has become each manufacturer's research and development.Known electricity-saving function is closed the input frequency signal (XTAL) of microprocessor after microprocessor enters battery saving mode by mode of operation; And when microprocessor is returned mode of operation by battery saving mode, then input frequency signal is opened.When above-mentioned electricity-saving function transfers unlatching at the input frequency signal self closing, the noise signal of one section transient state will appear.This microprocessor must wait for a period of time and allow input frequency signal transfer toward just can to work on after stable.Otherwise this microprocessor is then worked as machine easily or is calculated wrong result if do not start working when input frequency signal is stablized as yet.
A kind of conventional approaches that addresses the above problem is to adopt a counter circuit.At first set the count value of a safety, during to this count value, promptly represent this input frequency signal stable by the remainder, just start this microprocessor then and work on when this counter by circuit designers.
The shortcoming of this conventional approaches is to take too big chip area.Particularly for some compact electronic products, the wafer that area is too big is to have violated its design criterion on the contrary.Therefore how industrial circle when returning mode of operation by battery saving mode, avoids producing a misoperation for microprocessor or other digital integrated circuit, and the effective settling mode of needs is arranged in fact.
Summary of the invention
First purpose of the present invention provides a kind of less frequency signal generation device of chip area that takies.
Second purpose of the present invention provides a kind of frequency signal generation device and method thereof that can start fast after integrated circuit is touched formula by the battery saving mode work of entering.
The 3rd purpose of the present invention provide a kind of can be to the frequency signal generation device and the method thereof of interference resistant and surging.
In order to achieve the above object, the present invention promptly filters the noise of frequency signal after integrated circuit enters mode of operation by battery saving mode.Particularly, a kind of frequency signal generation device of the present invention, be used for the input frequency signal of filtering pulse bandwidth less than a default pulse bandwidth critical value, and produce one and rebuild frequency signal, this device comprises: one first pulse generator, when the pulse bandwidth of the high levle of input frequency signal produces corresponding first short pulse wave during greater than the wide critical value of this default pulse wave; One second pulse generator is when the pulse bandwidth of the low level of input frequency signal produces corresponding second short pulse wave during greater than a preset critical; And a flip-flop, be connected to this first pulse generator and second pulse generator, and utilize the relative position of this first short pulse wave and this second short pulse wave and produce this reconstruction frequency signal.
The invention also discloses a kind of frequency signal generating method, a digital integrated circuit is started apace, comprise the following step: set a pulse bandwidth critical value by circuit designers; When the pulse bandwidth of the high levle of input frequency signal then produces one first short pulse wave greater than this pulse bandwidth critical value; When the pulse bandwidth of the low level of input frequency signal then produces one second short pulse wave greater than this pulse bandwidth critical value; And utilize the relative position of this first short pulse wave and this second short pulse wave and rebuild frequency signal.
Advantage of the present invention is tangible: at first, it is less that device of the present invention takies chip area; Secondly, after integrated circuit is touched formula by the battery saving mode work of entering, can start fast, be not easy to occur working as the phenomenon of machine or mistake in computation; Have, the present invention can also be to interference resistant and surging again.
Description of drawings
Fig. 1 is system's connection layout of frequency signal generation device of the present invention;
Fig. 2 is the circuit module figure of frequency signal generation device of the present invention;
Fig. 3 is the circuit diagram of first pulse generator of the present invention:
Fig. 4 is the sequential chart of frequency signal generation device of the present invention; And
Fig. 5 is the flow chart of frequency signal generating method of the present invention.
Embodiment
Fig. 1 is system's connection layout of frequency signal generation device 12 of the present invention.This frequency signal generation device 12 is accepted the frequency signal XTAL that a frequency oscillator 13 is produced, and is used to remove the noise of this frequency signal XTAL, uses for microprocessor 11 and produce a stable frequency signal Z separately.After microprocessor 11 enters battery saving mode by mode of operation, input frequency signal XTAL will be closed.When microprocessor was returned mode of operation by battery saving mode, input frequency signal XTAL was unlocked.What be different from prior art is that this frequency signal generation device 12 can convert unsettled frequency signal to stable frequency signal immediately (real time), and uses for microprocessor 11.In other words, frequency signal generation device 12 of the present invention can be avoided the shortcoming that prior art must allow microprocessor 11 wait for a period of time and just can work on when touching formula by the battery saving mode work of returning.In addition, frequency signal generation device 12 required transistor sizes of the present invention are less than the counter circuit of prior art, that is frequency signal generation device 12 of the present invention occupies less chip area, also so are suitable for compact electronic product.
System's connection layout of Fig. 1 only is one embodiment of the invention.In practical application, also this frequency signal generation device 12 can be embedded in these microprocessor 11 inside to reduce cost of manufacture.
Fig. 2 is the circuit module figure of frequency signal generation device of the present invention, mainly comprises one first pulse generator 22, one second pulse generator 23 and a flip-flop 21.Circuit designers can preestablish a pulse bandwidth critical value, when the pulse bandwidth of input frequency signal XTAL during less than this critical value, then is considered to a noise and by filtering.When the pulse bandwidth of high levle of the frequency signal XTAL of input during, then produce one first short pulse wave by this first pulse generator 22 greater than this critical value.When the pulse bandwidth of low level of the frequency signal XTAL of input during, then produce one second short pulse wave by this second pulse generator 23 greater than this critical value.This second pulse generator 23 can be formed by a not gate 24 serial connections first pulse generator 22.The output of this first pulse generator 22 and second pulse generator 23 is connected to this flip-flop 21, this flip-flop 21 is a starting point with first short pulse wave of these first pulse generator, 22 outputs, and second short pulse wave of exporting with this second pulse generator 23 is that terminal point is rebuild the complete frequency signal Z of a waveform.This flip-flop 21 can be known RS flip-flop or other kind, and the present invention does not impose any restrictions this.
Fig. 3 is the circuit diagram of first pulse generator 22 of the present invention.First pulse generator 22 comprises: one first delay circuit 32 is used to produce an inhibit signal, and is proportional to this default pulse bandwidth critical value the time of delay of this inhibit signal; One second delay circuit 33 is used to produce the signal opposite with this first delay circuit 32; And a flip-flop 34, be connected to this first delay circuit 32 and second delay circuit 33, and produce corresponding first short pulse wave during greater than this default pulse bandwidth critical value when the pulse bandwidth of the high levle of input frequency signal.The output of this first pulse generator 22 is a flip-flop 34, for example is a RS flip-flop.One input of this flip-flop 34 is one first delay circuit 32, can form via a plurality of inverters of series connection in design.Can be set the time of delay of this first delay circuit 32 by circuit designers, to produce corresponding pulse bandwidth critical value.Another input of this flip-flop 34 is one second delay circuit 33, can be set its time of delay and be approached this first delay circuit 32 by first delay circuit 32 and 31 tandem compounds of a not gate.
Fig. 4 is the sequential chart of frequency signal generation device of the present invention.In Fig. 4, an input frequency signal XTAL has some noises and surging (glitch) respectively on high levle and low level pulse wave.Suppose that circuit designers is 12ns with the pulse bandwidth critical value setting, then pulse bandwidth is that the input frequency signal XTAL of 2ns and 8ns will be by filtering.Pulse bandwidth on high levle and the low level will be detected by this first pulse generator 22 and this second pulse generator 23 respectively by the input frequency signal XTAL of 14ns, and produce corresponding first short pulse wave and second short pulse wave.This flip-flop 21 is a starting point with this first short pulse wave, and is terminal point with this second short pulse wave, and rebuilds the complete frequency signal of a waveform.
Fig. 5 is the flow chart of frequency signal generating method of the present invention.In step 51, the present invention opens the beginning.In step 52, circuit designers preestablishes a pulse bandwidth critical value.When the pulse bandwidth of input frequency signal during, then be considered to noise and give filtering less than this pulse bandwidth critical value.When the pulse bandwidth of input frequency signal during greater than this pulse bandwidth critical value, then this pulse wave utilizes following step and rebuilt.In step 53, when the pulse bandwidth of the high levle of input frequency signal then produces one first short pulse wave greater than this critical value.In step 54, when the pulse bandwidth of the low level of input frequency signal then produces one second short pulse wave greater than this critical value.In step 55, be starting point and be that terminal point is rebuild a frequency signal with this second short pulse wave with this first short pulse wave.Frequency signal after this reconstruction can be used as the operating frequency of microprocessor or other digital integrated circuit, is entered after the mode of operation and must be waited for the stable time of a band frequency by battery saving mode avoiding.In step 56, the present invention finishes.
The above embodiments are starting point with first short pulse wave and are that terminal point is rebuild frequency signal with this second short pulse wave.But can also second short pulse wave in the practical application be starting point and be that terminal point is rebuild frequency signal with this first short pulse wave, or utilize other similar method, the present invention do any restriction to this.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those who are familiar with this art, without departing from the spirit and scope of the invention; when can doing a little change and retouching, so the present invention's protection range is as the criterion when looking claims scope person of defining.
Claims (12)
1. a frequency signal generation device is used for the input frequency signal of filtering pulse bandwidth less than a default pulse bandwidth critical value, and produces a reconstruction frequency signal, and it is characterized in that: this device comprises:
One first pulse generator is when the pulse bandwidth of the high levle of input frequency signal produces corresponding first short pulse wave during greater than this default pulse bandwidth critical value;
One second pulse generator is when the pulse bandwidth of the low level of input frequency signal produces corresponding second short pulse wave during greater than this preset critical; And
One flip-flop is connected to this first pulse generator and second pulse generator, and utilizes the relative position of this first short pulse wave and this second short pulse wave and produce this reconstruction frequency signal.
2. frequency signal generation device as claimed in claim 1, it is characterized in that: this second pulse generator comprises a not gate and the 3rd pulse generator, wherein the 3rd pulse generator can adopt the circuit design identical with this first pulse generator, and this not gate and the 3rd pulse generator are one another in series.
3. frequency signal generation device as claimed in claim 1 is characterized in that: this flip-flop is a RS flip-flop.
4. frequency signal generation device as claimed in claim 1 is characterized in that: this first pulse generator comprises:
One first delay circuit is used to produce an inhibit signal, and is proportional to this default pulse bandwidth critical value the time of delay of this inhibit signal;
One second delay circuit is used to produce the signal opposite with this first delay circuit; And
One flip-flop is connected to this first delay circuit and second delay circuit, and produces corresponding first short pulse wave during greater than this default pulse bandwidth critical value when the pulse bandwidth of the high levle of input frequency signal.
5. frequency signal generation device as claimed in claim 1 is characterized in that: this second pulse generator comprises:
One first delay circuit is used to produce an inhibit signal, and is proportional to this default pulse bandwidth critical value the time of delay of this inhibit signal;
One second delay circuit is used to produce the signal opposite with this first delay circuit; And
One flip-flop is connected to this first delay circuit and second delay circuit, and produces corresponding second short pulse wave during greater than this default pulse bandwidth critical value when the pulse bandwidth of the low level of input frequency signal.
6. frequency signal generation device as claimed in claim 4 is characterized in that: the flip-flop that described first pulse generator is comprised is a RS flip-flop.
7. frequency signal generation device as claimed in claim 5 is characterized in that: the flip-flop that described second pulse generator is comprised is a RS flip-flop.
8. frequency signal generation device as claimed in claim 1 is characterized in that: this flip-flop is starting point with this first short pulse wave and is that terminal point produces this reconstruction frequency signal with this second short pulse wave.
9. frequency signal generation device as claimed in claim 1 is characterized in that: this flip-flop is starting point with this second short pulse wave and is that terminal point produces this reconstruction frequency signal with this first short pulse wave.
10. frequency signal generating method is characterized in that: a digital integrated circuit is started apace, comprise the following step:
(a) set a pulse bandwidth critical value by circuit designers;
(b) pulse bandwidth when the high levle of input frequency signal then produces one first short pulse wave greater than this pulse bandwidth critical value;
(c) pulse bandwidth when the low level of input frequency signal then produces one second short pulse wave greater than this pulse bandwidth critical value; And
(d) utilize the relative position of this first short pulse wave and this second short pulse wave and rebuild frequency signal.
11. frequency signal generating method as claimed in claim 10 is characterized in that:, be starting point and be that terminal point is rebuild frequency signal with this second short pulse wave with this first short pulse wave at step (d).
12. frequency signal generating method as claimed in claim 10 is characterized in that:, be starting point and be that terminal point is rebuild frequency signal with this first short pulse wave with this second short pulse wave at step (d).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021320942A CN100433541C (en) | 2002-09-10 | 2002-09-10 | Apparatus and method for frequency signal starting |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB021320942A CN100433541C (en) | 2002-09-10 | 2002-09-10 | Apparatus and method for frequency signal starting |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1482735A CN1482735A (en) | 2004-03-17 |
| CN100433541C true CN100433541C (en) | 2008-11-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB021320942A Expired - Fee Related CN100433541C (en) | 2002-09-10 | 2002-09-10 | Apparatus and method for frequency signal starting |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1081032A (en) * | 1992-01-13 | 1994-01-19 | 日本电气株式会社 | Frequency synthesizer |
| EP0533964B1 (en) * | 1991-08-29 | 1995-10-25 | Deutsche Zaehler-Gesellschaft | Device for forming a product of signals |
| CN1146259A (en) * | 1994-12-30 | 1997-03-26 | 菲利浦电子有限公司 | Circuit and method for generating accurate quadrature signals |
| CN1154599A (en) * | 1995-12-30 | 1997-07-16 | 三星电子株式会社 | Frequency modulation signal demodulating circuit |
| CN1206959A (en) * | 1997-07-29 | 1999-02-03 | 日本电气株式会社 | Pulse signal generator and generating method thereof |
| JP3266121B2 (en) * | 1998-12-10 | 2002-03-18 | 日本電気株式会社 | Method and apparatus for detecting single frequency signal |
| US6445219B1 (en) * | 1999-02-08 | 2002-09-03 | Siemens Aktiengesellschaft | Method and circuit configuration for converting a frequency signal to a DC voltage |
-
2002
- 2002-09-10 CN CNB021320942A patent/CN100433541C/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0533964B1 (en) * | 1991-08-29 | 1995-10-25 | Deutsche Zaehler-Gesellschaft | Device for forming a product of signals |
| CN1081032A (en) * | 1992-01-13 | 1994-01-19 | 日本电气株式会社 | Frequency synthesizer |
| CN1146259A (en) * | 1994-12-30 | 1997-03-26 | 菲利浦电子有限公司 | Circuit and method for generating accurate quadrature signals |
| CN1154599A (en) * | 1995-12-30 | 1997-07-16 | 三星电子株式会社 | Frequency modulation signal demodulating circuit |
| CN1206959A (en) * | 1997-07-29 | 1999-02-03 | 日本电气株式会社 | Pulse signal generator and generating method thereof |
| JP3266121B2 (en) * | 1998-12-10 | 2002-03-18 | 日本電気株式会社 | Method and apparatus for detecting single frequency signal |
| US6445219B1 (en) * | 1999-02-08 | 2002-09-03 | Siemens Aktiengesellschaft | Method and circuit configuration for converting a frequency signal to a DC voltage |
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| Publication number | Publication date |
|---|---|
| CN1482735A (en) | 2004-03-17 |
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Granted publication date: 20081112 |