CN100433340C

CN100433340C - Silicon photoelectric probe compatible with deep submicron radio frequency technology

Info

Publication number: CN100433340C
Application number: CNB2003101220689A
Authority: CN
Inventors: 毛陆虹; 李炜; 陈弘达; 陈永权; 张晓潇
Original assignee: Tianjin University
Current assignee: Tianjin University
Priority date: 2003-12-31
Filing date: 2003-12-31
Publication date: 2008-11-12
Anticipated expiration: 2023-12-31
Also published as: CN1556546A

Abstract

The present invention discloses a high-speed silicon photoelectric detector compatible with a deep submicron radio frequency-complementary metal oxide semiconductor (RF-CMOS) process, which has the technical scheme that a deep n type trap is arranged in a p<-> type semiconductor substrate, the n type trap is arranged on the substrate, a shallow channel isolation region is arranged in the n type trap, and a four-fork fingered P<+> type diffusion region is arranged on the n type trap; an anti-reflection film layer is arranged on the four-fork fingered P<+> type diffusion region, a p-n junction of a photoelectric diode is composed of the fork fingered P<+> type diffusion region and the n type trap, and a shielding diode is composed of the n type trap and a P<+> guard ring. The present invention can be applied to a lot of fields, such as CD-ROMs, digital video discs (DVDs) and digital systems with the wave length from 630 to 850 nm and transferred through plastic fibers.

Description

Silicon photodetector with deep-submicron radio frequency process compatible

Technical field

The present invention relates to a kind of structure and manufacture method of photodetector, particularly a kind of silicon based opto-electronics panel detector structure compatible fully with deep-submicron radio frequency standard complementary metal oxide semiconductors (CMOS) (RF__CMOS) technology.

Background technology

At present the main flow receiver is the compound optoelectronic detector, it with silica-based receiver application-specific integrated circuit (ASIC) between mix integrated with metal wire bonding (WIREBONDING).Mix the integrated pressure welding line that makes near the surface of detector that protrusion be arranged, limited the scope of activities of optical fiber coupling, and the area of a common bond pad is 100 * 100 μ m ², produced bigger parasitic capacitance.The present invention can realize that not only the monolithic of optical receiver full silicidation is integrated, and can with the high-speed cmos circuit, realize complete compatible as radio frequency integrated circuit (RFIC).This makes that the function of optical receiver will be more flexible, and the device cost of receiver module and packaging cost can significantly reduce, and it is easier to remove behind the pressure welding line when optical fiber is coupled the coupling meeting, can reduce the coupling cost, industrialization easily.

Summary of the invention

The objective of the invention is in order to overcome the deficiencies in the prior art, provide a kind of high speed and with the deep-submicron radio frequency _ _ silicon photodetector of complementary metal oxide semiconductors (CMOS) (RF__CMOS) process compatible.

The silicon photodetector of the present invention and deep-submicron radio frequency process compatible comprises a p ^-The N-type semiconductor N substrate is characterized in that, described p ^-Be provided with a dark n type trap in the N-type semiconductor N substrate, n type trap is arranged on the described substrate, and shallow channel isolation area is arranged in the n type trap, the P of four interdigitated ⁺The type diffusion region is arranged on the n type trap; The P of described four interdigitated ⁺The type diffusion region is provided with the P of antireflective coating by interdigitated ⁺Type diffusion region and n type trap constitute the pn knot of photodiode, by n type trap and P ⁺The type guard ring constitutes the shielding diode.

Described anti-reflection film is the anti-reflection film that silicon dioxide and silicon nitride constitute.The P of described interdigitated ⁺Passivation layer is removed in the type diffusion region.Be provided with P around the described n type trap ⁺The type guard ring.

Said deep-submicron RF__CMOS technology is meant that transistorized characteristic size is less than or equal to 0.25 μ m, this deep-submicron CMOS process technology can be used for the making of radio frequency integrated circuit (RFIC), since adopted shallow trench isolation from the CMOS technology of dark N trap technology, can improve the isolation effect between the device and effectively reduce of the influence of the noise of substrate, to satisfy the radio frequency integrated circuit designing requirement circuit.

Said CMOS receiver circuit is meant that the current signal with photodetector output is converted to the silicon base CMOS integrated circuit of digital circuit required voltage signal.

Said VSR. system realizes the method for high speed information transmission in short distance, by the transmission of 12 root multimode fibers, the speed of single link is 1.25G bit/s, and distance is in 300m, and total transmission rate reaches 10G bit/s.This invention is as the photodetector of receiving unit in the VSR system.

Compare with existing mainstream technology, the present invention has following outstanding advantage:

1, the single chip integrated circuit of silicon based opto-electronics detector and receiving circuit (OEIC) not only has opto-electronic conversion and enlarging function, and because silicon integrated circuit is ripe, can introduce logical process, storage and the Based Intelligent Control function of electronics easily.

2, optoelectronic IC has been eliminated the influence of parasitic parameters such as encapsulation, lead-in wire and line, can realize high speed, has also simultaneously that volume is little, rate of finished products is high and advantage such as good reliability.

3, the present invention utilized fully in present advanced person's the deep-submicron RF__CMOS technology shallow trench isolation from dark N trap technology.Form the detector of vertical structure, effectively raised the performance of detector.

Description of drawings

Fig. 1 is a domain structure schematic diagram of the present invention;

Fig. 2 is the cross-sectional view of Fig. 1.

Embodiment

The present invention realizes by the following method: the domain structure of Fig. 1 display light electric explorer, be used on the RF__CMOS of deep-submicron technology, making, Fig. 2 shows the longitudinal profile structure chart of photodetector, has mainly shown the longitudinal size of photodetector.

p ^-N-type semiconductor N substrate 1, dark n type trap 2, this dark n type trap 2 is produced in the substrate 1; N type trap 4, this n type trap 4 is produced on the substrate 1; Shallow channel isolation area 3, this shallow channel isolation area 3 are produced in the n type trap 4; Article four, the P of interdigitated ⁺Type diffusion region 6, the P+ type diffusion region 6 of these four interdigitated is arranged on the n type trap 4; P ⁺ Type guard ring 7, this P ⁺ Type guard ring 7 is produced on the substrate 1 and around n type trap 4; Antireflective coating 11, this antireflective coating 11 is deposited on the P of four interdigitated ⁺Above the type diffusion region 6; P by interdigitated ⁺Tie with the pn that n type trap 4 constitutes photodiode type diffusion region 6, by n type trap 4 and P ⁺ Type guard ring 7 constitutes the shielding diode.

Be explained in detail below in conjunction with Fig. 1 and Fig. 2:

At first at p ^-Do dark N type trap 2 on the N-type semiconductor N substrate 1, as shown in Figure 2, its degree of depth is about 2.5 μ m, and implantation concentration is 3 * 10 ¹⁷Cm ^-3

Form shallow trench (STI) isolated area 3 by photoetching, corrosion back then.After this make N type trap on dark N type trap, vertically the degree of depth is about 0.95 μ m, and implantation concentration is 1 * 10 ¹⁷Cm ^-3MOS transistor tuned grid pressure injection is fashionable need shelter photodetector area with masking film carrying out in attention.

n ⁺Diffusion region 5 is and the source electrode of NMOS pipe and the preparation simultaneously that drains, has formed the contact of N type trap; Interdigitated P ⁺Type diffusion region 6 and P ⁺Type guard ring (Guard ring) the 7th, with the source electrode of PMOS pipe and drain electrode preparation simultaneously.

After this make each electrode of CMOS transistor AND gate photodiode.Interdigitated P ⁺Aluminium electrode 10 (shown in Fig. 1) is the positive pole of photodiode on the diffusion region 6, and the aluminium electrode 8 of drawing of N type trap is negative pole, P ⁺ Type guard ring 7 is drawn aluminium electrode 9.

Then at interdigitated P ⁺Erode the SiO above the photodetector on the type diffusion region 6 ₂ Layer 13 and passivation layer 12 can reduce the energy loss of light reflection and increased detector to light rhythm absorption efficiency.In order clearly to show the position of each electrode and diffusion region, omitted passivation layer among Fig. 1.

The last antireflective coating 11 of doing on photodetector is by reducing reflection of light to improve the absorption efficiency to light.Note, but this step is for making options of the present invention, because do not provide this technology in number of C MOS technology.

Photodiode is anti-inclined to one side during work, forms depletion region, forms a large amount of photo-generated carriers when illumination in the depletion region.The electrode grounding of guard ring, the anti-knot of pn partially that forms with n type trap 2 can shield the diffusion of the photo-generated carrier that the substrate depths produces, and have improved the speed of photodetector.

If photodetector and CMOS receiver circuit are integrated on the same semiconductor silicon substrate, then can finish the function that light signal is converted to voltage signal.So not only improve the reliability and stability of integrated circuit, also reduced total packaging cost.

Further set forth the present invention below in conjunction with embodiment and accompanying drawing.

In conjunction with Fig. 1 and Fig. 2, the concrete manufacture craft of photodetector is as follows:

1, at P ^-Making area on the N-type semiconductor N substrate 1 is the dark N type trap 2 of 16 μ m * 16 μ m, and doping content is 3 * 10 ¹⁷Cm ^-3, well depth is about 2.5 μ m.

2, will be interdigitated P ⁺Form the shading ring of shallow trench around the type diffusion region 6, the degree of depth is about 0.8 μ m.

3, the making area is the N type trap 4 of 20 μ m * 20 μ m on dark N type trap 2, is that the N type trap with P type metal-oxide-semiconductor prepares simultaneously.The degree of depth is about 0.95 μ m, and implantation concentration is 1 * 10 ¹⁷Cm ^-3

4, carry out the contact diffusion zone 5 of N type trap, doping content is 1 * 10 ²⁰Cm ^-3, N ⁺Diffusion region 5 is and the source electrode of N type metal-oxide-semiconductor and the preparation simultaneously that drains.

5, form interdigitated P simultaneously ⁺Type diffusion region 6 and P ⁺ Type guard ring 7, doping concentration are 1 * 10 ²⁰Cm ^-3, shown in the figure, having 4 interdigital and be evenly distributed in the n type trap 4, each width of interdigital is 1.5 μ m, and the distance between per two interdigital is 2 μ m, and its junction depth is about 0.16 μ m; Interdigitated P ⁺Type diffusion region 6 and P ⁺ Type guard ring 7 is with the source electrode and the drain electrode preparation simultaneously of PMOS pipe.

The contact diffusion zone 5 and the P of N type trap ⁺Type diffusion region 6 constitutes the pn knot of photodiode.

6, draw each electrode, as shown in Figure 1, guard ring 7 is all done circlewise with the

electrode

9 and 8 of the contact diffusion zone 5 of N type trap, can guarantee excellent contact, interdigitated P ⁺10 at diffusion region electrode is drawn from top.

7, at interdigitated P ⁺Erode the SiO above the photodetector on the type diffusion region 6 ₂ Layer 13 and passivation layer 12 can reduce the energy loss of light reflection and increased the absorption efficiency of detector to light.

On photodetector, do antireflective coating 11, by reducing reflection of light to improve the absorption efficiency of detector to light.Note, but this step is for making options of the present invention, because do not provide this technology in number of C MOS technology.

Claims

1. the silicon photodetector with deep-submicron radio frequency process compatible comprises a p ^-The N-type semiconductor N substrate is characterized in that, described p ^-Be provided with a dark n type trap in the N-type semiconductor N substrate, be provided with a n type trap in the described substrate, be positioned at dark n type trap above, shallow channel isolation area is arranged in the n type trap, the P of four interdigitated ⁺The type diffusion region is arranged on the n type trap; The P of described four interdigitated ⁺The type diffusion region is provided with antireflective coating, by the P of interdigitated ⁺Type diffusion region and n type trap constitute the pn knot of photodiode, by the P that is provided with around n type trap and the n type trap ⁺The type guard ring constitutes the shielding diode.

2. the silicon photodetector of according to claim 1 and deep-submicron radio frequency process compatible is characterized in that, described antireflective coating is the antireflective coating that silicon dioxide and silicon nitride constitute.