CN100422897C - Synchronization of multiphase synthetic ripple voltage regulator - Google Patents
Synchronization of multiphase synthetic ripple voltage regulator Download PDFInfo
- Publication number
- CN100422897C CN100422897C CNB2004100831143A CN200410083114A CN100422897C CN 100422897 C CN100422897 C CN 100422897C CN B2004100831143 A CNB2004100831143 A CN B2004100831143A CN 200410083114 A CN200410083114 A CN 200410083114A CN 100422897 C CN100422897 C CN 100422897C
- Authority
- CN
- China
- Prior art keywords
- voltage
- ripple
- coupled
- output
- input end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Dc-Dc Converters (AREA)
Abstract
A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator including a master clock circuit that generates a master clock signal, sequence logic and a ripple regulator for each phase. The DC-DC regulator includes multiple switching circuits, each responsive to a corresponding PWM signal to switch input voltages via a phase node through an output inductor to develop an output voltage. The sequence logic sets each PWM signal in sequential order based on the master clock signal. Each ripple generator includes a transconductance amplifier, a ripple capacitor and a comparator. The transconductance amplifier has an input coupled to a corresponding output inductor and an output coupled to a corresponding ripple capacitor. The comparator has a first input coupled to the ripple capacitor, a second input receiving an error voltage, and an output coupled to the sequence logic for resetting a corresponding PWM signal.
Description
The cross-reference of related application
The application is the interim and common Application No. of transferring the possession of 10/673684, and the date of application is the part continuity (CIP) on September 29th, 2003.Application No. 10/673684 itself is the interim and common Application No. of transferring the possession of 10/236787, and the date of application is the part continuity (CIP) on September 6th, 2002.Here the two is incorporated into, as the reference of intentional and purpose.
Technical field
The present invention relates generally to power circuit and relevant element, and mean the configuration that is used for synchronous a plurality of synthetic ripple generators especially, these synthetic ripple generators produce ripple waveform emulation or comprehensive, switch the operation of multi-phase DC-DC (DC-to-dc) synthetic ripple voltage regulator with control.
Background technology
Ic power is typically provided by one or more direct currents (DC) power supply.In many application, circuit may need multichannel to be different from the burning voltage of available mains voltage (these voltages may be relatively low, for example, at several volts or the lower order of magnitude, local required at low-power consumption particularly is for example portable, in the battery powered device).And in many application, the amplitude of load current can change and reaches several magnitude.In order to satisfy these needs, the voltage stabilizer of in fact common apply pulse or ripple base, for example, slow type or " bang-bang " type voltage stabilizer.
A kind of like this DC-DC voltage stabilizer of ripple base uses quite simple control gear and provides quick response to load transients.The switching of this ripple voltage regulator is asynchronous, and this helps being applied in the directly actuated application of switching edge needs.For this purpose, ripple voltage regulator typically uses slow comparer or similar device, it can be operatively connected to the control of a pair of power transfer device or the gate driver circuit of gate driving input end, for example FET (field effect transistor) or MOSFETS (the special field effect transistor of burning) or similar device.According to width modulation (PWM) switching waveform known to those persons skilled in the art, gate driver circuit controllably switches switching device shifter or be converted to and is switched on or switched off.
In so slow type or " bang-bang " type voltage stabilizer, when output voltage drops to the difference that is lower than the intrinsic slow voltage of reference voltage and comparer, the output pwm signal waveform that is produced by slow comparator transistor (for example changes first kind of state into, become high level), and when output voltage surpasses reference voltage and slow voltage sum, PWM output changing into second kind of state (for example, becoming low level) of this comparer.The use of load or increase cause that being reduced to of output voltage is lower than reference voltage, and comparer responds this variation, trigger gate drivers to connect the switching device shifter of the upper limit.Because voltage stabilizer is asynchronous, gate driving control signal needn't be waited for synchronous clock, as usually most of fixed-frequency PWM controlling schemes.
The principle of relevant such ripple voltage regulator comprises bigger ripple voltage, dc voltage precision, and switching frequency.Because slow comparer directly is provided with the amplitude of ripple voltage,, use a less slow voltage will reduce power conversion efficient when switching frequency during with less slow increase.In order to control the DC output voltage, regulate the peak value and the valley of output ripple voltage, this VD is the function of ripple waveform.The D. C. value of output voltage is the function of PWM duty factor.When becoming through the electric current of output inductor when discontinuous, output voltage waveforms also can change when underload, produces during one section quite long low-voltage quite short ' spike '.Because ripple voltage changes with incoming line and loading condition, be difficult to keep strict DC and regulate.
In addition, the improvement of capacitor technology can change the ripple waveform.Especially, the state of the art of ceramic capacitor has made the equivalent series resistance of ceramic capacitor or ESR (it produces the piecewise linearity or the triangular wave shape of output voltage waveforms) reduce to low-down value at present.Yet when low-down ESR value, the output voltage ripple shape is non-linear shape (for example, para-curve and a sinusoidal curve) from triangularity.This makes the output voltage overshoot, crosses slow threshold value, and causes the higher ripple of peak-to-peak value.As a result, in fact the special improvement of wanting to reduce DC-DC stabilizer output voltage ripple makes ripple increase when being used in ripple voltage regulator.
Incorporate first priority text for referencial use here into and introduced synthetic ripple voltage regulator, this voltage stabilizer comprises a synthetic ripple voltage generator.As what describe there, this generator produces ripple voltage auxiliary or ' synthesizing ', and this ripple voltage has duplicated the ripple current through output inductor effectively.This voltage stabilizer uses the comprehensive ripple voltage that produces to control the switching back and forth of slow comparer, to produce width modulation (PWM) signal of control voltage stabilizer switching.In unrestriced realization, trsanscondutance amplifier monitors the phase node voltage on the inductor, the electric current (inductor voltage-representative current) that inductor voltage is represented is supplied with ripple electric capacity, and this ripple capacitor produces synthetic ripple voltage.That uses that ripple regulates duplicates inductor current and will cause low output stage ripple, input voltage feed forward, and simplify compensation.
Incorporate second priority text for referencial use here into and introduced heterogeneous ripple voltage regulator, it uses with the upper limit and the lower threshold voltage slow comparer as benchmark.As described there, based on the difference between output voltage and input voltage or the ground, slow comparer monitors the main ripple voltage waveform that produces at the electric capacity two ends with current supply.The output of slow comparer produces a master clock signal, and this signal is connected to the PWM latch subsequently, the duration of various compositions in its state definition synthetic ripple voltage.Each PWM latch has first kind of state being introduced by selected master clock signal and stopped by a relevant phase voltage comparer, and this phase voltage comparer monitors and respectively is combined to voltage.This disclosure relates to the improvement and/or the variation of multiphase synthetic ripple voltage regulator.
Summary of the invention
According to the embodiment of the invention, the multiphase synthetic ripple voltage generator that is used for the DC-DC voltage stabilizer comprises; Produce the master clock circuit of master clock signal, the sequential logic and the ripple voltage regulator of each phase or each passage.The multi-phase DC-DC voltage stabilizer comprises a plurality of on-off circuits, an each on-off circuit response corresponding width modulation (PWM) signal, through a respective phase node one or more input voltages are switched through a corresponding output inductor, on an output node, jointly produce an output voltage.Sequential logic sequentially is provided with each pwm signal based on master clock signal.Each ripple generator comprises a trsanscondutance amplifier, a ripple capacitor and a comparer.Trsanscondutance amplifier contains an output terminal that is useful on an input end that is connected to a corresponding output inductor and is connected to a corresponding ripple capacitor.Capacitor contains the first input end that is connected to the ripple capacitor, receives second input end of error voltage and is connected to sequential logic, an output terminal of the corresponding pwm signal that is used to reset.
The trsanscondutance amplifier of every phase can dispose a non-inverting input that is connected to a respective phase node and an inverting input that is connected to output node or reference voltage.The ripple capacitor contains first end that is coupled to the trsanscondutance amplifier output terminal and is connected to second end of ground or output node.Ripple resistance can be coupled to the ripple capacitor, and setovers with voltage source, or through output node with output voltage as benchmark.
In one embodiment, use single input voltage, and master clock circuit comprises main ripple capacitor, main span is led amplifier circuit and slow capacitor circuit.Main span is led amplifier circuit and is contained an output terminal that is connected to main ripple capacitor, and contains first state and second state by master clock signal control.First state is provided, is used for main ripple capacitor being charged, second state is provided, be used for main ripple capacitor being discharged according to output voltage according to the voltage difference between input voltage and the output voltage.Slow comparator circuit comprises: an input end, and coupling ground compares the voltage and the error voltage of major clock ripple electric capacity; And an output terminal, master clock signal is provided.
Main span is led amplifying circuit can comprise first and second trsanscondutance amplifiers and an on-off circuit.In this situation, first main span is led amplifier and contained: first input end receives output voltage; Second input end receives output voltage; With an output terminal.Second main span is led amplifier and is contained: first input end, ground connection; Second input end receives output voltage; With an output terminal.On-off circuit contains: first terminals, be coupled to the output terminal that first main span is led amplifier; Second terminals are coupled to the output terminal that second main span is led amplifier; A common terminal is coupled to main ripple capacitor; With a control input end, receive a signal of expression master clock signal, be used for common terminal is connected to the terminals of a selection of first and second terminals of on-off circuit.
Slow comparator circuit can comprise first and second comparers, and voltage source and set-(set-reset) device resets.Voltage source provides a bias voltage with respect to error voltage.First comparer contains: first input end, be coupled to main ripple capacitor; Second input end receives error signal; With an output terminal.Second comparer contains first input end, receives bias voltage; Second input end is coupled to main ripple capacitor; And output terminal.Set-resetting means contains first input end, is coupled to the output terminal of first comparer; Second input end is coupled to the output terminal of second comparer; With an output terminal, provide master clock signal.
In an alternate embodiment, master clock circuit comprises main ripple capacitor, and main span is led amplifier, voltage source, comparer, single step device (one-shot device) and switch.Main span is led amplifier and is comprised an input end, receives output voltage or reference voltage; With an output terminal, be coupled to main ripple capacitor.Voltage source provides a bias voltage with respect to error voltage.Comparer contains first input end, is coupled to main ripple capacitor; Second input end receives bias voltage; With an output terminal.The single step device contains an input end, is coupled to the output terminal of comparer; With an output terminal, provide master clock signal.Switch contains first terminals, and this reception line end that is coupled is to receive error voltage; Second terminals are coupled to main ripple capacitor; And the control input end, receive master clock signal.
According to the multiphase synthetic ripple voltage regulator of one embodiment of the invention, every a plurality of on-off circuits, a plurality of output inductors, error amplifier, slow comparer clock circuit, sequential logic and ripple generator of comprising mutually.Each on-off circuit alternately is coupled to a respective phase node on the opposite polarity of a corresponding input voltage based on corresponding pwm signal.Each output inductor is coupling between a respective phase node and the output node, and output node produces the output voltage of a voltage stabilizing.Error amplifier produces an error voltage according to the comparison of the output voltage and the reference voltage of voltage stabilizing.Slow comparer clock circuit response output voltage and error signal, and produce master clock signal.Sequential logic sequentially produces each pwm signal according to master clock signal.Each ripple generator comprises trsanscondutance amplifier, ripple capacitor, and comparer.Trsanscondutance amplifier contains an input end, is coupled to a respective phase node; With an output terminal, be coupled to a corresponding ripple capacitor.Comparer contains first input end, is coupled to the ripple capacitor; Second input end receives error voltage; With an output terminal, be coupled to sequential logic, be used to stop a corresponding pwm signal.
Description of drawings
With reference to following description, and accompanying drawing can be understood benefit of the present invention, function, and advantage more.In the accompanying drawing
Fig. 1 is a simplification principle and a block diagram according to the multiphase synthetic ripple voltage regulator of an example embodiment realization of the present invention;
Fig. 2 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator of an example embodiment of the present invention, can be used for the two-phase voltage stabilizer as the multiphase synthetic ripple voltage generator of the heterogeneous voltage stabilizer of Fig. 1;
Fig. 3 illustrates sequential chart, describe to use the operation of heterogeneous voltage stabilizer of Fig. 1 of the multiphase synthetic ripple voltage generator of Fig. 2, is used for a kind of two-phase system;
Fig. 4 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator of another example embodiment of the present invention, can be as the multiphase synthetic ripple voltage generator of the heterogeneous voltage stabilizer of Fig. 1, be used for the two-phase voltage stabilizer, wherein ripple electric capacity is benchmark with the output voltage;
Fig. 5 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator of another example embodiment of the present invention, can be as the multiphase synthetic ripple voltage generator of the heterogeneous voltage stabilizer of Fig. 1, be used for the two-phase voltage stabilizer, wherein the trsanscondutance amplifier input end of every phase receives a reference voltage;
Fig. 6 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator of another example embodiment of the present invention, can be used for the two-phase voltage stabilizer as the synthetic ripple voltage generator of the heterogeneous voltage stabilizer of Fig. 1, contains the ripple resistance with the voltage source biasing;
Fig. 7 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator of another example embodiment of the present invention, can be as the multiphase synthetic ripple voltage generator of the heterogeneous voltage stabilizer of Fig. 1, be used for the two-phase voltage stabilizer, containing with the output voltage is the ripple resistance of benchmark;
Fig. 8 is the schematic diagram of a multiphase synthetic ripple voltage generator, and one or more of multiphase synthetic ripple voltage generator of describing Fig. 2 and 3-7 change, can be by any being used in combination of being liked with the general skilled person of those technology; And
Fig. 9 is the schematic diagram of a master clock circuit, describes a kind of alternative method that is used to produce master clock signal, and the MASTER RIPPLE (main ripple) that produces at ripple capacitor two ends.
Embodiment
Present following description, make the general skilled personnel of technology can make and use the present invention who is provided by within special applications notion and its needs.Yet the person skilled in the art will understand: to the various modifications of preferred embodiment, and the general principle of definition here can be applied to other embodiment.Therefore, the present invention is not inclined in the specific embodiments of placing restrictions on shown here and description, but it meets and disclosed here principle and the corresponding to category the most widely of novel capabilities.
Fig. 1 is a simplification schematic diagram and a block diagram according to the multiphase synthetic ripple voltage regulator 100 of an example embodiment realization of the present invention.Heterogeneous voltage stabilizer 100 comprises width modulation (PWM) controller or multiphase synthetic ripple voltage generator 101, with N pwm signal PWM1, and PWM2 ..., PWMN offers N gate driver GD1 separately, GD2 ..., GDN, N passage of formation voltage stabilizer 100.Numeral N is any positive integer greater than 1, comprises the N=2 in the two-phase situation.For first passage, the PWM1 signal offers first order gate driver GD1, and it controls switching on and off of a pair of power transfer device or switch Q11 and Q12.Especially, gate driver GD1 produces a switching signal UG1 to the doorstep, offers the control end (for example grid) of (upside) switch Q11, and produces an Xiamen switching signal LG1, offers down the control end of (or downside) switch Q12.In the demonstration of special configuration, switch Q11 and Q12 describe and are n channel metal oxide semiconductor field effect transistor (MOSFET), contain the leakage-source current path of series coupled between a pair of input supply terminal.In this configuration showed, input supply terminal produced the input voltage VIN 1 with respect to ground (GND).The electrical switching apparatus of expectation other types.Switch Q12 drain electrode is at phase node V
PHASE1(V
Phase 1) being coupled to the source electrode of switch Q11, this phase node is coupled to the end of output inductor L1.The other end of inductor L1 is coupled to a public output node VO, produces output signal VO.Here, the node that it produces has identical name with signal, except as otherwise noted.
The rest channels 2-N of voltage stabilizer 100 disposes by the mode identical with first passage basically.PWM2 (or PWMN) signal offers gate driver GD2 (or GDN), the gate driver provides signal UG2 and LG2 (or UGN and LGN), with driving switch Q21 and Q22 (or QN1 and QN2), these two driving switchs are at the Input voltage terminal with respect to ground, VIN2 (or VINN) for example, between phase node V
PHASE2(V
Phase 2) (or V
PHASEN(V
Phase N)) locate, link together.In one embodiment, input voltage VIN 1-VINN is identical voltage level, and in an alternate embodiment, one or more phase places can receive a different input voltage level.Phase node V
PHASE2(or V
PHASEN) be coupled to VO through output inductor L2 (or LN).The VO node is coupled to load reservoir capacitor 105 and load 107, and the two is a benchmark with electrical mains (for example GND) all.VIN and VO signal feedback are given multiphase synthetic ripple voltage generator 101.Couple to the heterogeneous or channel parallel of heterogeneous voltage stabilizer 100 to produce the VO signal.For heterogeneous voltage stabilizer 100, each passage comprises independently phase node and output inductor.The phase node V of each passage
PHASE1-V
PHASENIn each between VIN and ground or 0V, show big and fast transition, switch effectively, yet the output node that produces the VO signal is kept considerably stable.Like this, each inductor L1-LN produces sizable at run duration, leg-of-mutton ripple current signal.
Fig. 2 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator 200 of an example embodiment of the present invention, can be used as multiphase synthetic ripple voltage generator 101, and heterogeneous voltage stabilizer 100 is configured to the two-phase voltage stabilizer.From describe below, will easily understand the 26S Proteasome Structure and Function of multiphase synthetic ripple voltage generator 101, and as needs, its ripple generator expands to any several phase easily.Follow the complicacy of description in order to reduce accompanying drawing with them, the realization of two-phase is shown the heterogeneous example that reduces complicacy.
Multiphase synthetic ripple voltage generator 101 comprises " master " slow comparer, is made of upper threshold value and lower threshold value comparer 210 and 220, and their output is connected respectively to the setting (S) of set-reset flip-floop 230 and (R) input end that resets.The inverting input (-) 211 of coupling comparer 210 is to receive upper threshold voltage Vupper (V
On), and the non-inverting input (+) 221 of coupling comparer 220, to receive threshold voltages Vlower (V
Down), this is the bias V/2 that is lower than upper threshold voltage Vupper of a certain appointment.The Vupper signal is to produce a benchmark or " error " signal by error amplifier 103.A reference voltage V REF on error amplifier 103 its non-inverting inputs (+) of reception and the output signal VO on its inverting input (-).The non-inverting input (+) 212 of comparer 210 and the inverting input 222 of comparer 220 are couple to the common port 241 of gauge tap 240, and also are couple to ripple capacitor 245, and this common port is benchmark with ground.Switch 240 is by the noninverting Q output control of trigger 230.
The first input end 242 of switch 240 is couple to the output terminal of trsanscondutance amplifier 250, and second input end 243 of switch 240 is couple to the output terminal of trsanscondutance amplifier 260.Trsanscondutance amplifier 250 contains a non-inverting input 251 (+), connects this input end 251, receives input voltage VIN, thus, connects inverting input 252 (-) simultaneously, receives output voltage VO.Each has identical voltage level input voltage VIN 1-VINN, shows as VIN.Trsanscondutance amplifier 250 produces one and is directly proportional with difference between its is imported, promptly be directly proportional with VIN-VO, output current.Trsanscondutance amplifier 260 contains: noninverting input (+) 261 is couple to ground; With inverting input 262, couple this inverting input 262, receive output voltage VO.Trsanscondutance amplifier 260 produce with its input between difference be directly proportional, promptly with O-VO or-VO is directly proportional, output current.
The principle of work of voltage stabilizer 100, this heterogeneous voltage stabilizer 100 is used for the two-phase system.The top shows zigzag MASTER RIPPLE (main ripple) signal, respectively with respect to upper and lower bound threshold value Vupper and Vlower.The middle part jointly show PHASE1 RIPPLE and PHASE2 RIPPLE signal, each all is a serrate, with respect to upper limit threshold Vupper and with MASTER RIPPLE (main ripple) signal Synchronization.Attention: the Vupper threshold value either way be the same signal of same voltage level, but for more clearly describe and PHASE1 RIPPLE and PHASE2 RIPPLE signal between relation, still be repeated in this description.The bottom shows PWM1 and the PWM2 signal that produces on the Q output terminal of MASTER clk (major clock) signal on the QBAR output terminal of trigger 230 and output trigger 280 and 290 respectively.
At moment t0, MASTER RIPPLE signal initially is shown as decline and crosses lower threshold Vlower.In the time interval that arrives t0, the common port 241 of switch 240 is connected to input end 243, so that or simply with ground (0V)-VO-and electric current that VO is directly proportional is applied to capacitor 245, MASTER RIPPLE signal descended at first.When MASTER RIPPLE signal was crossed lower threshold Vlower, comparer 220 started at moment t1 subsequently, and trigger 230 is resetted.The latency delays time between t0 and the t1 is caused by second level influence circuit constantly.When trigger 230 is reset, its QBAR output terminal is forced into high level with MASTER clk signal, and sequential logic 270 is forced to high level with its output 271, delivers to the set input (P19-P20and the sequence logic 270asserts its output 271high to the set input of the PWM1 outputflip-flop 280.) of PWM1 output trigger 280.Respond by the PWM1 signal being forced to high level trigger 280 about moment t1.
Therebetween, the Q of trigger 230 exports step-down, makes switch 240 that its input end 242 is connected to end points 241, so that slow comparer 210 and 220 monitors the output of trsanscondutance amplifier 250.Start time of moment t 1 at interval, trsanscondutance amplifier 250 produces an output current, this output current is directly proportional with difference between its is imported, promptly is directly proportional with VIN-VO.Apply this electric current, capacitor 245 is charged, so that MASTER RIPPLE signal begins to increase at moment t1.At last, MASTER RIPPLE signal surpasses Vupper, and comparer 210 is started, and in that t2 is with trigger 230 set constantly subsequently, at that time, the QBAR of trigger output is drawn MASTER clk and is low level.MASTER clk signal is kept low level, till by comparer 220 trigger 230 being resetted once more.
When trigger 230 is set, its Q output makes switch 240 its input end 243 is connected to its common port 241, so that trsanscondutance amplifier 260 will impose on capacitor 245 again, the MASTER RIPPLE signal at capacitor 245 two ends was descended when the moment, t2 began with-negative current that VO is directly proportional.At last, at moment t4 subsequently, MASTER RIPPLE signal is crossed lower threshold Vlower again, so that comparer 220 starts (trip) again, trigger 230 is resetted.Operation repeatedly produces the MASTER RIPPLE signal as sawtooth in such a way.
The frequency of MASTER RIPPLE and MASTER clk signal is to be controlled by the relative voltage of input and output voltage VIN and VOUT and Vupper and Vlower.The increase of VIN causes current amplitude (VIN-VO) increase that is imposed on capacitor 245 by trsanscondutance amplifier 250, and therefore reducing MASTER RIPPLE signal reaches the required time of Vupper.On the contrary, the reduction of output voltage not only can cause the increase of the current amplitude (VIN-VO) that is applied by trsanscondutance amplifier 250, and the negative current amplitude reduction that trsanscondutance amplifier 260 is provided, the latter increases MASTER RIPPLE signal effectively and reaches the required time of lower threshold voltage Vlower.
PHASE1 RIPPLE signal descends at t0 constantly at first, till the moment t1 when the PWM1 signal is forced to high level.When the PWM1 signal became high level, the operation by gate driver GD1 was with V
PHASE1Signal drives and to be high level so that trsanscondutance amplifier 320 with V
PHASE1The electric current that-VO is directly proportional charges to capacitor 305, makes PHASE1 RIPPLE signal begin to increase about moment t2.At last, PHASE1 RIPPLE signal surpasses Vupper, and comparer 300 is started, and trigger 280 is resetted, and at the moment t3 PWM1 signal is drawn to be low level.The PWM1 signal is kept low level, until at subsequently moment t7 by trigger 280 again with trigger 280 set, till response MASTER clk signal.In the time interval from t3 to t7, trsanscondutance amplifier 320 with a negative current (based on it-VO input) be applied to capacitor 305, so that PHASE1 RIPPLE signal is pressed linear mode is downward-sloping, until till the next cycle of the PWM1 signal of t7 constantly.
Be outside one's consideration except the phase place of these two PHASE2 RIPPLE signals and PHASE1 RIPPLE signal differs 180 mutually, PHASE2 RIPPLE signal is by producing with the similar mode of PHASE1 RIPPLE signal by trsanscondutance amplifier 330 and capacitor 315.As directed, for example, at moment t1, t4, t7 etc., MASTER clk signal becomes high level, there, at moment t1 and t7
Anti-phase or the QBAR output terminal of trigger 230 is coupled to sequential logic circuits 270.Sequential logic circuits 270 can be embodied as it a counter, contains N output corresponding to the number of phases that produces.In present two-phase example, sequential logic circuits 270 contains first output terminal 271, is connected to the set input of SET/RESET (put 1/ and put 0) trigger 280; Reach second output terminal 272, be connected to SET (set) input end of SET/RESET trigger 290.This this purpose, sequential logic 270 can be implemented as the trigger that two-phase is used, or more than the shift register in the application of two-phase.The RESET of trigger 280 (resetting) input end is connected to the output terminal of comparer 300, simultaneously the RESET input end of trigger 290 is connected to the output terminal of comparer 310.
Couple the non-inverting input (+) 301 and 311 of comparer 300 and 310 respectively, to receive upper threshold voltage Vupper.Couple the inverting input (-) 302 of comparer 300, to receive PHASE1 RIPPLE (1 ripple mutually) voltage signal.Because offer the electric current of capacitor 305 by PHASE1 (phase 1) output of trsanscondutance amplifier 320, ripple electric capacity 305 two ends produce this PHASE1 RIPPLE voltage signal.Couple the inverting input (-) 312 of comparer 310, receive PHASE2 RIPPLE (2 ripples mutually) voltage signal, electric current owing to offered capacitor 315 by the output terminal of PHASE2 trsanscondutance amplifier 330 produces this PHASE2 RIPPLE voltage signal at the two ends of ripple capacitor 315.Capacitor 245,305 and 315 is " ripple " capacitors, with " the C that indicates
RIP" illustrate.
Sequential chart with reference to figure 3 will readily appreciate that heterogeneous each other pulse of MASTER clk signal that reach thereafter of using multiphase synthetic ripple voltage regulator 101, PWM1 becomes high level, yet in each other pulse of moment t4 and MASER clk signal, PWM2 becomes high level.The PHASE1RIPPLE signal is according to V
PHASE1-VO increases linearly, with sending of response PWM1 signal, until reach till the Vupper, comparer 300 is resetted trigger 280, and cancellation PWM1 signal, and PHASE1 RIPPLE signal foundation-VO reduces linearly then, and PWM1 is a low level simultaneously, until it becomes till the high level again.Similarly, PHASE2 RIPPLE signal is according to V
PHASE2-VO increases linearly, with sending of response PWM2 signal, until reach till the Vupper, comparer 310 is resetted trigger 290, and cancellation PWM2 signal, and PHASE2 RIPPLE signal foundation-VO reduces linearly then, and PWM2 is a low level simultaneously, until it becomes till the high level again.
Fig. 4 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator 400 of another example embodiment of the present invention, can be used as multiphase synthetic ripple voltage regulator 101, and heterogeneous voltage stabilizer 100 is configured to the two-phase voltage stabilizer.Heterogeneous synthetic line voltage generator 400 is substantially similar to multiphase synthetic ripple voltage generator 200, and wherein, similar parts are adopted as identical reference number.Yet in this situation, ripple capacitor 245,305 and 315 is to be benchmark with the output voltage VO, rather than ground connection.Multiphase synthetic ripple voltage generator 400 connects by comprising through ripple capacitor another feedback to VO, allows the variation of VO is produced more fast loop response.Quicker response is to provide with the potential cost that reduces heterogeneous voltage stabilizer 100 stability.In addition, though only described the situation of two-phase, be contemplated to a phase arbitrarily.
Fig. 5 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator 500 of another example embodiment of the present invention, can be used as multiphase synthetic ripple voltage generator 101, and heterogeneous voltage stabilizer 100 is configured to the two-phase voltage stabilizer.Multiphase synthetic ripple voltage generator 500 is substantially similar to multiphase synthetic ripple voltage generator 200, and wherein, similar parts adopt identical reference number.Yet in this situation, trsanscondutance amplifier 320 and 330 anti-phase input are connected to VREF, rather than VO.In multiphase synthetic ripple voltage generator 200,, cause feeding back relatively fast to reduce the potential cost of the loop stability in some configuration to the connection of VO, with the variation on the response VO.VREF is constant and does not change, the feasible VO feedback response characteristic that can eliminate on trsanscondutance amplifier 320,330 input ends.
Fig. 6 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator 600 of another one exemplary embodiment of the present invention, can be used as multiphase synthetic ripple voltage generator 101, and heterogeneous voltage stabilizer 100 is configured to the two-phase voltage stabilizer.Multiphase synthetic ripple voltage generator 600 is substantially similar to multiphase synthetic ripple voltage generator 200.Wherein, similar parts adopt identical reference number.In this situation, the first ripple resistance R RIP1 contains an end points that is coupled to trsanscondutance amplifier 320 output terminals and another end points that is coupled to the positive terminal of voltage source 601, and this voltage source contains the negative pole end that is coupled to ground (GND).Voltage source 601 produces an intermediate power supplies voltage VMID, and having is the voltage level of benchmark with multiphase synthetic ripple voltage generator 101 voltage sources approximately.Voltage source at multiphase synthetic ripple voltage generator 101 is that VMID is about 1.5V among the embodiment of 5V.Equally, the second ripple resistance R RIP2 contains an end points that is connected to trsanscondutance amplifier 330 output terminals and another end points that is connected to the positive terminal of voltage source 603, and this voltage source contains the negative pole end that is connected to ground (GND).Voltage source 603 also provides intermediate power supplies voltage VMID.
Voltage on each output inductor L1-LN contains a dc voltage level, intrinsic DCR (direct current resistance) by them causes at least in part, in addition, this DC voltage level is charged to corresponding ripple capacitor continuously, so that the voltage of each ripple capacitor tends to increase in time.For the two-phase situation, ripple resistance R RIP1 and RRIP2 discharge to ripple capacitor 305 and 315 respectively with suitable speed, to compensate or to prevent in addition the electric charge accumulation.Equally, in certain embodiments, the Tai Gao and/or too low that becomes of the DC voltage on the capacitor 305,315 is so that it is benchmark through sizable resistance R RIP1/RRIP2 with intermediate power supplies voltage VMID.Similar ripple resistance and the voltage source of having given each channel arrangement, and connect in a similar manner.The ripple capacitor of each passage and the RC time constant of ripple resistance are " zero " in heterogeneous voltage stabilizer 100 transfer functions of that passage.When selecting the particular element value so that each regulation loop when stablize, should be considered the influence that this is zero.
Fig. 7 is a simplification schematic diagram according to the multiphase synthetic ripple voltage generator 700 of another one exemplary embodiment of the present invention, can be used as multiphase synthetic ripple voltage generator 101, and heterogeneous voltage stabilizer 100 is configured to the two-phase voltage stabilizer.Multiphase synthetic ripple voltage generator 700 is substantially similar to multiphase synthetic ripple voltage generator 600.Wherein, similar parts adopt identical reference number.In this situation, ripple resistance R RIP1, RRIP2 is couple to the VO output signal, rather than VMID.This embodiment has eliminated the needs that an independent voltage source is provided for VMID, and provides better compensation for the VO in the various configurations changes.
Fig. 8 is the schematic diagram of a multiphase synthetic ripple voltage generator 700, and describe: one or more variations of leggy ripple voltage generator 200 and 300-700 can be used by combination in any, are appreciated as those technology skilled person.Once more, similar parts adopt identical reference number.As described, trsanscondutance amplifier 320,330 inverting input can be connected to VREF or be connected to VO, and ripple capacitor 305,315 can VO be a benchmark both, can GND be benchmark also, and ripple resistance R RIP1/RRIP2 selectively comprises, and with optional voltage level, comprises VMID, VO or VREF are benchmark.Like this, expect to have the combination in any of required variation.
Fig. 9 is the schematic diagram of a master clock circuit 900, describes a kind of alternative method that is used for producing MASTER RIPPLE and MASTER clk signal on capacitor 245.Trsanscondutance amplifier 901 contains its non-inverting input, be coupled with a selected signal among reception VO or the VREF, and its inverting input is connected to ground.It is the capacitor 245 of benchmark (or alternatively being benchmark with VO) that the output terminal of trsanscondutance amplifier 901 is connected to ground, is connected to the inverting input of comparer 80, and is connected to normal a unlatching, and one pole is singly thrown an end points of (SPST) switch SW.Another end points of switch SW receives the Vupper signal.The non-inverting input of comparer 80 receives the Vlower signal, and its output terminal is couple to the input end of single step device 82.Single step device 82) output terminal produces MASTER clk signal, and it offers the control input end of switch SW.
When operation, switch SW disconnects at first, and capacitor 245 and Vupper are disconnected.Capacitor 245 discharges continuously with the electric current that is directly proportional with VREF or VO.Be lower than or when crossing threshold value Vlower, the output of comparer 80 becomes high level when the voltage on the capacitor 245 drops to, start single step device 82, produce a MASTER clk signal pulse.MASTER clk signal becomes high level, and Closing Switch SW is so that the voltage on the capacitor 245 is reset to the Vupper value apace again.At quite short all after date, single step device 82 is reset to low level again with MASTER clk, so that switch SW disconnects again, allows 901 pairs of capacitors 245 of trsanscondutance amplifier to discharge.
Though described in detail the present invention with reference to some preferred mode, other modes and variation are possible and can expect.Those persons skilled in the art are to be understood that: they can be used as the basis of designing or revising other structures with disclosed notion and specific embodiments easily, so that identical purpose of the present invention to be provided, do not deviate from by spirit that defines in the following claim and category.
Claims (20)
1. multiphase synthetic ripple voltage generator that is used for leggy DC-DC voltage stabilizer, comprise a plurality of on-off circuits, each on-off circuit responds a corresponding signal in a plurality of pwm signals, with a respective nodes in a plurality of phase node, by a corresponding inductor in a plurality of output inductors, switch an input voltage at least, thereby produce an output voltage at an output node, described multiphase synthetic ripple voltage generator comprises:
Master clock circuit produces a master clock signal;
Sequential logic according to described master clock signal, sequentially is provided with each signal in described a plurality of pwm signal; And
A plurality of ripple generators, each comprises:
Trsanscondutance amplifier has an input end and an output terminal that is used for being coupled to a corresponding inductor of described output inductor;
The ripple capacitor is coupled to the described output terminal of described trsanscondutance amplifier; And
Comparer has: first input end, be coupled to described ripple capacitor; Second input end, this input end that is coupled is to receive error voltage; With an output terminal, be coupled to described sequential logic, corresponding pwm signal of described a plurality of pwm signal is used for resetting.
2. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that described trsanscondutance amplifier comprises: a non-inverting input is used for being coupled to node corresponding of described a plurality of phase node; With an inverting input, be used to be coupled to described output node.
3. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that described trsanscondutance amplifier comprises: a non-inverting input is used for being coupled to node corresponding of described a plurality of phase node; With an inverting input, be used to be coupled to a reference voltage.
4. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that described ripple capacitor comprises: first end, be coupled to the described output terminal of described trsanscondutance amplifier; With second end, be used to be coupled to described output node.
5. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that described ripple capacitor comprises: first end, be coupled to the described output terminal of described trsanscondutance amplifier; With second end, be coupled to ground.
6. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that each in described a plurality of ripple generators further comprises a ripple resistance, is couple to described ripple capacitor.
7. according to the described multiphase synthetic ripple voltage generator of claim 6, it is characterized in that described ripple resistance comprises: first end is couple to described ripple capacitor; With second end, be used to be couple to described output node.
8. according to the described multiphase synthetic ripple voltage generator of claim 6, it is characterized in that each in described a plurality of ripple generators further comprises:
With ground is the voltage source of benchmark; And
Described ripple resistance comprises: first end is couple to described ripple capacitor; With second end, be couple to described voltage source.
9. according to the described multiphase synthetic ripple voltage generator of claim 1, it is characterized in that each in described at least one input voltage comprises a single input voltage, and wherein, described master clock circuit comprises:
Main ripple capacitor;
Main span is led amplifier circuit, comprises an output terminal, is couple to described main ripple capacitor; And have first state and second state by the control of described master clock signal, described first state charges to described main ripple capacitor according to the voltage difference between described input voltage and described output voltage, and described second state discharges to described main ripple capacitor according to described output voltage; And
Slow comparator circuit comprises: an input end, and this input end that is coupled compares the voltage and the described error voltage of described main ripple capacitor; And an output terminal, described master clock signal is provided.
10. according to the described multiphase synthetic ripple voltage generator of claim 9, it is characterized in that described main span is led amplifier circuit and comprised:
First main span is led amplifier, comprising: first input end is used to receive described input voltage; Second input end is used to receive described output voltage; With an output terminal;
Second main span is led amplifier, comprising: first input end, be coupled to ground; Second input end is used to receive described output voltage; With an output terminal; And
On-off circuit comprises: first end, be coupled to the described output terminal that described first main span is led amplifier; Second end is coupled to the described output terminal that described second main span is led amplifier; A common port is coupled to described main ripple capacitor; And a control input end, receive a signal representing described master clock signal, be used for described common port is coupled to a selected end points of described first and second ends;
11., it is characterized in that described slow comparator circuit comprises according to the described multiphase synthetic ripple voltage generator of claim 9:
First comparer comprises: first input end, be coupled to described main ripple capacitor; Second input end receives described error voltage; With an output terminal;
Voltage source provides a bias voltage with respect to described error voltage;
Second comparer comprises: first input end receives described bias voltage; Second input end is coupled to described main ripple capacitor; With an output terminal; And
Set-resetting means comprises: first input end, be coupled to the described output terminal of described first comparer; Second input end is coupled to the described output terminal of described second comparer; And an output terminal, described master clock signal is provided.
12., it is characterized in that described master clock circuit comprises according to the described multiphase synthetic ripple voltage generator of claim 1:
Main ripple capacitor;
Main span is led amplifier, comprising: an input end is used to receive described output voltage; With an output terminal, be coupled to described main ripple capacitor;
Voltage source provides a bias voltage with respect to described error voltage;
Comparer comprises: first input end, be coupled to described main ripple capacitor; Second input end receives described bias voltage; And output terminal;
The single step device comprises: an input end, be coupled to the described output terminal of described comparer; With an output terminal, provide described master clock signal; And
Switch comprises: first terminals, and these terminals that are coupled receive described error voltage; Second terminals are coupled to described main ripple capacitor; And a control input end, receive described master clock signal.
13., it is characterized in that described master clock circuit comprises according to the described multiphase synthetic ripple voltage generator of claim 1:
Main ripple capacitor;
Main span is led amplifier, comprising: an input end receives a reference voltage; With an output terminal, be coupled to described main ripple capacitor;
Voltage source provides a bias voltage with respect to described error voltage;
Comparer comprises: first input end, be coupled to described main ripple capacitor; Second input end receives described bias voltage; With an output terminal;
The single step device comprises: an input end, be coupled to the described output terminal of described comparer; With an output terminal, provide described master clock signal; And
Switch comprises: first terminals, couple this terminals, and receive described error voltage; Second terminals are couple to described main ripple capacitor; With a control input end, receive described master clock signal.
14. one kind produces a plurality of synthetic ripple voltage method, phase place with control multi-phase DC-DC voltage stabilizer, described voltage stabilizer comprises a plurality of on-off circuits, each on-off circuit responds corresponding signal in a plurality of pwm signals, with a respective nodes in a plurality of phase node,, switch an input voltage by a respective inductor in a plurality of output inductors, to produce an output voltage at an output node, described method comprises:
An output voltage and reference voltage are compared, an error voltage is provided;
Produce a tilt voltage according to one in described output voltage and described reference voltage selection voltage, described reference voltage is used to be provided with the level of described output voltage;
According to the comparison of described error voltage and described tilt voltage, produce master clock signal;
According to described master clock signal, sequentially start each signal in described a plurality of pwm signal;
Produce a plurality of ripple voltages, each ripple voltage indication is through the electric current of a respective inductor in the described output inductor; And
According to the ripple voltage that corresponding and described error voltage compares, each pwm signal resets.
15. in accordance with the method for claim 14, it is characterized in that a plurality of ripple voltages of described generation comprise:
Sensing is applied to the voltage on each output inductor;
With the voltage transitions of each sensing is current sensor; And
With a corresponding sensing electric current a corresponding capacitive means is charged.
16. in accordance with the method for claim 15, it is characterized in that described sensing voltage comprises the voltage between respective phase node of sensing and the described reference voltage.
17. in accordance with the method for claim 15, it is characterized in that a described corresponding capacitance device is charged comprises: described corresponding capacitance device benchmark is arrived described output voltage.
18. in accordance with the method for claim 15, it is characterized in that, further comprise a corresponding ripple resistance device is coupled to corresponding capacitive means.
19. in accordance with the method for claim 18, it is characterized in that, further comprise with the corresponding ripple resistance device of setovering of a selected voltage in described output voltage, described reference voltage and the mid-point voltage source.
20. in accordance with the method for claim 14, it is characterized in that,
Tilt voltage of described generation comprises that the voltage transitions with a described selection in described output voltage and the described reference voltage is an electric current; And
Wherein, master clock signal of described generation comprises:
The electric current that comes with the voltage transitions of a described selection from described output voltage and described reference voltage discharges to a capacitive means;
A bias voltage that is relevant to described error voltage is provided;
The described voltage and the described bias voltage of described capacitive means are compared;
When the described voltage of described capacitive means drops to the level of described bias voltage, described master clock signal is transformed into first logic level;
When described major clock changes described first logic level into, described capacitive means is connected to described error voltage, described capacitive means is charged to the level of described error voltage;
When the described voltage of described capacitive means reaches the described level of described error voltage, change described master clock signal into second logic level; And
When described major clock changes described first logic level into, capacitive means and described error voltage are disconnected.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/673,684 | 2003-09-29 | ||
| US10/853,022 US7019502B2 (en) | 2002-09-06 | 2004-05-25 | Synchronization of multiphase synthetic ripple voltage regulator |
| US10/853,022 | 2004-05-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1702585A CN1702585A (en) | 2005-11-30 |
| CN100422897C true CN100422897C (en) | 2008-10-01 |
Family
ID=35632361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100831143A Active CN100422897C (en) | 2003-09-29 | 2004-09-29 | Synchronization of multiphase synthetic ripple voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100422897C (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104283423B (en) * | 2013-06-21 | 2017-06-27 | 麦奎尔有限公司 | The power-supply system and method for output current are provided under adjusted system output voltage |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101145065B (en) * | 2006-09-11 | 2010-09-08 | 瑞昱半导体股份有限公司 | Switching type voltage stabilizing device with over current protection |
| CN101465622B (en) * | 2007-12-18 | 2011-01-12 | 北京东微世纪科技有限公司 | D-genus audio power amplifier |
| US7898310B2 (en) * | 2008-09-30 | 2011-03-01 | Intersil Americas Inc. | Phase doubler |
| CN101807904B (en) * | 2009-02-17 | 2012-07-18 | 达尔科技股份有限公司 | Improved structure of pulse width modulation controller |
| US8232782B2 (en) * | 2009-11-12 | 2012-07-31 | Intersil Americas Inc. | System and method for equalizing the small signal response of variable phase voltage regulators |
| CN102447390B (en) * | 2010-10-09 | 2014-07-02 | 登丰微电子股份有限公司 | Multiphase control system and control units |
| CN103208917A (en) * | 2012-01-12 | 2013-07-17 | 登丰微电子股份有限公司 | Multi-phase DC-to-DC (Direct Current) conversion controller and control method thereof |
| US9397567B2 (en) * | 2014-02-05 | 2016-07-19 | Apple Inc. | Shunt integrated voltage regulator |
| US9401638B2 (en) * | 2014-03-05 | 2016-07-26 | Texas Instruments Deutschland Gmbh | System and method for single phase transition for multiphase DCDC converters |
| CN116232066B (en) * | 2023-05-09 | 2023-07-21 | 江苏芯潭微电子有限公司 | Power output control circuit for multiphase system and power supply system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6462525B1 (en) * | 2000-02-14 | 2002-10-08 | Linear Technology Corp. | Polyphase PWM converter with high efficiency at light loads |
| US6583609B1 (en) * | 2001-05-01 | 2003-06-24 | Integration Associates Inc. | Automatic bandwidth and stability control for switched pulse width modulation voltage regulator |
| CN1436392A (en) * | 2000-06-15 | 2003-08-13 | 英特尔公司 | Multi-phase pulse width modulated voltage regulator |
-
2004
- 2004-09-29 CN CNB2004100831143A patent/CN100422897C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6462525B1 (en) * | 2000-02-14 | 2002-10-08 | Linear Technology Corp. | Polyphase PWM converter with high efficiency at light loads |
| CN1436392A (en) * | 2000-06-15 | 2003-08-13 | 英特尔公司 | Multi-phase pulse width modulated voltage regulator |
| US6583609B1 (en) * | 2001-05-01 | 2003-06-24 | Integration Associates Inc. | Automatic bandwidth and stability control for switched pulse width modulation voltage regulator |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104283423B (en) * | 2013-06-21 | 2017-06-27 | 麦奎尔有限公司 | The power-supply system and method for output current are provided under adjusted system output voltage |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1702585A (en) | 2005-11-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1519473B1 (en) | Synchronization of multiphase synthetic ripple voltage regulator | |
| EP3537585B1 (en) | Switched-capacitor converter with interleaved half bridges | |
| US6922044B2 (en) | Synchronization of multiphase synthetic ripple voltage regulator | |
| JP3981083B2 (en) | Synthetic ripple regulator | |
| CN106664020B (en) | Shared bootstrap capacitor and method for multi-phase buck converter circuit | |
| US7132820B2 (en) | Synthetic ripple regulator | |
| TWI331841B (en) | Dc-to-dc converter with improved transient response | |
| US8824167B2 (en) | Self synchronizing power converter apparatus and method suitable for auxiliary bias for dynamic load applications | |
| CN102027662B (en) | Current-mode control switching regulator and operations control method thereof | |
| US7898233B2 (en) | Multiphase voltage regulators and methods for voltage regulation | |
| CN101040421B (en) | Switching regulator control circuit, switching regulator using the circuit, and switching signal generating apparatus | |
| CN103404012A (en) | Control for switching between PWM and PFM operation in buck converter | |
| KR20010014757A (en) | Multiple output buck converter with single inductor | |
| CN103023317A (en) | Dc/dc converter | |
| CN100422897C (en) | Synchronization of multiphase synthetic ripple voltage regulator | |
| CN114944756A (en) | Control circuit, corresponding electronic converter device and method | |
| CN211481150U (en) | Electronic device, microcontroller and buck converter | |
| CN110391730B (en) | Negative charge pump for doubling the output voltage range of a boost LED driver | |
| CN1330081C (en) | DC-to-DC converter with improved transient response | |
| JP2003319644A (en) | Dc-dc converter | |
| JP2002354822A (en) | Switching regulator | |
| CN115833582B (en) | Buck-boost converter, controller and control method thereof | |
| KR20180126940A (en) | Buck-boost dc/dc converter | |
| CN115765406A (en) | Buck-boost converter and control circuit and control method thereof | |
| JP2008178177A (en) | Synchronous rectification type dc-dc converter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |