CN100420620C - Method for manufacturing electric tunable optical filter chip of micro-electrical-mechanical system - Google Patents
Method for manufacturing electric tunable optical filter chip of micro-electrical-mechanical system Download PDFInfo
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- CN100420620C CN100420620C CNB2005100624843A CN200510062484A CN100420620C CN 100420620 C CN100420620 C CN 100420620C CN B2005100624843 A CNB2005100624843 A CN B2005100624843A CN 200510062484 A CN200510062484 A CN 200510062484A CN 100420620 C CN100420620 C CN 100420620C
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Abstract
The present invention discloses a preparation method for electricity tunable optical electric filter chips in a micro electric machinery system (MEMS). The present invention has the procedures: 1, photo etching of a lower electrode graph on the surface of the silicon chip; 2, chromium/ gold film evaporation; 3, hyperacoustic stripping; 4, earth silicon sacrificial layer deposition; 5, photo etching corrosion of an isolation groove graph; 6, chromium evaporation as a cover layer; 7, hyperacoustic stripping; 8, dry etching of the earth silicon arranged in the isolation groove; 9, chromium removal; 10, silicon nitride deposition; 11, photo etching of an upper electrode graph; 12, chromium/ gold film evaporation and coating; 13, hyperacoustic stripping; 14, photo etching of etch holes; 15, dry etching of silicon nitride; 16, earth silicon sacrificial layer removal in a wet method; 17, structure relief. Electricity Tunable optical filters of a micro electric machinery system made of the chips can reuse or relieve reuse signals transferred by different wave lengths of optical fibers, or can be used as light plug-in/add-multiplexer (OADM) in light network.
Description
Technical field
The present invention relates to the preparation method of a kind of microelectromechanical systems (MEMS) electric tunable optical filter chip, belong to the microelectronic component preparing technical field.
Background technology
Tunable optical filter is a kind of core devices in the modern broadband light net.In wavelength-division multiplex optical fiber optical-fiber network, the signal that different wave length in the optical fiber is transmitted carries out multiplexing or demultiplexing, perhaps is used as light and inserts/division multiplexer (OADM) in optical-fiber network.
The present invention has provided the preparation method of microelectromechanical systems (MEMS) electric tunable optical filter chip core.Microelectromechanical systems (MEMS) electric tunable optical filter is compared with common optical filter has the advantage that volume is little, easy of integration, cost is low, tuning performance is good.
Summary of the invention
The preparation method who the purpose of this invention is to provide a kind of microelectromechanical systems (MEMS) electric tunable optical filter chip.
For achieving the above object, technical solution of the present invention is: the preparation method of microelectromechanical systems electric tunable optical filter chip comprises the following steps:
The first step: select for use common silicon chip to do substrate, on substrate, be coated with the optics photoresist, obtain the bottom electrode figure through behind the exposure imaging;
Second step: the silicon chip after will developing adopts oxygen to remove primer in reactive ion etching, 55 ~ 65 milliliters of per seconds of flow, plasma bias power is 10 ~ 15 watts, remove primer after slice, thin piece send into evaporator immediately, the employing electron beam evaporation process evaporates chromium/gold thin film;
The 3rd step: the substrate that evaporated metal film is placed the acetone vessel, and photoresist on the ultrasonic wave removal silicon chip and the chromium/gold thin film on the glue, obtain the bottom electrode figure;
The 4th step: on the bottom electrode of chromium/gold, adopt plasma enhanced chemical vapor deposition technology deposit silicon dioxide sacrificial layer, thickness 1100 ~ 1300nm;
The 5th step: the figure that on silicon dioxide layer, makes the corrosion isolation channel by lithography;
The 6th step: adopt electron beam evaporation process evaporation chromium film above silicon dioxide sacrificial layer and photoresist, the thickness of chromium film is 45 ~ 55nm;
The 7th step: adopt ultrasonic stripping technology, remove on the silica membrane positive glue and on the chromium film, make the dry etching masking graphics of chromium;
The 8th step: it is saturating to adopt dry process reaction ion etching technology that the silica in the isolation channel is carved under chromium is sheltered, and obtains isolation moat structure;
The 9th step: adopt the chromium masking film on the liquid wet etching method removal silica that dechromises;
The tenth step: adopt the low-pressure chemical vapor deposition process deposit silicon nitride on silica, deposition thickness is 180 ~ 220nm;
The 11 step: adopt photoresist to make the top electrode figure by lithography on the surface of silicon nitride;
The 12 step: adopt the surperficial evaporation chromium/gold film electrode of electron beam evaporation process at silicon nitride and photoresist;
The 13 the step: adopt ultrasonic stripping technology, remove on the silicon nitride film positive glue and on chromium/gold thin film, make the top electrode figure;
The 14 step: above the top electrode figure, adopt photoresist to make the figure in wet etching hole by lithography;
The 15 step: it is saturating to adopt dry process reaction ion etching technology that the silicon nitride in the etch pit is carved under glue is sheltered, and obtains the etch pit structure;
The 16 step: adopt HF buffered etch liquid,, the silicon dioxide sacrificial layer below the silicon nitride film is eroded fully by etch pit;
The 17 step: after treating that sacrifice layer corrosion is intact, whole silicon wafer is taken out from corrosive liquid and put into absolute ethyl alcohol at once the moisture in unsettled chamber is replaced, and then put into acetone ethanol is replaced, put into ether at last and replace acetone, because ether volatilizees in air and be exceedingly fast, so from ether, take out behind air drying when silicon chip, just form the movable membrane structure that is suspended on the cavity body, be the optical window reflectance coating, so far, the filter chip preparation finishes.
The preparation method of described microelectromechanical systems electric tunable optical filter chip, its described substrate is common silicon chip, thickness is 480 ~ 520 μ m.
The preparation method of described microelectromechanical systems electric tunable optical filter chip, optics etching glue in its described first step, the 5th step, the 11 step and the 14 step is the S9912 optics etching glue, glue is thick to be 1000~1500nm.
The preparation method of described microelectromechanical systems electric tunable optical filter chip, in its described second step and the 12 step, deposited by electron beam evaporation technology evaporation chromium/gold thin film, be to evaporate chromium thickness 35 ~ 45nm earlier, evaporated gold thickness 55 ~ 65nm then, silicon chip near zone temperature is 24~26 ℃ in the evaporation process.
The preparation method of described microelectromechanical systems electric tunable optical filter chip, HF buffered etch liquid in its described the 16 step, its proportioning is NH
4F (40%): HF (49%)=7: 1.
The preparation method of described microelectromechanical systems electric tunable optical filter chip, its described optical window reflectance coating, it is of a size of 400 μ m * 400 μ m.
The inventive method is particularly suitable for being used for preparing microelectromechanical systems (MEMS) electric tunable optical filter chip.This chip and collimation lens and the two optical fiber integrations of input and output single mode are encapsulated in quartz or the ceramic pipe box, add external voltage, just can make microelectromechanical systems (MEMS) electric tunable optical filter device.This device can be applied in the wavelength-division multiplex optical fiber optical-fiber network very widely.
Description of drawings
Fig. 1 to Figure 16 is the technological operation schematic flow sheet of the inventive method;
Figure 17 is the schematic perspective view with microelectromechanical systems (MEMS) electric tunable optical filter chip of the inventive method making;
Figure 18 is the A-A generalized section of Figure 17.
The specific embodiment
Now be described with reference to the accompanying drawings technical scheme of the present invention.According to the preparation method of above-described microelectromechanical systems (MEMS) electric tunable optical filter chip, its operating procedure is:
The first step makes bottom electrode figure 102 by lithography on silicon chip 101 surfaces.
As shown in Figure 1, select for use common silicon chip to do substrate 101, the thickness of substrate is 500 μ m, is coated with the S9912 optics etching glue on substrate, and the thick 1000-1500nm of glue obtains bottom electrode figure 102 through behind the exposure imaging;
Second step evaporation chromium/gold thin film 103.
As shown in Figure 2, silicon chip after at first will developing adopts oxygen to remove primer in reactive ion etching (RIE), 60 milliliters of per seconds of flow, plasma bias power is 10 watts, slice, thin piece is sent into evaporator immediately after removing primer, adopt electron beam evaporation process evaporation chromium thickness 40nm earlier, evaporated gold thickness 60nm then, silicon chip near zone temperature is 25 ℃ in the evaporation process;
Ultrasonic peeling off of the 3rd step.
As shown in Figure 3, the substrate that evaporated metal film is placed the acetone vessel, and photoresist 102 on the ultrasonic wave removal silicon chip 101 and the chromium/gold thin film 103 on the glue, bottom electrode figure 103 obtained;
The 4th step deposit silicon dioxide sacrificial layer 104.
As shown in Figure 4, on gold electrode 103, adopt plasma enhanced chemical vapor deposition (PECVD) technology deposit silicon dioxide sacrificial layer 104, thickness 1200nm;
The 5th step photoetching corrosion isolation channel figure 105.
As shown in Figure 5, on silica 1 04, make the figure 105 of corrosion isolation channel by lithography;
The 6th step evaporation chromium is as masking layer 106.
As shown in Figure 6, adopt electron beam evaporation process evaporation chromium film 106 above silicon dioxide sacrificial layer 104 and photoresist 105, the thickness of chromium film is 50nm;
Ultrasonic peeling off of the 7th step.
As shown in Figure 7, adopt ultrasonic stripping technology, remove on the silica membrane 104 positive glue 105 and on chromium film 106, make the dry etching masking graphics 107 of chromium;
Silica in the 8th step dry etching isolation channel.
As shown in Figure 8, it is saturating to adopt dry process reaction ion etching (RIE) technology that the silica in the isolation channel is carved under chromium is sheltered, and till gold electrode 103, obtains isolation moat structure 108;
The 9th goes on foot the film 106 that dechromises.
As shown in Figure 9, adopt the liquid wet etching method that dechromises to remove chromium masking film 106 on the silica 1 04;
The tenth step deposit silicon nitride 109.
As shown in figure 10, adopt low-pressure chemical vapor deposition process (LPCVD) deposit silicon nitride 109 on silica 1 04, deposition thickness is 200nm;
The 11 step photoetching top electrode figure 110.
As shown in figure 11, adopt the S9912 photoresist to make top electrode figure 110 by lithography on the surface of silicon nitride 109;
The 12 step evaporation chromium/gold film electrode, promptly top electrode 111.
As shown in figure 12, adopt the surperficial evaporation chromium/gold film electrode of electron beam evaporation process, chromium thickness 40nm, golden thickness 60nm at silicon nitride 109 and photoresist 110;
Ultrasonic peeling off of the 13 step.
As shown in figure 13, adopt ultrasonic stripping technology, remove on the silicon nitride film 109 positive glue 110 and on chromium/gold thin film 111, make top electrode figure 112;
The 14 step photoetching wet etching hole pattern 113.
As shown in figure 14, above top electrode figure 112, adopt S9912 glue to make the figure 113 in wet etching hole by lithography;
The 15 step etch silicon nitride film 109.
As shown in figure 15, it is saturating to adopt dry process reaction ion etching (RIE) technology that the silicon nitride in the etch pit is carved under glue is sheltered, and till silicon dioxide sacrificial layer 104, obtains etch pit structure 114;
The 16 step wet method is removed silicon dioxide sacrificial layer 104.
As shown in figure 16, adopt HF buffered etch liquid (BHF), by etch pit 114, the silicon dioxide sacrificial layer 104 of silicon nitride film 109 belows is eroded fully, the proportioning of buffered etch liquid (BHF) is NH
4F (40%): HF (49%)=7: 1;
The 17 step releasing structure.
After treating that sacrifice layer 104 corrodes, whole silicon wafer is taken out from corrosive liquid and put into absolute ethyl alcohol at once the moisture in unsettled chamber is replaced, and then put into acetone ethanol is replaced, put into ether at last and replace acetone, because ether volatilizees in air and is exceedingly fast, so when silicon chip takes out behind air drying from ether, just form the movable membrane structure 115 that is suspended on the cavity body, it is the optical window reflectance coating, the optical window reflectance coating is of a size of 400 μ m * 400 μ m, so far, the filter chip preparation finishes.As shown in figure 17, be the schematic perspective view of microelectromechanical systems (MEMS) electric tunable optical filter chip finally finished; Figure 18 is the A-A generalized section of device.
Claims (6)
1. a microelectromechanical systems method for manufacturing electric tunable optical filter chip is characterized in that, comprises the following steps:
The first step: select for use common silicon chip to do substrate, on substrate, be coated with the optics photoresist, obtain the bottom electrode figure through behind the exposure imaging;
Second step: the silicon chip after will developing adopts oxygen to remove primer in reactive ion etching, 55 ~ 65 milliliters of per seconds of flow, plasma bias power is 10 ~ 15 watts, remove primer after slice, thin piece send into evaporator immediately, the employing electron beam evaporation process evaporates chromium/gold thin film;
The 3rd step: the substrate that evaporated metal film is placed the acetone vessel, and photoresist on the ultrasonic wave removal silicon chip and the chromium/gold thin film on the glue, obtain the bottom electrode figure;
The 4th step: on the bottom electrode of chromium/gold, adopt plasma enhanced chemical vapor deposition technology deposit silicon dioxide sacrificial layer, thickness 1100 ~ 1300nm;
The 5th step: the figure that on silicon dioxide layer, makes the corrosion isolation channel by lithography;
The 6th step: adopt electron beam evaporation process evaporation chromium film above silicon dioxide sacrificial layer and photoresist, the thickness of chromium film is 45 ~ 55nm;
The 7th step: adopt ultrasonic stripping technology, remove on the silica membrane positive glue and on the chromium film, make the dry etching masking graphics of chromium;
The 8th step: it is saturating to adopt dry process reaction ion etching technology that the silica in the isolation channel is carved under chromium is sheltered, and obtains isolation moat structure;
The 9th step: adopt the chromium masking film on the liquid wet etching method removal silica that dechromises;
The tenth step: adopt the low-pressure chemical vapor deposition process deposit silicon nitride on silica, deposition thickness is 180 ~ 220nm;
The 11 step: adopt photoresist to make the top electrode figure by lithography on the surface of silicon nitride;
The 12 step: adopt the surperficial evaporation chromium/gold film electrode of electron beam evaporation process at silicon nitride and photoresist;
The 13 the step: adopt ultrasonic stripping technology, remove on the silicon nitride film positive glue and on chromium/gold thin film, make the top electrode figure;
The 14 step: above the top electrode figure, adopt photoresist to make the figure in wet etching hole by lithography;
The 15 step: it is saturating to adopt dry process reaction ion etching technology that the silicon nitride in the etch pit is carved under glue is sheltered, and obtains the etch pit structure;
The 16 step: adopt HF buffered etch liquid,, the silicon dioxide sacrificial layer below the silicon nitride film is eroded fully by etch pit;
The 17 step: after treating that sacrifice layer corrosion is intact, whole silicon wafer is taken out from corrosive liquid and put into absolute ethyl alcohol at once the moisture in unsettled chamber is replaced, and then put into acetone ethanol is replaced, put into ether at last and replace acetone, because ether volatilizees in air and be exceedingly fast, so from ether, take out behind air drying when silicon chip, just form the movable membrane structure that is suspended on the cavity body, be the optical window reflectance coating, so far, the filter chip preparation finishes.
2. the preparation method of microelectromechanical systems electric tunable optical filter chip according to claim 1 is characterized in that, described substrate is common silicon chip, and thickness is 480 ~ 520 μ m.
3. the preparation method of microelectromechanical systems electric tunable optical filter chip according to claim 1, it is characterized in that, optics etching glue in the described first step, the 5th step, the 11 step and the 14 step is the S9912 optics etching glue, and glue is thick to be 1000~1500nm.
4. the preparation method of microelectromechanical systems electric tunable optical filter chip according to claim 1, it is characterized in that, in described second step and the 12 step, deposited by electron beam evaporation technology evaporation chromium/gold thin film, be to evaporate chromium thickness 35 ~ 45nm earlier, evaporated gold thickness 55 ~ 65nm then, silicon chip near zone temperature is 24~26 ℃ in the evaporation process.
5. the preparation method of microelectromechanical systems electric tunable optical filter chip according to claim 1 is characterized in that, HF buffered etch liquid in described the 16 step, and its proportioning is NH
4F (40%): HF (49%)=7: 1.
6. the preparation method of microelectromechanical systems electric tunable optical filter chip according to claim 1 is characterized in that, described optical window reflectance coating, and it is of a size of 400 μ m * 400 μ m.
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CN101276020B (en) * | 2007-03-28 | 2010-04-14 | 中国科学院微电子研究所 | Method for preparing microelectron mechanical system optical multiplexer chip |
WO2015059511A1 (en) * | 2013-10-22 | 2015-04-30 | Commissariat à l'énergie atomique et aux énergies alternatives | Optomechanical device with mechanical elements and optical filters for actuating and/or detecting the movement of the elements |
CN107628588A (en) * | 2017-08-31 | 2018-01-26 | 瑞声科技(新加坡)有限公司 | A kind of preparation method of acid solution and silicon capacitor microphone |
CN112645275A (en) * | 2020-12-11 | 2021-04-13 | 中国科学院微电子研究所 | Metal microelectrode applied to high-temperature pressure sensor and preparation method thereof |
CN113800465B (en) * | 2021-08-23 | 2024-03-22 | 天津工业大学 | Process manufacturing method of capacitive micromachined ultrasonic transducer |
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CN1487333A (en) * | 2003-05-26 | 2004-04-07 | 华东师范大学 | Prepn process of NEMS electrically adjustable light attenuator chip |
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JPH09115925A (en) * | 1995-10-16 | 1997-05-02 | Nec Corp | Manufacturing method for field effect transistor |
US6596624B1 (en) * | 1999-07-31 | 2003-07-22 | International Business Machines Corporation | Process for making low dielectric constant hollow chip structures by removing sacrificial dielectric material after the chip is joined to a chip carrier |
CN1380245A (en) * | 2002-05-16 | 2002-11-20 | 华东师范大学 | Production method of millimetric wave voltage-controlled phase shifter for microelectronic machine |
CN1487333A (en) * | 2003-05-26 | 2004-04-07 | 华东师范大学 | Prepn process of NEMS electrically adjustable light attenuator chip |
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