CN100413276C - High-speed cell flow receiving and transmitting test device and method - Google Patents

High-speed cell flow receiving and transmitting test device and method Download PDF

Info

Publication number
CN100413276C
CN100413276C CNB021544123A CN02154412A CN100413276C CN 100413276 C CN100413276 C CN 100413276C CN B021544123 A CNB021544123 A CN B021544123A CN 02154412 A CN02154412 A CN 02154412A CN 100413276 C CN100413276 C CN 100413276C
Authority
CN
China
Prior art keywords
cell
receiving
module
transmitting
original
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB021544123A
Other languages
Chinese (zh)
Other versions
CN1507223A (en
Inventor
李占有
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
Original Assignee
Huawei Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Priority to CNB021544123A priority Critical patent/CN100413276C/en
Publication of CN1507223A publication Critical patent/CN1507223A/en
Application granted granted Critical
Publication of CN100413276C publication Critical patent/CN100413276C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present invention provides a detection device and a method for sending and receiving cell flows. The detection method for sending and receiving cell flows at high speed comprises the following steps: a. writing in a test cell, and initializing the cell to a sending buffer memory to form an original cell; b. reading the original cell of the sending buffer memory to send the original cell; c. receiving a returned cell; d. comparing the returned cell and the original cell to obtain a comparison result, and simultaneously, storing the returned cell in a receiving buffer memory. The detection device for sending and receiving cell flows at high speed comprises a receiving-sending comparison module for initializing the test cell, sending the original cell, receiving the returned cell and comparing the original cell and the returned cell, a receiving buffer memory module for storing the returned cell and a receiving-sending interface module for sending the original cell and receiving the returned cell. The present invention widens the test range of an ATM, and is convenient to test. In addition, the present invention can be expanded to any data test with fixed frame length.

Description

The checkout gear and the method for the transmitting-receiving of a kind of high-speed information element stream
Technical field
The present invention relates to technical field of data transmission, specifically refer to a kind of checkout gear and method of cell flow transmitting-receiving.
Background technology
In the communication technology in modern times, cell exchange technology is used very general, especially ATM (Asynchronous Transfer Mode) technology, it is as the continuous evolution along with the communication technology of the core technology of broadband connections, obtain development at full speed especially, based on the access way of ATM exchange emerge in an endless stream (as ADSL, 3G radio communication or the like), therefore, we are necessary to explore ATM high-speed information element stream transmitting-receiving detection method, and on the basis of the method development and testing equipment, satisfy the needs of current Communications Market to atm feature or performance test.In atm network, each length of data package is fixed---and the cell of one 53 byte, ATM uses the packet of fixed length, is transmission data in basis with the ATDM.
ATM has following technical characterstic:
1, ATM is a kind of STDM technology.ATM is divided into a plurality of virtual circuits with different transmission properties with a physical channel and offers the user, realizes the distribution according to need of Internet resources.
2, ATM utilizes hardware to realize the quick exchange of regular length bag, and it is little to have time delay, and the characteristics that real-time is good can satisfy the requirement of multiple media data transmission.
3, ATM is a transmission platform of supporting multiple business, and provides service quality to guarantee.
4, ATM is connection-oriented tranmission techniques, must set up virtual connections end to end before transmitting user data.Permanent virtual connects by webmaster is manual to be set up, and the exchange virtual connections is set up by signaling.
The test that will finish ATM in the prior art has two kinds of approach: a kind of is by general ATM tester; Another kind is the ATM cell transmitting-receiving measuring ability that utilizes the ATM communication equipment itself to have.
For the way of general ATM tester, normally adopt complicated flow production process and real-time hardware analysis method, find to have following shortcoming in the use:
1) function is loaded down with trivial details, and is impracticable concerning production test;
2) inconvenient operation, bulky, very inconvenient when integrated test system;
3), the stability of tester there is certain influence because the equipment complexity.
For the ATM communication equipment of the ATM cell transmitting-receiving measuring ability that has for itself,, therefore there is following shortcoming because the atm cell stream volume production is given birth to normally by CPU generation and analysis in the communication equipment:
1) the cell flow of CPU generation is too little, and function is very weak;
2) can only satisfy the self-test of ATM communication equipment, can not use as instrument;
3) communication products development workload and design cost have been increased.
Summary of the invention
The present invention proposes the checkout gear and the method for a kind of cell flow transmitting-receiving, to solve that the prior art scheme can not only realize easily but also can carry out the shortcoming of Validity Test to atm feature and performance.
For addressing the above problem, the invention provides following technical scheme:
A kind of detection method of cell flow transmitting-receiving comprises following concrete steps:
A, cell Compare Logic module are initialized to the transmission buffer memory with the test information cells that writes, and become original cell;
B, transmitting-receiving interface module read the original cell in the transmission buffer memory and send;
C, transmitting-receiving interface module receive and return cell;
D, cell Compare Logic module are relatively returned cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception buffer memory in.
Initialization among the described step a further is included in and is provided with ID number in the cell, and it is corresponding with the memory block number that sends buffer memory; Relatively return cell in the correspondingly described steps d and original cell is meant: according to the ID that returns cell number, take out and send the original cell that has same ID number in the buffer memory, the two compares.
The checkout gear of high-speed information element stream of the present invention transmitting-receiving comprises: be used for the initialization test cell, send original cell, receive the transmitting-receiving comparison module that returns cell and more original cell and return cell; Be used to store the transmission cache module of original cell; Be used to store the reception cache module that returns cell; Be used to send original cell and receive the transmitting-receiving interface module of returning cell; Wherein:
Described transmitting-receiving comparison module comprises: be used for initialization test cell, more original cell and return the cell Compare Logic module of cell, be used for input and output and return the reception cache interface of cell, the transmission cache interface that is used for the original cell of input and output is used for the cpu i/f that CPU controls; Test information cells is delivered to described cell Compare Logic module by described cpu i/f, this cell Compare Logic module is initialized to test information cells and is original cell, and deliver to the transmission cache module by sending cache interface, described transmitting-receiving interface module reads original cell from described transmission cache module, and send, its reception is simultaneously returned cell and is passed to described cell Compare Logic module, this cell Compare Logic module is relatively returned cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception cache module in by receiving cache interface.
Described transmitting-receiving comparison module also further comprises: be used to store control command and result's register module, be used for statistical comparison result's wrong cell counter, reception cell count device and send a kind of of cell count device or several.
Described register module comprises command register and status register.
The checkout gear and the method for high-speed information element stream of the present invention transmitting-receiving have following advantage:
1, the present invention is short and sweet, realizes easily, is specially adapted to carry out the test of atm feature and performance;
2, the present invention can realize that the data of cell flow at a high speed produce and analyze;
3, the present invention greatly reduces the cost of testing apparatus;
4, the present invention is widely used, and can be used on the data test of any high-speed information element stream that fixing frame length arranged.
Describe the present invention in detail below in conjunction with the drawings and specific embodiments.
Description of drawings
Fig. 1 is the system schematic of the checkout gear of high-speed information element stream of the present invention transmitting-receiving;
Fig. 2 is the flow chart of the detection method of high-speed information element stream of the present invention transmitting-receiving.
Specific implementation
At communication technical field, atm technology is its core technology, particularly in the broadband technology field, ATM plays a part very important especially, and, along with the develop rapidly of the communication technology, access way and method of testing based on ATM are also enriched constantly, present embodiment has proposed the checkout gear of a kind of ATM high-speed information element stream transmitting-receiving, and as shown in Figure 1, this device includes:
The transmitting-receiving comparison module, shown in the empty frame among Fig. 1, it is used for the initialization test cell, sends original cell, receives and return cell and more original cell and return cell, is a FPGA (Field Programmable Gate Array: field programmable gate array);
Send cache module, be used to store original cell;
Receive cache module, be used for storage and return cell;
The transmitting-receiving interface module is used to send original cell and reception and returns cell, and it also is a FPGA.Wherein:
Described transmitting-receiving comparison module comprises: cell Compare Logic module is used for initialization test cell, more original cell and returns cell; Receive cache interface, be used for input and output and return cell; Send cache interface, be used for the original cell of input and output; Cpu i/f is used for CPU control; Register module comprises command register and status register, is used to store control command and result; The wrong cell counter is used for the mistake of statistics cell; Receive the cell count device, be used to add up the cell that receives; Send the cell count device, be used to add up the cell of transmission.
Test information cells is delivered to described cell Compare Logic module by described cpu i/f, this cell Compare Logic module is initialized to these test information cells that write and is original cell, and deliver to the transmission cache module by sending cache interface, described transmitting-receiving interface module reads original cell from described transmission cache module, and send, its reception is simultaneously returned cell and is passed to described cell Compare Logic module, this cell Compare Logic module is relatively returned cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception cache module in by receiving cache interface.
The cell Compare Logic module that test information cells is delivered to by cpu i/f, this cell Compare Logic module is initialized to test information cells and is original cell, and deliver to the transmission cache module by sending cache interface, the transmitting-receiving interface module reads original cell from sending cache module, and send, its reception is simultaneously returned cell and is passed to cell Compare Logic module, this cell Compare Logic module is relatively returned cell and original cell, obtain comparative result, show this result by each cell count device, will return cell simultaneously and deposit the reception cache module in by receiving cache interface.
More specifically, it may further comprise the steps:
The first, write test information cells, and it is initialized to the transmission buffer memory, become original cell.At first test information cells is write cell Compare Logic module by cpu i/f, secondly this cell Compare Logic module is initialized to original cell with test information cells, wherein, to send the corresponding value of block storage number in the cache module as ID number of cell, be comprised in the original cell, then original cell delivered to the transmission cache module.
The second, read the original cell that sends buffer memory and sending.The transmitting-receiving interface module reads original cell from send cache module, and sends, and sends the cell count device simultaneously and carries out accumulated counts according to the original cell that sends.
Three, cell is returned in reception.The transmitting-receiving interface module receives simultaneously to be returned cell and passes to cell Compare Logic module.
Four, relatively return cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception buffer memory in.This cell Compare Logic module basis is returned ID number of cell, take out the original cell that has same ID number in the transmission buffer memory by sending cache interface, this cell Compare Logic module is relatively returned cell and original cell, obtain comparative result, and manner of comparison is continuous comparison, and cell Compare Logic module writes the reception cache module to the cell data that returns that receives by receiving cache interface constantly.If the comparative result that promptly obtains is wrong, and the wrong cell counter that then is used for error statistics adds one, will return cell simultaneously and deposit the reception cache module in by receiving cache interface, and the reception cell count device that is used to receive cell adds one.Like this, can obtain comparative result from the individual count device.
In addition, by cpu i/f, can visit the various piece of transmitting-receiving comparison module.

Claims (8)

1. the detection method of cell flow transmitting-receiving is characterized in that this method comprises following steps:
A, cell Compare Logic module are initialized to the transmission buffer memory with the test information cells that writes, and become original cell;
B, transmitting-receiving interface module read the original cell in the transmission buffer memory and send;
C, transmitting-receiving interface module receive and return cell;
D, cell Compare Logic module are relatively returned cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception buffer memory in.
2. the detection method of a kind of cell flow transmitting-receiving as claimed in claim 1 is characterized in that the initialization among the described step a further is included in and is provided with ID number in the cell.
3. the detection method of a kind of cell flow transmitting-receiving as claimed in claim 2 is characterized in that, the ID of described cell number corresponding with the memory block number that sends buffer memory.
4. the detection method of a kind of cell flow transmitting-receiving as claimed in claim 2, it is characterized in that, relatively return cell in the described steps d and original cell more specifically is meant: according to the ID that returns cell number, take out and send the original cell that has same ID number in the buffer memory, the two compares.
5. the checkout gear of cell flow transmitting-receiving is characterized in that this device comprises:
Be used for the initialization test cell, send original cell, receive the transmitting-receiving comparison module that returns cell and more original cell and return cell;
Be used to store the transmission cache module of original cell;
Be used to store the reception cache module that returns cell;
Be used to send original cell and receive the transmitting-receiving interface module of returning cell; Wherein:
Described transmitting-receiving comparison module comprises: be used for initialization test cell, more original cell and return the cell Compare Logic module of cell, be used for input and output and return the reception cache interface of cell, the transmission cache interface that is used for the original cell of input and output is used for the cpu i/f that CPU controls; Test information cells is delivered to described cell Compare Logic module by described cpu i/f, this cell Compare Logic module is initialized to test information cells and is original cell, and deliver to the transmission cache module by sending cache interface, described transmitting-receiving interface module reads original cell from described transmission cache module, and send, its reception is simultaneously returned cell and is passed to described cell Compare Logic module, this cell Compare Logic module is relatively returned cell and original cell, obtain comparative result, will return cell simultaneously and deposit the reception cache module in by receiving cache interface.
6. the checkout gear of a kind of cell flow transmitting-receiving as claimed in claim 5 is characterized in that described transmitting-receiving comparison module also further comprises: the register module that is used to store control command and result.
7. the checkout gear of a kind of cell flow transmitting-receiving as claimed in claim 6 is characterized in that described register module comprises command register and status register.
8. the checkout gear of a kind of cell flow transmitting-receiving as claimed in claim 5, it is characterized in that described transmitting-receiving comparison module also further comprises: be used to add up wrong cell counter, the reception cell count device of this comparative result and send a kind of of cell count device or several.
CNB021544123A 2002-12-09 2002-12-09 High-speed cell flow receiving and transmitting test device and method Expired - Fee Related CN100413276C (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CNB021544123A CN100413276C (en) 2002-12-09 2002-12-09 High-speed cell flow receiving and transmitting test device and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CNB021544123A CN100413276C (en) 2002-12-09 2002-12-09 High-speed cell flow receiving and transmitting test device and method

Publications (2)

Publication Number Publication Date
CN1507223A CN1507223A (en) 2004-06-23
CN100413276C true CN100413276C (en) 2008-08-20

Family

ID=34235486

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB021544123A Expired - Fee Related CN100413276C (en) 2002-12-09 2002-12-09 High-speed cell flow receiving and transmitting test device and method

Country Status (1)

Country Link
CN (1) CN100413276C (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100372317C (en) * 2005-05-13 2008-02-27 清华大学 Flow receiving taking and statistic circuit assembly for 10G network performance tester
CN100372316C (en) * 2005-05-13 2008-02-27 清华大学 Flow generating and transmitting circuit assembly for 10G network performance tester
CN100414893C (en) * 2005-07-14 2008-08-27 上海华为技术有限公司 Method for detecting cell bus fault

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1138928A (en) * 1994-01-17 1996-12-25 诺基亚电信公司 Method and system for controlling statistically multiplexed ATM bus
EP1040705A1 (en) * 1997-10-16 2000-10-04 Siemens Aktiengesellschaft Module for oam processing of atm cells of a cell flux on virtual connections
CN1353523A (en) * 2000-11-07 2002-06-12 华为技术有限公司 Switch network card tester and method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1138928A (en) * 1994-01-17 1996-12-25 诺基亚电信公司 Method and system for controlling statistically multiplexed ATM bus
EP1040705A1 (en) * 1997-10-16 2000-10-04 Siemens Aktiengesellschaft Module for oam processing of atm cells of a cell flux on virtual connections
CN1353523A (en) * 2000-11-07 2002-06-12 华为技术有限公司 Switch network card tester and method

Also Published As

Publication number Publication date
CN1507223A (en) 2004-06-23

Similar Documents

Publication Publication Date Title
EP1192753B1 (en) Method and apparatus for shared buffer packet switching
US7573896B2 (en) Method and apparatus for generic interface, packet cut-through, overbooking, queue concatenation, and logical identification priority for a system packet interface device
US20050125590A1 (en) PCI express switch
EP1491995B1 (en) Dual-port functionality for a single-port cell memory device
JPH09270807A (en) Verification of network transporter in networking environment
US20060268723A1 (en) Selective test point for high speed SERDES cores in semiconductor design
CN1984030A (en) Method and device for controlling ATM network flow based on FPGA
Unekawa et al. A 5 Gb/s 8/spl times/8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200 MHz LVDS interface
CN100413276C (en) High-speed cell flow receiving and transmitting test device and method
KR100200558B1 (en) Apparatus and method for sar of cbr traffic in atm network
US8000322B2 (en) Crossbar switch debugging
US20030193894A1 (en) Method and apparatus for early zero-credit determination in an infiniband system
US5493562A (en) Apparatus and method for selectively storing error statistics
US5748917A (en) Line data architecture and bus interface circuits and methods for dual-edge clocking of data to bus-linked limited capacity devices
Kim et al. Design and implementation of a high-speed ATM host interface controller
CN1984031A (en) Method and device for converting data-packet-mode into element-frame-mode
KR100279949B1 (en) Cell rearrangement buffer
CN100591036C (en) Apparatus for realizing asynchronous transmission mode adaption layer function
JP2001237840A (en) Minimum cell interval control method and minimum cell interval controller for atm unit
CN100403700C (en) Asynchronous transmission mode reverse multiplex measuring method and device
Do et al. A scalable priority queue manager architecture for output-buffered ATM switches
Shim et al. FPGA implementation of a scalable shared buffer ATM switch
KR100211065B1 (en) Circuit for transmitting/receiving multiple cbr data
Tripp On the design of an ATM interface with facilities for traffic monitoring and generation
US20060117114A1 (en) Staggering memory requests

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080820

Termination date: 20171209