CN100412671C

CN100412671C - Liquid crystal display device

Info

Publication number: CN100412671C
Application number: CNB2006100663486A
Authority: CN
Inventors: 黄添钧
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2006-03-30
Filing date: 2006-03-30
Publication date: 2008-08-20
Anticipated expiration: 2026-03-30
Also published as: CN1821857A

Abstract

The present invention relates to a liquid crystal display apparatus which comprises a gate line formed on an insulation basal plate, an active layer formed on the gate line, a source line and a drain line which is coupled with a pixel electrode and spans the overlap region formed by the active layer and the gate line, wherein the gate line comprises a first width part and a second width part, and the first width part is narrower than the second width part and is overlapped with the drain line.

Description

Liquid crystal indicator

Technical field

The invention relates to LCD (Liquid Crystal Display; And be particularly to a kind of thin film transistor (TFT) that reduces the gate-to-drain stray capacitance and avoid gate-to-drain electric capacity inequality (Thin Film Transistor LCD); TFT)-LCD (TFT-LCD) device.

Background technology

Fig. 1 shows that a typical case uses the planimetric map of thin film transistor (TFT)-LCD device (TFT-LCD).This TFT-LCD device 10 is to comprise that a gate line 11 along continuous straight runs are arranged on the insulated substrate (not graphic), and this gate line 11 has an elongated area with as a grid 12.One active layer 13 is formed on this grid 12, for example, is made of amorphous silicon semiconductor materials such as (amorphous silicon).One source pole line 14 extends with the direction of vertical this gate line 11 and crosses over this gate line 11, and has an elongated area with as one source pole 15.One drain line 16 couples a pixel electrode 18 and has a drain electrode 17 along the bearing of trend of this gate line 11.This source electrode 15 stresses to fold with relative two of this grid 12 respectively with drain electrode 17.Normally transparent by the one and conductive material good conductance of tool of this pixel electrode 18 constitutes, and is tin indium oxide (indium-tin-oxide for example; ITO) or indium zinc oxide (indium-zinc-oxide; IZO).

Yet, board variation and make mask when skew takes place the forming process of TFT in little shadow (photolithography) technology, the overlapping region between source electrode 15/ drain electrode 17 and the grid 12 changes, and gate-to-source electric capacity (is designated hereinafter simply as C _GS) with gate-to-drain electric capacity (C _GD) therefore change thereupon.Fig. 2 is the equivalent circuit diagram of a pixel cell in the middle of the TFT-LCD, in order to explanation C _GDInfluence for brightness.G represents grid among the figure, and S represents source electrode, and D represents drain electrode, C _LCLiquid crystal capacitance, C _SStorage capacitors, and this two electric capacity all is parallel between a pixel electrode P and the shared electrode C.When TFT-LCD opened, grid voltage equaled a relative high voltage V _GH, and total electrical charge Q in the TFT-LCD ₁With pixel electrode voltage V _P1Between relational expression can show be:

Q ₁＝C _GD(V _P1-V _GH)+(C _LC+C _S)(V _P1-V _COM) ...(1)

V wherein _COMBe the voltage of shared electrode.

Otherwise when TFT-LCD closed, grid voltage equaled a relative low-voltage V _GL, and total electrical charge Q in the TFT-LCD ₂With pixel electrode voltage V _P2Between relational expression can show be:

Q ₂＝C _GD(V _P2-V _GL)+(C _LC+C _S)(V _P2-V _COM) ...(2)

Because the total electrical charge conservation, i.e. Q1=Q2, therefore as can be known by (1) (2):

ΔV _P＝V _P1-V _P2＝(V _GH-V _GL)(C _GD/(C _CL+C _S+C _GD)) ...(3)

By formula (3) as can be known, Δ V _P(hereinafter referred to as feed voltage (feedthrough voltage)) is to be subjected to C _GDInfluence.Because the brightness of LCD is controlled by pixel electrode voltage, so the board variation makes the C of zones of different TFT in the micro-photographing process _GdWhen deviation took place, the phenomenon of brightness irregularities promptly appears everywhere in LCD as a result, and was serious, promptly produces so-called " Mura ".

Except the problems referred to above, the indicator screen surface also can be because of C _GDBe worth excessive and the problem of flicker take place, this be since the effective value of voltage that is applied to liquid crystal from a picture to next picture change due to.

As gate-to-drain electric capacity (C _GD) when increasing, the time constant of gate line (time constant) increases thereupon.The result, when changeing low by height, remote opposite side has the delay generation in display surface from driving side when adding grid voltage, so-called (rewriting) phenomenon that writes again can take place in the adjacent domain of remote opposite side, the meaning is that the data of the contiguous horizontal cycle of a set horizontal cycle (being drain potential) can be written in this set horizontal cycle.As a result, the current potential of a set pixel is offset.

In addition, as shown in Figure 2, grid voltage change by height low during, the stray capacitance of TFT can make pixel electrode have suc as formula (3) represented pressure drop Δ V _PWhen this feed voltage increased, the voltage difference in the film crystal between source electrode and drain electrode was apart from increase.As a result, change by height in the self-driven side of display surface toward remote opposite side when grid voltage low after, write phenomenon again due to easier the delay.Can obviously find out Δ V by formula (3) _PAnd C _GDHas confidential relation between value.Work as C _GDDuring minimizing, Δ V _PAlso reduce thereupon.Therefore, by reducing C _GD, can be suppressed writing phenomenon again.

In view of this, can reduce gate-to-drain stray capacitance and to avoid the thin film transistor (TFT)-LCD device of gate-to-drain electric capacity inequality be that art technology person yearns for.

Summary of the invention

The present invention discloses a kind of liquid crystal display (LCD) device that uses thin film transistor (TFT) and forming method thereof, and it can avoid gate-to-drain electric capacity in the board contraposition deviation not to take place on time, thereby can take precautions against the phenomenon of LCD zones of different brightness irregularities.And this liquid crystal indicator also has the C of reduction _GD, therefore can take precautions against problems such as display flicker.

The invention provides a kind of liquid crystal indicator.This liquid crystal indicator comprises an insulated substrate, one gate line is formed on this insulated substrate, one active layer is formed on this gate line, the one source pole line, and one drain line couple a pixel electrode and across the overlapping region of this active layer and this gate line, wherein this gate line has a grid and comprises one first width segments and one second width segments, and this first width segments is narrow and overlapping with this drain line than this second width segments.

The invention provides a kind of liquid crystal indicator, this liquid crystal indicator comprises an insulated substrate, one gate line is formed on this insulated substrate, one active layer is formed on this gate line, the one source pole line is across this gate line and have an elongated area, and one drain line couple a pixel electrode and across the overlapping region of this active layer and this gate line, and has elongated area that at least one elongated area is formed at this source electrode line wherein on the overlapping region of a side and this active layer and this gate line, wherein this gate line comprises one first width segments and one second width segments, and this first width segments is narrow and overlapping with this drain line than this second width segments.

Description of drawings

Fig. 1 is the planimetric map of a traditional TFT-LCD device;

Fig. 2 is the equivalent circuit diagram of a TFT-LCD;

Fig. 3 is the planimetric map that shows the embodiment of a liquid crystal indicator of the present invention;

Fig. 4 is the planimetric map that shows the embodiment of another liquid crystal indicator of the present invention.

Symbol description:

10～conventional thin film transistor-liquid crystal indicator

30,40～liquid crystal indicator of the present invention

11～gate line, 12～grid

13～active layer

14～source electrode line, 15～source electrode

16～drain line 17～drain electrode

18～pixel electrode

31～gate line, 32～grid

33～active layer

34～source electrode line, 35～source electrode

36～drain line 37～drain electrode

38～pixel electrode

39,391,392,394,395～channel region

Embodiment

Structure of the present invention and its formation method, together with its extra purpose and advantage, need by the description of following specific embodiment and when reading with reference to the additional icon, to obtain the understanding of the best.

The icon of this place reference does not reduce with equal proportion.The relative size of the different assemblies of describing not is in order to represent the ratio characteristic of these assembly physical sizes among the figure, and only in order to assist a ruler in governing a country the common technology of this area, make it can clearly know how to make and use the present invention, and understand the creative notion that contains in the present invention.

With reference to figure 3, it is the planimetric map that shows the embodiment of a liquid crystal indicator of the present invention.This liquid crystal indicator 30 comprises that a gate line 31 along continuous straight runs are arranged on the insulated substrate.As shown in the figure, this gate line 31 comprises one first width segments and one second width segments, and wherein this first width segments is narrow than this second width segments.One active layer 33 is formed on first width segments and second width segments of this gate line 31, and wherein this gate line 31 has a grid 32 and is positioned at first width segments and second width segments and this active layer 33 equitant zones.One source pole line 34 with substantially perpendicular to the bearing of trend of this gate line 31 across this gate line 31, and have an elongated area on this active layer 33 as source electrode 35.One drain line 36 is according to substantially perpendicular to the bearing of trend of this gate line 31 and across the overlapping region of first width segments of this active layer 33 and this gate line 31, this drain line 36 has a drain electrode 37 on this active layer 33 and be coupled to a pixel electrode 38, and wherein this source electrode 35 has channel region 39 between 37 with draining in this active layer 33.

Figure can obviously find out thus, because drain line 36 extends beyond the border of the overlapping region of this active layer 33 and this gate line 31, thereby unpunctual in contraposition, gate line/grid 31/32, active layer 33, drain line/drain electrode 36/37 three's overlapping region does not still change, and meaning is C _GDDeviation does not take place in value, thereby the brightness of display can be even.On the other hand, because gate line comprises the first narrower width segments of width, and this this drain line is and this first width segments overlaid, thereby gate line/grid 31/32, active layer 33, drain line/drain electrode 36/37 three's overlapping region minimizing, thus C _GDValue reduces, and phenomenons such as result screen flicker alleviate.

What need special instruction is that first width segments of gate line does not need only to be limited to and drain line 36 equitant zones, and can extend (not icon) toward source electrode line 34 directions.

In addition, because first width segments of gate line 31 is narrower, thereby be to stay idle zone in first width segments, two sides.Therefore, in another embodiment of the present invention, drain line 36 can increase at least one elongated area on the border of this active layer 33 of the wherein side of first width segments and the overlapping region of this gate line 31, channel region width between drain line 36 and the source electrode line 34 is increased, thereby increase the conducting electric current.

With reference to figure 4, it is the planimetric map that shows the embodiment of another liquid crystal indicator of the present invention.This liquid crystal indicator 40 is identical with liquid crystal indicator 30, and difference only increases on the overlapping region that two elongated areas are formed at elongated area 35 2 sides of this source electrode line 34 and this active layer 33 and this gate line 31 respectively at drain line.Therefore source electrode 35 is that defined channel region changes into and comprises 39,39 in this active layer 33 with draining between 37 ₁, 39 ₂Three zones.

Figure can know and finds out that compared to the channel region 39 of Fig. 3, channel region has had more two zones 39 thus ₁, 39 ₂In addition, active layer 33 can extend and the expansion of past two directions up and down toward source electrode line 34, and so channel region 39 can increase by 39 again ₄And 39 ₅Two zones.

Though the present invention discloses as above with preferred embodiment; right its is not in order to limiting the present invention, anyly knows this skill person, without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the claim person of defining.

Claims

1. liquid crystal indicator comprises:

One insulated substrate;

One gate line is formed on this insulated substrate;

One active layer is formed on this gate line;

One source pole is linear to be formed on this insulated substrate, vertical with this gate line;

One pixel electrode; And

One drain line couples this pixel electrode and across the overlapping region of this active layer and this gate line,

Wherein this gate line comprises one first width segments and one second width segments, and this first width segments is narrow and overlapping with this drain line than this second width segments.

2. liquid crystal indicator as claimed in claim 1, wherein this drain line has at least one elongated area, and this elongated area is formed on the border of overlapping region of this active layer and this gate line.

3. liquid crystal indicator as claimed in claim 1, wherein this source electrode line is across this gate line, and has an elongated area and be positioned on the overlapping region of this active layer and this gate line.

4. liquid crystal indicator as claimed in claim 3, wherein this drain line has at least one elongated area, and the elongated area that this elongated area is formed at this source electrode line is a side and on the overlapping region of this active layer and this gate line wherein.

5. liquid crystal indicator as claimed in claim 4, wherein this drain line has two elongated areas, and this two elongated area is formed at respectively on the border, overlapping region of this active layer of both sides, elongated area of this source electrode line and this gate line.

6. liquid crystal indicator as claimed in claim 1, wherein this gate line also comprises a grid, is positioned on this first width segments and this second width segments of part.

7. liquid crystal indicator as claimed in claim 3, wherein the elongated area of this source electrode line is as one source pole.

8. liquid crystal indicator as claimed in claim 1, wherein this first width segments of overlapping this active layer of this drain line and this gate line is as a drain electrode.

9. liquid crystal indicator as claimed in claim 1, wherein this drain line extends beyond the border of the overlapping region of this active layer and this first width segments.