CN100397670C - Gallium nitride-based iii-v group compound semiconductor device - Google Patents

Gallium nitride-based iii-v group compound semiconductor device Download PDF

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CN100397670C
CN100397670C CNB2006101002071A CN200610100207A CN100397670C CN 100397670 C CN100397670 C CN 100397670C CN B2006101002071 A CNB2006101002071 A CN B2006101002071A CN 200610100207 A CN200610100207 A CN 200610100207A CN 100397670 C CN100397670 C CN 100397670C
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electrode
semiconductor layer
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gallium nitride
compound semiconductor
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CN1897317A (en
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中村修二
山田孝夫
妹尾雅之
山田元量
板东完治
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Nichia Corp
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Abstract

A gallium nitride-based iii-v group compound semiconductor device comprises a substrate including a first main surface and a second main surface; a semiconductor stacked structure arranged over the substrate, and consisting of an n-type gallium nitride-based iii-v group compound semiconductor layer and a p-type gallium nitride-based iii-v group compound semiconductor layer; the p-type semiconductor layer formed on the n-type semiconductor layer and its surface being rectangle shape; an exposing part of n-type semiconductor with n-type semiconductor layer exsisting in the angle part of the diagonal for the rectangle shaped surface in the p-type semiconductor layer; a first electrode provided in an exposing part of the n-type semiconductor layer and a light-transmitting second electrode provided in the p-type semiconductor layer.

Description

The gallium nitride-based iii-v group compound semiconductor device
The application be that April 28, application number in 1994 are 2005101287724 the applying date, denomination of invention divides an application for the application for a patent for invention of " gallium nitride-based III-V group compound semiconductor device ".
Technical field
The present invention relates to have the manufacture method of the gallium nitride III-V compound semiconductor device of Ohmic electrode.
Background technology
In recent years, adopt the luminescent device of GaN, GaAlN, gallium nitride-based III-V group compound semiconductor materials such as InGaN, InAlGaN to receive much concern.This class luminescent device has on substrate the structure with the gallium nitride system compound semiconductor layer lamination of n type gallium nitride system compound semiconductor layer and doping p-type dopant usually.
Before, the gallium nitride III-V compound semiconductor layer of doping p-type dopant is still high resistant i type, thereby existing device is exactly so-called MIS structure.Recently, high resistant i type layer is converted into the technology of low-resistance p type layer, for example by the spy open flat 2-257676 number, the spy opens flat 3-218325 number and the spy open flat 5-183189 number disclose, can produce p-n junction type gallium nitride-based III-V group compound semiconductor luminescent device thus.
But,, on p type layer and/or n type layer, form with it and to remain at variety of issue aspect the electrodes in contact in order to realize this type of p-n junction type gallium nitride compound semiconductor device.
Now, because of being subjected to the restriction of manufacture view, the superiors in p-n junction type gallium nitride-based III-V group compound semiconductor luminescent device compound semiconductor layer have p type compound semiconductor layer.In addition, as the substrate of this type of device, generally use transparent Sapphire Substrate.Different with Semiconductor substrate such as the GaAs that uses in other light emitting semiconductor device, GaAlP, because of sapphire insulate, make device carry out its luminous function for apply predetermined current to compound semiconductor layer, can not electrode directly be fixed on substrate originally on one's body.The p electrode must form directly with n type compound conductor layer with p type compound semiconductor layer separately with the n electrode and contact.For guaranteeing to apply uniform current,, the comprehensive basically mulched ground of p type layer must be formed the p electrode so that obtain uniformly light-emitting from device to whole p type compound semiconductor layer.But, because existing p electrode is lighttight, for avoiding issued light by the decay of p type electrode, external quantum efficiency degenerates, and can not have the luminous of luminescent device from the unilateral observation opposite with the substrate that forms p type compound semiconductor layer and n type compound semiconductor layer.
But, be fixed on situation on the lead frame for this type of existing compound semiconductor light emitting device, for make do not form compound semiconductor layer substrate surface up, p electrode and n electrode must be installed on 2 lead frames down.That is, must be with a semiconductor chip across being installed on 2 lead frames.At this moment,, must guarantee that 2 lead frames have certain intervals, naturally and understandably have to a semi-conductive chip size is increased to 1mm for fear of the electrical short of p type compound semiconductor layer and n type compound semiconductor layer 2More than.Thereby opinion must be reduced by one piece of resulting core number of wafer with existing device architecture.In addition, 2 lead frames also need very accurate position to cooperate, and need the meticulous corrosion technology of gallium nitride compound semiconductor.
Secondly, with regard to the n electrode, as mentioned above,, be the problem that proposes recently for realizing p-n junction type gallium nitride-based III-V group compound semiconductor luminescent device.In the luminescent device of existing MIS type structure,, almost the n electrode is not paid close attention because key is to utilize the Schottky barrier of the i type layer of electrode and high resistant.
As the n electrode material of the gallium nitride-based III-V group compound semiconductor luminescent device that has the MIS structure, for example opened the aluminum or aluminum alloy that discloses for clear 55-9442 number by the spy.Also often use indium in addition.This shows that don't work aluminium or indium all are difficult to obtain and the well-content ohmic contact of n type gallium nitride-based III-V group compound semiconductor layer, also have, realize because annealing is gone bad electrode and lost conductivity easily.
Generally speaking, still do not reach electrode material with the well-content ohmic contact of gallium nitride-based III-V group compound semiconductor layer before.
Summary of the invention
The object of the present invention is to provide a kind of gallium nitride-based III-V group compound semiconductor luminescent device that forms Ohm contact electrode with the gallium nitride-based III-V group compound semiconductor layer that is provided with.
The invention provides a kind of gallium nitride-based III-V group compound semiconductor device, comprising: substrate with first and second first type surfaces; With on first first type surface that is formed on described substrate, contain the semiconductor laminated structure of n type gallium nitride-based III-V group compound semiconductor layer and p type gallium nitride-based III-V group compound semiconductor layer; Wherein, described p type semiconductor layer is arranged on the described n type semiconductor layer, and the plane is a rectangular shape; The n type semiconductor layer exposed portions serve of described n type semiconductor layer is exposed in bight on the diagonal of the planar rectangular of described p type semiconductor layer, existence; In described n type semiconductor layer exposed portions serve, be provided with first electrode of ohmic contact, and described p type semiconductor layer is provided with second electrode of the ohmic contact of light transmission.
Description of drawings
To be expression be installed in state schematic cross-sectional views on the lead frame with the luminescent device of first embodiment of the present invention to Fig. 1;
Fig. 2 is the current-voltage characteristic curve figure (1 scale of X-axis is 0.5V among the figure, and 1 scale of Y-axis is 0.2mA) of expression p electrode of the present invention;
Fig. 3 is the plane graph of the luminescent device of the present invention's the 2nd embodiment;
Fig. 4 is the sectional drawing along the IV-IV line of Fig. 3;
Fig. 5 is the oblique view of a variation of expression the 2nd embodiment of the present invention;
Fig. 6 is the sectional drawing of the luminescent device of expression the present invention the 3rd embodiment;
Fig. 7 is the sectional drawing of the 1st variation of expression the present invention the 3rd scheme;
Fig. 8 is the sectional drawing of the 2nd variation of expression the present invention the 3rd scheme;
Fig. 9 is the plane graph of the 3rd variation of expression the present invention the 3rd scheme;
Figure 10 is the sectional drawing of the light emitting semiconductor device of expression the present invention the 4th embodiment;
Figure 11 A～Figure 11 D is the current-voltage characteristic curve figure (X-axis 1 scale is that 0.5V, Y-axis 1 scale are 50 μ A among the figure) that represents various n electrode of the present invention with comparative example;
Figure 12 A～Figure 12 D is the current-voltage characteristic curve figure (X-axis 1 scale is that 0.5V, Y-axis 1 scale are 50 μ A among the figure) that expression other n electrodes of the present invention are compared with comparative example;
Figure 13 A～Figure 13 D is the current-voltage characteristic curve figure (X-axis 1 scale is that 0.5V, Y-axis 1 scale are 50 μ A among the figure) that represents the various n electrode of the present invention with comparative example;
Figure 14 A～Figure 14 D is the current-voltage characteristic curve figure (X-axis 1 scale is that 0.5V, Y-axis 1 scale are 50 μ A among the figure) that represents other different n electrodes of the present invention with comparative example together;
Figure 15 is the figure of explanation n electrode adhesion test;
Figure 16 is a part of sectional drawing of the light emitting semiconductor device of expression the present invention the 5th embodiment; And
Figure 17 A～Figure 17 D is the current-voltage characteristic curve figure (X-axis 1 scale is that 0.5V, Y-axis 1 scale are 50 μ A among the figure) that represents the various n electrode of the present invention's the 5th embodiment with comparative example.
Embodiment
About the present invention, gallium nitride-based III-V group compound semiconductor is meant the nitride-based semiconductor of the periodic table iii group element that comprises gallium such as GaN, GaAlN, InGaN, InAlGaN.These compound semiconductors can be used chemical formula
In xAl yGa 1-x-yN
Expression, wherein 0≤X≤1,0≤Y≤1 X+Y≤1.
In addition, in the present invention, what so-called ohmic contact adopted is connotation common in the semiconductor applications.
In the present invention, the light transmission of so-called electrode is meant that the light that sends from the gallium nitride-based III-V group compound semiconductor luminescent device has and sees through electrode more than 1%, is not to mean that electrode must be water white.Optically transparent electrode will make the light transmission 20～40% that sends from the gallium nitride-based III-V group compound semiconductor luminescent device or more usually.
Also have, in the present invention, metal material is the situation that contains metal more than 2 kinds, with the metal more than 2 kinds in advance alloying also can, each metal level is stacked good.At metal material is to contain under the situation of the metal more than 2 kinds, though without particular limitation to various metals, preferably contained various metals are at least 0.1 atom %.
Below, with reference to accompanying drawing the present invention is described in detail.In all figure, same position is represented with same label.
Fig. 1 schematically represents the gallium nitride-based III-V group compound semiconductor luminescent device 10 of the present invention's the 1st embodiment.
The substrate 11 that this luminescent device (LED) 10 has the transparent insulating that is made of materials such as sapphires.Form one deck n type gallium nitride-based III-V group compound semiconductor layers 12, for example 0.5 μ m～10 μ m are thick, and an interarea 11a of entire substrate 11 is covered.In n type semiconductor layer 12,, preferably mix silicon (Si), germanium (Ge), selenium (Se), sulphur (S), tellurium n type dopants such as (Te) though it is also passable not mix n type dopant.
On the surface of n type semiconductor layer 12, form one deck p type gallium nitride-based III-V group compound semiconductor layer 13 that for example 0.01 μ m～5 μ m are thick.In p type semiconductor layer 13, mix zinc (Zn), magnesium (Mg), beryllium (Be), strontium (Sr), barium p type dopants such as (Ba), annealing under the temperature more than 400 ℃ again (see also the application spy who relates to this assignee about annealing and open flat 5-183189 communique [corresponding to the U.S. Patent Application Serial No.07/970 of 2 days January in 1992 application that transfers this assignee, 145 (this content is inserted this specification as the disclosure of this specification)]).
A part, the surface of exposed portions serve n type semiconductor layer 12 are removed in the p type semiconductor layer 13 and the superficial layer corrosion of n type semiconductor layer 12.
In exposing on the face of n type semiconductor layer, form n electrode 14.
Almost cover the p type semiconductor layer comprehensively, form p electrode 15 of the present invention.This p electrode is the Ohmic electrode of the light transmission that is made of metal material.The metal material that forms p electrode 15 there is not special restriction.For example, the p electrode material can contain the metal of selecting more than a kind or 2 kinds from gold, nickel, platinum, aluminium, tin, indium, chromium, titanium.The metal material that can obtain satisfied ohmic contact comprises at least 2 kinds of metals selecting from the group that chromium, nickel, gold, titanium and platinum are formed.Best metal material comprises gold and nickel.Concerning the formation of gold and nickel, preferably earlier nickel dam is directly contacted with p type semiconductor layer 13, form the gold layer more thereon.
As mentioned above, metal material is contained under the situation of metal more than 2 kinds, the laminated construction with various metal levels also can, alloying is good in advance.Metal material with laminated construction can form alloy through annealing described later.
To p electrode 15, can be on p type semiconductor layer 13 with for example evaporation, sputter etc. common formed metal material layer by coating technique, adjust through annealing again.Annealing is preferably carried out in the temperature more than 400 ℃.Under the temperature below 400 ℃, anneal, demonstrate the tendency that metal material layer and p type semiconductor layer are difficult to form satisfied ohmic contact.Much less, annealing should be carried out in the temperature below the gallium nitride-based III-V group compound semiconductor decomposition temperature (about 1200 ℃).Annealing time is preferably 0.01 fen～and 30 minutes.
The effect of record is identical among effect of this annealing and the above-mentioned US-SN 07/970,145.That is, behind the annealing temperature more than 400 ℃, then its resistivity can sharply descend as if the gallium nitride-based III-V group compound semiconductor layer that contains p type dopant that vapor growth method is grown.Annealed, because of will driving out of, and acceptor impurity is activated with the main hydrogen atom that combines that is subjected in the semiconducting crystal.So, because of with electrode at the annealing temperature more than 400 ℃, in fact increased the concentration of the gallium nitride-based III-V group compound semiconductor charge carrier that mixes p type impurity, and be easy to obtain ohmic contact.Being the preferred material of ohmic contact with p type semiconductor layer 13, no matter have or not light transmission, is nickeliferous and golden metal material.
The metal material that is used for p electrode 15 preferably forms like this: make the thickness after the annealing become 0.001 μ m～1 μ m.Because annealing, at metal material in the diffusion inside of p type semiconductor layer 13, some outside loss, thereby make the thickness attenuation.It is thick to be adjusted to 0.001 μ m～1 μ m by the final thickness with metal material after annealing, can make the p electrode that desirable light transmission is arranged.Surpass the thickness of 1 μ m, though there is not special obstacle, so, electrode has the tendency that manifests metallic luster gradually, and light transmission is descended.The thickness of p electrode 15 sees it is good if be thinner than above-mentioned scope from the viewpoint of light transmission, but thickness is crossed the thin tendency that can make the electrode 15 and the contact resistance of p type semiconductor layer 13 that increase is arranged.Like this, the thickness of p electrode just is preferably 0.005 μ m～0.2 μ m, is preferably 0.01 μ m～0.2 μ m.
P electrode of the present invention is a printing opacity, and forms desirable ohmic contact with the p type semiconductor layer, and the forward voltage of luminescent device is reduced, and the luminous efficiency of device is improved.
Experimental example 1
Mixing on the p type GaN layer of zinc, evaporation one deck nickel and one deck gold thereon successively, thickness respectively is 0.1 μ m, 600 ℃ of annealing, with its alloying simultaneously, obtains the p electrode that becomes transparent.Its thickness is 0.03 μ m.The current-voltage characteristic of this p electrode is represented by the curve A among Fig. 2.As known in the figure, this p electrode and p type gallium nitride-based III-V group compound semiconductor have formed good Ohmic contact.
So, the luminescent device of the present invention 10 to ohm p electrode 15 of possessing this kind light transmission can carry out luminous observation by p electrode 15.Thereby, as shown in Figure 1, device as the luminescent device that uses gallium nitride compound semiconductor semiconductor in addition to form, general on used cup-shaped lead frame 18, substrate 11 is not formed the bottom surface of semiconductor layer, and the 2nd promptly relative with the 1st interarea 11a interarea 11b installs towards lead frame.
P electrode 15 is to be connected with the welding wire 21 of spun gold one class on being connected another lead frame (metal column) 19 at the position of formed pad 17 on its part.The n electrode is connected with cup-shaped lead frame 18 by the welding wire 20 of spun gold one class.
In a preferred embodiment of the invention, pad 17 is preferably by the simple substance gold or contain gold and do not contain the metal material that the metal more than 2 kinds of aluminium or chromium constitutes and form.The metal material that does not contain aluminium or chromium as for containing gold can list gold, and the material that contains gold and titanium, nickel, indium and/or platinum.The pad that constitutes of metalloid material and the caking property of p electrode are good thus, with the wire bond of spun gold the time, with the caking property of the soldered ball that forms by spun gold also be good.And this metal material is in when annealing, or for luminous in the process of device energising, do not make p electrode go bad (light transmission decline) to the migration of p electrode hardly.And the migration to the p electrode just takes place in the relatively shorter time (for example 500 hours) in the metal material that contains aluminium or chromium in energising, makes the p electrode rotten.
Experimental example 2
Shown in Figure 1 have sapphire substrate, be the n type GaN layer of 4 μ m as the thickness of n type semiconductor layer 12, be the pad that constitutes by various metal materials that forms on the p electrode 15 of device of the p type GaN layer of mixing magnesium of 1 μ m as the thickness of p type semiconductor layer 13 as substrate 11.The p electrode is respectively to be nickel dam and the gold layer of 0.1 μ m through evaporation thickness successively, 600 ℃ of annealing, makes it alloying and becomes transparent simultaneously, obtains the electrode that thickness is 0.05 μ m.
In particular, on the p electrode, form pad with the pad material shown in 1 of tabulating down.Promptly directly form the metal level shown in the row of table 1 on the p electrode, the metal level shown in the row of evaporation table 1 thereon again is at the formation pad of annealing simultaneously of p electrode annealing process.Welding wire is a spun gold.
Made the luminescent device that so obtains luminous 500 hours continuously, the check pad is to the influence of p electrode.The result is recorded in the table 1 in the lump.
Table 1
Figure C20061010020700111
In table 1, mark VG is the omission of " fine ", the expression device 500 hours luminous after, the complete nondiscolouring of pad, the light transmission that still keeps the initial stage, and the constant situation of ohmic contact characteristic of p electrode and p N-type semiconductor N, mark G is the omission of " good ", though be illustrated in the electrode part variable color slightly around the pad, but it is luminous not to the degree that obviously weakens, and the ohmic contact of p electrode and p type semiconductor layer does not have the situation of variation, mark B is the omission of " bad ", and expression p electrode has lost light transmission, and p electrode and p N-type semiconductor N also lose the situation of ohmic contact characteristic.But, no matter the whether variable color of p electrode, degenerating with the caking property of gold goal, the pad that will be difficult to carry out wire bond is with symbol "-" expression.
As shown in table 1, for example form the situation of p electrode with Ni-Au, use with p electrode material identical materials be Ni-Au when forming pad, the variable color and still keep original light transmission not at all of p electrode.In addition, the situation with simple substance gold formation pad also can obtain identical result.Cr or Al move in the p electrode easily, even the p electrode contains gold, the p characteristic of electrode also can degenerate.
Experimental example 3
Except that form p electrode (ohm property of this p electrode is inferior to the Ni-Au electrode slightly) with Au-Ti, carry out the experiment identical with experimental example 2.Consequently the situation to using the simple substance gold or forming pad with Au-Ti is VG; To the situation that the metal material that constitutes with gold and the metal (that is, nickel, titanium, indium or platinum) except that aluminium or chromium forms, the result is G; Under situation about forming with the golden metal material that constitutes with aluminium or chromium, the result is B.
Experimental example 4
Except that form p electrode (ohm property of kind electrode is inferior to Ni-Au slightly) with Au-Al, carry out the experiment identical with experimental example 2.Consequently, to form the situation of pad with the simple substance gold, be VG; Under the situation that the metal material that constitutes with gold and metal (being nickel, titanium, indium or platinum) except that aluminium or chromium is formed, the result be G, with the situation of the metal material formation pad of gold and aluminium formation, though with p electrode genus same material, but the result still is B.Also have, under the metal material situation with gold and chromium formation, its result also is B.
Fig. 3 is the plane graph according to the light emitting semiconductor device of the present invention's the 2nd embodiment.Fig. 4 is the sectional drawing along the IV-IV line of Fig. 3.The present embodiment is particularly related to the improvement of the pad that the p electrode uses.As shown in the figure, on the 1st square interarea of semiconductor chip, be formed with light transmission p electrode 15, otch 311 is set on it, to expose the part surface of p type semiconductor layer 13.Pad 32 is electrically connected with the formation of p electrode simultaneously by otch 311 and p type semiconductor layer 13 secure bond.Illustrated embodiment, pad 32 has not only filled up otch 311, but also extends to the part surface of the p electrode around the otch 311.Notch 311, thereby pad 32 preferably is located at from being arranged on farthest position of n electrode 14 on the n type semiconductor layer 12 (this situation also is applicable to the device of Fig. 1).Therefore, impressed current can expand to whole p type semiconductor layer 13, makes the device uniformly light-emitting.With regard to illustrated example, on the diagonal of planar square wafer, notch (window) 311 is formed on the bight of light transmission p type electrode 15, and n electrode 14 then is formed on the bight on the n type semiconductor layer 12.
Concerning pad 32, to form ohmic contact good certainly with p type semiconductor layer 13, but because of reached the ohmic contact with p type semiconductor layer 13 by p electrode 15, if can realize being electrically connected with p electrode 15, it is good not form ohmic contact.But pad 32 is to use and p type semiconductor layer 13 bonding must formation by the conductive metal material also more firm than p electrode 15.Because pad 32 and p type semiconductor layer 13 bond than p electrode 15 also firmly, when wire weld, even the welding wire of pulling spun gold etc. like this can prevent that also pad 32 and/or p electrode 15 be stripped from.As the metal material that such pad is used, can enumerate is simple aluminium or the metal material that contains at least two kinds of metals among chromium, aluminium and the gold.The metal material that forms pad 32 contains under the situation of two or more metals, as mentioned above, can make their alloyings in advance.Also can for example stack gradually each metal level, when the p electrode is annealed, the while alloying.These metal materials, though can not form good Ohmic contact with p type semiconductor layer 13, firm with p type semiconductor layer 13 bondings, can not be stripped from during wire bond.Thereby, can make it filming, be as thin as and demonstrated light transmission.Such film pad because of the light transmission that device is sent, just can not make the luminous quantity of device that decline is significantly arranged.Also have, pad 32 made sandwich construction, use than with p type semiconductor layer 13 bonding more firm material, form with p type electrode 15 directly contact layer, and use the metal formation the superiors better with the solder wire material adhesiveness.
Experimental example 5
On one deck p type GAN layer, the stacked gross thickness of evaporation is the Ni-Au of 0.01 μ m, forms 1000 light transmission pads.On the other hand, the evaporation total thickness is Cr-Al, Al-Au, Cr-Au or the pure Al of 0.01 μ m respectively, and each forms the pad of 1000 light transmissions.On these pads, carry out taking away this spun gold after the wire bond,, measure qualification rate by detecting the number that pad is peeled off with spun gold.Though the qualification rate of the pad that is made of Ni-Au is about 60%, the qualification rate of the pad that other material constitutes is all more than 98%.
Also have,,, can make it to improve adhesive force with p type semiconductor layer 13 because its thickness is bigger by forming thick pad 32.Thick pad does not have display transparent, for example uses with p electrode identical materials to form, but can realize ohmic contact.
Fig. 5, the bight of removing excision light transmission p electrode 15 forms beyond the notch 312, show with Fig. 4 device be same device.In addition, in Fig. 5,, pad is not showed in order to be clearly shown that notch 312.
Fig. 6 shows identical with luminescent device shown in Figure 1 except that covering the thin light transmission p electrode 15 with insulation transparent diaphragm (diaphragm 411).Diaphragm has allows the transparency of the light transmission more than 90%.In addition, diaphragm forming the Metal Ball that keeps on it on the n electrode 14, even contact with the p electrode, also can prevent both electrical shorts owing to be insulating properties during wire bond.Also have, because diaphragm is transparent, the light transmission that sees through the p electrode that can allow device send just can not reduce the external quantum efficiency (light output efficiency) of device.Have again, when preventing to stab thin p electrode 15, when diaphragm can also prevent wire bond, pad 17 and p electrode are stripped from because of pulling welding wire.
Form the material of diaphragm, as long as transparent insulation just is not particularly limited, gratifying is to comprise silica, titanium oxide, aluminium oxide and silicon nitride.No matter how all these material thickness water white transparency, insulate again.So with the diaphragm that these materials form, the light that sees through the p electrode can be attenuated hardly.Diaphragm can adopt conventional evaporation or sputtering technology to form.Though the thickness to diaphragm is not done special restriction, be generally 0.001 μ m to 10 μ m.
Also have, the zone between n electrode 14 and pad 17, during wire bond, the Metal Ball that is formed by welding wire also makes n electrode 14 and p electrode 15 bridge joints easily.So in Fig. 6, diaphragm will cover this zone all sidedly.
Fig. 7, diaphragm (diaphragm 412) remove to cover the whole face that exposes of p electrode 15, and exposing the exposing outside the end face of end face and n type semiconductor layer of p type semiconductor layer 13 is all same with structure shown in Figure 6.Therefore, the reliability of Fig. 7 luminescent device has also improved again than the reliability of Fig. 6 device.
Fig. 8, except that the weld part of the weld part of n electrode 14 and welding wire and pad 17, continuous diaphragm (diaphragm 413) covers beyond the full-wafer haply, shows all identical with Fig. 6 structure.So, by on the surface of pad 17, also having formed diaphragm, 17 one-tenth of pads the state of protected mould, thereby prevented that pad 17 from peeling off from p electrode 15.In addition, because of diaphragm also is formed on the n electrode 14, so, prevented that also n electrode 14 is stripped from from n type semiconductor layer 12.Like this, just provide reliability good especially device.
Fig. 9 is except that n electrode 14 and pad 17 are formed on across corner on the planar rectangular wafer diagonal, identical with structure shown in Figure 8.The configuration of employing kind electrode can obtain the advantage identical advantage illustrated with Fig. 3.
Below, relevant n electrode of the present invention is described.
N electrode of the present invention is with the metal material that comprises titanium and aluminium and/or gold, for example, comprise titanium and aluminium material, comprise the material of titanium and gold or comprise the material formation of titanium, gold and aluminium.These metals, alloying also can be by the stacked structure of each metal level in advance.With the electrode that these metal materials form, after the annealing, realized good ohmic contact with n type gallium nitride-based III-V group compound semiconductor layer.
In above-mentioned annealing temperature, be preferably in more than 400 ℃, annealing can be carried out 0.01 minute to 30 minutes.
Generally, gallium nitride-based III-V group compound semiconductor mixes even without dopant, owing to form the nitrogen lattice vacancy in crystallization, still has the character that becomes the n type.In the growth course of compound semiconductor,, show best n conductivity type owing to mix the n type dopant of silicon, germanium, selenium, sulphur etc.And gallium nitride-based III-V group compound semiconductor adopts organic metal vapor growth method (MOCVD, or MOVPE), hydride vapor growth method (HDCVD), the such vapor growth method growth of molecular beam epitaxy (MBE) usually.With regard to these vapor growth methods, for example adopt, as hydrogen atoms compounds such as the trimethyl gallium in gallium source, the ammonia that is used as nitrogenous source or hydrazines, also be used as and carry gas with gases such as hydrogen.These gases of hydrogen atoms are thermal decomposited in gallium nitride-based III-V group compound semiconductor growth and emit hydrogen, hydrogen is absorbed in the semiconductor of growth, combines with nitrogen lattice vacancy or n type dopant, have hindered their effects as the alms giver.If make n electrode material or the annealing of p electrode material in the temperature more than 400 ℃, the protium that captures in the semiconducting crystal can be driven out of, so, n type dopant in the crystallization or p type dopant are activated, increased electronic carrier concentration or hole in the crystallization effectively, can think and realize ohmic contact with electrode.Like this Tui Huo effect and above-mentioned spy to open the effect of p type dopant being mixed gallium nitride-based III-V group compound semiconductor that flat 5-183189 number bulletin or US SN07/970145 put down in writing be the same.In this bulletin, record shows, has mixed the gallium nitride-based III-V group compound semiconductor of p type dopant, and since 400 ℃ annealing temperature, resistivity slowly reduces, and then resistivity is constant in the annealing temperature more than 700 ℃.Yet n type gallium nitride-based III-V group compound semiconductor of the present invention, 400 ℃ of annealing beginnings, though slowly reduce resistivity, but do not find anxious strong resistivity decreased, 600 ℃ of annealing down, resistivity becomes 1/2 of initial electrical resistivity approximately, even anneal more than the temperature at this, resistivity also no longer reduces.
To the annealing temperature of n electrode, with more than 500 ℃ for well, be better more than 600 ℃.When the n electrode material contained aluminium, annealing temperature was just enough with lower temperature, preferably more than 450 ℃, is preferably in more than 500 ℃.The upper limit of annealing temperature, the same with the ceiling temperature of p electrode annealing, be the temperature of decomposing less than gallium nitride-based III-V group compound semiconductor.Though the gross thickness to the n electrode is not particularly limited, be generally more than 50 dusts, be preferably 0.01 μ m between the 5 μ m.
The n electrode material of the present invention that comprises titanium and aluminium and/or gold with the laminated construction of each metal level for well.At this moment, can allow titanium layer on n type gallium nitride-based III-V group compound semiconductor layer, directly contact.This be because, titanium and n type gallium nitride-based III-V group compound semiconductor can form that extremely good ohmic contact is dies.In this case, can to form thickness be that 20A is to 0.3 mu m range to titanium layer.In addition, the gross thickness of aluminium or gold layer is with thicker in good than titanium layer.Therefore, during annealing after the titanium surface migration, when carrying out wire bond, just can prevent reduction with the adhesive strength of n electrode wire or soldered ball.
Also the antioxygenic property than the n electrode material of being made up of titanium and aluminium is good to comprise the n type electrode material of the present invention of titanium and gold or titanium and gold and aluminium, and the gold goal that forms during with wire bond adheres to more firm.Also have, contain the n electrode material of the present invention of gold, can make the superiors laminated construction of gold layer.Certainly, this is because gold layer and gold goal bond very firmly.
Figure 10 represents to be provided with the luminescent device of the double-heterostructure of n electrode of the present invention.This device, for example on the substrate 11 that constitutes by sapphire, the thickness that GaN by non-doping is constituted is the resilient coating mediate (not shown) of 0.02 to 0.5 μ m, and for example forming, thickness is the n type gallium nitride-based III-V group compound semiconductor layer 51 of 1 μ m to 10 μ m.
On n type semiconductor layer 51, form by n type gallium nitride-based III-V group compound semiconductor, for example mix the 1st cap rock 52 that the n type GaAlN of the n type dopant of silicon etc. constitutes.This cap rock 52, thickness is 0.01 to 5 μ m usually, is preferably 0.1 to 4 μ m.
Form the active layer (luminescent layer) 53 that the gallium nitride-based III-V group compound semiconductor different with cap rock 52 semiconductor components constitutes on the 1st cap rock 52 again.This active layer 53 can be preferably the low-resistivity In that mixes n type dopants such as silicon with mixing n type or p type dopant aGa 1-aN (0＜a＜1) forms.Active layer 53 thickness are preferably between 0.01 to 0.2 μ m between 10A to 1.5 μ m.
Form the p type gallium nitride-based III-V group compound semiconductor that different semiconductor components are arranged with active layer 53 on the active layer 53 again, for example mix the 2nd cap rock 54 of GaAlN formation of the p type dopant of magnesium etc.The 2nd cap rock 54 common thickness are preferably 0.1 to 1 μ m more than 0.01 μ m.
On the 2nd cap rock 54, form by p type gallium nitride-based III-V group compound semiconductor, for example the contact layer 55 of p type GaN formation also forms p electrode 56 on it.The suitable metal material of any conductivity of p electrode 56 usefulness forms all can.Show the good ohmic characteristic and be used as electrode material, adducible is nickeliferous and golden metal material.Nickel and gold can be made alloy in advance, but the structure (nickel dam is directly contacted with contact layer) that each metal level is stacked is then better.Self-evident, light transmission ohm p electrode 15 of the present invention of relevant above-mentioned each embodiment particularly pad 32 also can both be used for the device of Figure 10.P electrode 56 is connected with welding wire 60 through Metal Ball 59.
Wafer is from contact layer 55, and along its depth direction, the part till the surperficial position of n type semiconductor layer 51 is removed by corrosion, and n type semiconductor layer 51 parts are exposed.On the exposing surface of this n type semiconductor layer 51, formed n electrode 57 of the present invention again.N electrode 57 is connected with welding wire 61 by Metal Ball 58.
Experimental example 6
On the sapphire substrate of 2 inches diameter, form the n type GaN layer that thickness 4 μ m mix silicon, on its surface, every kind each 1000 of the various n electrode materials of evaporation size 10 μ m are done annealing under 450 ℃.All measure the I-E characteristic between the electrode that constitutes by same material.The result is shown in line A～D of Figure 11 A～11D.Figure 11 A corresponding to by 0.01: 1 thickness than the electrode that stacks gradually titanium and aluminium gained, Figure 11 B is the electrode that forms with the Al-Ti alloy that contains 1 weight % titanium, Figure 11 C is the electrode that is made of separately titanium, Figure 11 D is the electrode that is made of separately aluminium.These figure represent the current-voltage characteristic curve figure that represents separately, and by the electrode that aluminium and titanium constitute, like that, form good Ohmic contact with n type GaN layer shown in Figure 11 A, Figure 11 B.Also have, those each electrodes of 1000 have all been expressed the ohm property shown in Figure 11 A, Figure 11 B.On the other hand, separately titanium or the electrode that constitutes of aluminium separately, respectively shown in Figure 11 C, Figure 11 D like that, which does not express the good Ohmic characteristic yet, among each 1000 electrode, the electrode that can present the sort of ohm property shown in Figure 11 A or 11B is only several.
And, with microscopic examination the electrode surface after the annealing, by independent titanium or the independent electrode that constitutes of aluminium, its surface area all goes bad more than 90% and has turned black.
Experimental example 7
On the sapphire substrate of 2 inches diameter, forming thickness is the n type Ga that 0.2 μ m mixes silicon 0.9Al 0.1The N layer.On this surface, by 100 μ m sizes, change titanium and the titanium layer of the laminated construction n electrode material of aluminium and the ratio of aluminum layer thickness, 1000 separately of every kind of evaporations, and 450 ℃ of annealing down.Mensuration is made of the electric current～voltage characteristic of electrode same material.The result is shown in line A～D of Figure 12 A～12D.Figure 12 A～Figure 12 D corresponds respectively to titanium and aluminium by 0.001: 1 thickness ratio, and aluminium and titanium be by 0.001: 1 thickness ratio, and titanium and aluminium is by 1: 0.001 thickness ratio, and aluminium and titanium press 1: 0.001 thickness ratio, stacks gradually the electrode of gained separately.These figure clearly show no matter titanium and aluminium how contain ratio, the good Ohmic characteristic is all arranged.Also have, the Ti-Al electrode that makes titanium layer directly contact the n type semiconductor layer all presents the good ohmic characteristic that is shown in Figure 12 A and 12C, but the Al-Ti electrode that aluminium lamination is directly contacted with the n type semiconductor layer, it is several not present respectively having of satisfied ohm property.Also have, whichsoever electrode is all not rotten yet.
Experimental example 8
Mixing on the n type GaAlN layer of silicon, at first evaporation is thick is the titanium of 0.03 μ m, on it evaporation thick be the aluminium of 0.5 μ m, evaporation is thick thereon again is after the gold of 0.5 μ m, with this laminated construction with all temps annealing 5 minutes.In Figure 13 A～13D, use line A～D ecbatic.Figure 13 A is corresponding to the situation of 300 ℃ of annealing temperatures, and Figure 13 B is that annealing temperature is 400 ℃ a situation, and Figure 13 C is that annealing temperature is 500 ℃ a situation, and Figure 13 D then is 600 ℃ situation corresponding to annealing temperature.Know that from these figure annealing temperature is under 300 ℃ the situation, not show good Ohmic characteristic (Figure 13 A) between electrode and the n type semiconductor layer; Annealing temperature is under the situation more than 400 ℃, to show satisfied ohm property (Figure 13 B13D).Also have, the alloy formation n electrode with titanium, aluminium and gold also obtains same result.
Experimental example 9
To remove evaporation thickness be the titanium of 0.03 μ m mixing on the n type GaN layer of silicon, on it again evaporation thickness be beyond the gold of 0.5 μ m, carry out the experiment same with experimental example 8.At Figure 14 A～14D line A～D ecbatic, Figure 14 A is a situation when being 300 ℃ corresponding to annealing temperature, Figure 14 B is that annealing temperature is 400 ℃ a situation, and Figure 14 C is that annealing temperature is 500 ℃ a situation, and Figure 14 D then is 600 ℃ situation corresponding to annealing temperature.Know that from each figure annealing temperature does not show good Ohmic characteristic (Figure 14 A) between electrode and the n type semiconductor layer under 300 ℃ situation; Annealing temperature shows satisfied ohm property (Figure 14 B～14D) under the situation more than 400 ℃.In addition, the alloy formation electrode with titanium and gold has also obtained same result.
If Figure 14 A～14D and Figure 13 A～13D are made comparisons, the electrode material of titaniferous and gold is added aluminium again, promptly use lower annealing temperature also can obtain to show the n electrode of satisfied ohm property as can be known.So-called obtain satisfied ohm property with lower temperature, Here it is can suppress the thermal decomposition of gallium nitride-based III-V group compound semiconductor, to keeping advantageous particularly on this aspect of its crystallinity.
Experimental example 10
In order to study the adhesion strength of n electrode and gold goal, carried out following experiment.
By reference Figure 15, mixing on the n type GaN layer 71 of silicon, film that formation is made of Al or the multilayer film (each multilayer film stacks gradually from a left side) that constitutes by Ti-Al, Ti-Au, Ti-Au-Al or Ti-Al-Au, make separately 100 every kind of diameter 120 μ m sizes, 500 ℃ of annealing down, form n electrode 72.Then, each n electrode is placed in the air surface oxidation was provided in one day.Then, ball bonding spun gold 74 on each n electrode.Formed the gold goal 73 of diameter 100 μ m.After this, put a cutlery 75,, flatly draw and scrape ball 73, ball 73 is peeled off, perhaps do not peeled off and till damaging at cutlery 75 application of loads from the positive side of gold goal.The result is illustrated in the table 2.In the table 2, the numerical value under the various loads, the number that expression is peeled off ball from electrode, and ball is not peeled off and damage note work " breaking-up ".
Table 2
Figure C20061010020700191
As shown in table 2, by titanium and gold or titanium and aluminium and the golden n electrode that constitutes, than the n electrode that is made of titanium and aluminium, oxidation resistent susceptibility is more superior, thereby also just showing with gold goal has stronger cohesive force.And by titanium and aluminium and the golden occasion that constitutes the n electrode, gold, is also known to show stronger cohesive force than the occasion of aluminium as the superiors as the superiors.
The n electrode material that is made of titanium and aluminium has the good ohmic characteristic, is owing to prevented to reduce because of oxidation the cohesive force of Metal Ball and n electrode material layer, and best on its surface stackedly have dystectic high melting point metal materials layer than aluminium.Such high melting point metal materials comprises gold, titanium, nickel, platinum, tungsten, molybdenum, chromium and/or copper.Preferably gold, titanium and/or nickel.The adhesiveness of these materials and the 1st metal material layer that is made of titanium and aluminium is very good, can not peel off with the 1st material layer, and the bonding that forms Metal Ball during with wire bond is also good.Particularly, the 2nd high melting point metal materials is to comprise Jin Weihao.Preferably comprise gold and gold refractory metal (being preferably titanium and/or nickel) material in addition.These high melting point metal materialses, both alloying in advance also can be the stacked structure of each metal level.At this moment, do the superiors for well with gold, this is to say.Form after such stack membrane, anneal, just obtain the n electrode by above-mentioned condition.The aluminium that the 2nd high melting point metal materials can prevent to be included in the lower metal material moves to the n electrode surface, thereby can prevent aluminaization.
Figure 16 represents the n electrode 57 of this laminated construction.Among Figure 16, the 1st film 57a that n electrode 57 is made up of titanium and aluminium laminated construction, and the 2nd film 57b that the high melting point metal materials of for example laminated construction that forms is thereon formed constitutes.
Experimental example 11
Mix on the n type GaN layer of silicon, evaporation thickness is 0.03 μ m titanium, evaporation thickness 0.1 μ m aluminium again on it, form the 1st film after, on aluminium lamination, except that the gold of the nickel of the titanium of evaporation thickness 0.03 μ m successively, 0.03 μ m and 0.5 μ m, carry out the experiment same with experimental example 8.The result is expressed as the line A～D among Figure 17 A～17D.Figure 17 A is that 300 ℃ situation, Figure 17 B is that annealing temperature is that 400 ℃ situation, Figure 17 C is that annealing temperature is 500 ℃ a situation corresponding to annealing temperature, is 600 ℃ situation and Figure 17 D is an annealing temperature.By each figure as can be known, annealing temperature is under 300 ℃ the situation, not show good Ohmic characteristic (Figure 17 A) between electrode and the n type semiconductor layer, and annealing temperature then shows satisfied ohm property (Figure 17 B～17D) under the situation more than 400 ℃.Also have, adopt 600 ℃ of annealing temperatures also not know and can make the ohm property deterioration.
Experimental example 12
In order to study the adhesion strength of n electrode and gold goal, the electrode material shown in the table 3 below using carries out the experiment same with experimental example 10, and the result is merged note in table 3.
Table 3
Figure C20061010020700211
As known from Table 3, high melting point metal materials has improved the oxidative resistance of the metal material that titanium and aluminium constitutes, and the caking property of itself and gold goal has been improved.
Also have, above-mentioned n electrode of the present invention, self-evident, be applicable to Fig. 1 and Fig. 3 n electrode 14 to each device of Fig. 9, can improve these Devices Characteristics.
Following notebook inventive embodiment
Embodiment 1
On sapphire substrate, the p type GaN layer (thick 1 μ m) that stacks gradually the resilient coating (thickness 0.02 μ m) that is made of non-Doped GaN, mixes silicon n type GaN layer (thick 4 μ m) and mix magnesium is prepared into the wafer of 2 inch diameters.Then, for exposing the n electrode formation portion of n type GaN layer, remove p type GaN layer and corrode.
Then, shelter after the n type GaN layer segment that exposes, on whole p type GaN layer, evaporation thickness is 0.03 μ m nickel, and then evaporation thickness is the gold of 0.07 μ m on it.Then, shelter this vapor-deposited film, the n type GaN laminar surface part AM aluminum metallization of exposing.
Then, the wafer of gained is carried out 10 minutes annealing in process under 500 ℃,, become light transmission along with nickel and billonization.P thickness of electrode after the annealing is 0.07 μ m, presents light transmission.
This wafer is cut into the square chip of 350 μ m, a chip is installed on the cup-shaped lead frame shown in Figure 1, the wire bond of being scheduled to has just been made light-emitting diode.The luminous output of this diode is 80 μ w under the 20mA, and forward voltage is 4V.
Also have, the chip number by 2 inches wafers cut is about 16000, and the light-emitting diode that obtains from these chips is removed qualification rate after the bad product of contact more than 95%.
Subsidiary saying, with the wafer that embodiment 1 obtains, when similarly the p electrode directly being contacted configuration (being produced on the sapphire substrate) chip with lead frame respectively with the n electrode with prior art, the chip size minimum also will have 1mm square.On 2 lead frames, the square chip of this 1mm is installed, is carried out required electrode and connect, and make light-emitting diode.This light-emitting diode is used the 20mA electric current, luminously is output as 40 μ w, and does not lateral luminously as you know export.And the chip number that 2 inches wafers are cut into is no more than 2000, and by the light-emitting diode that these chips obtain, the qualification rate of removing after the bad product of contact only is 60%.
Therefore, according to the present invention,, and be light transmission because the electrode of p type semiconductor layer is by realizing that metal ohmic contact constitutes, allow from the luminous luminescent device of gallium nitride system compound semiconductor layer unilateral observation so can provide a kind of.Can also confirm,, can take out the light of emission effectively exactly owing to can not reduce the external quantum efficiency (light taking-up efficient) of luminescent device.And, according to the present invention, also can confirm: can dwindle the size of 1 chip, improve productivity especially, the effect that increases qualification rate and reduce production costs is arranged.
Embodiment 2
Except that annealing, all carry out the technical process of embodiment 1 with 600 ℃.Resulting p type electrode has same thickness with embodiment 1 electrode haply, and shows same light transmission.And the light-emitting diode of making presents luminous output, the forward voltage roughly the same with embodiment 1 diode, and qualification rate also is the same substantially in addition.
Embodiment 3
On the p type GaN layer, except that chromium, the thickness of evaporation thickness 0.5 μ m successively are the nickel of 0.5 μ m, carry out the technical process of embodiment 1.The thickness of resulting p type electrode is 0.7 μ m, and presents same light transmission.And the light-emitting diode of making shows luminous output and the forward voltage roughly the same with embodiment 1 light-emitting diode, and qualification rate is also roughly the same.
Embodiment 4
On the p type GaN layer,, carry out the technical process of embodiment 1 except that evaporation thickness successively is that the platinum of 0.01 μ m, thickness are the titanium of 0.1 μ m.Resulting p type electrode has the thickness of 0.07 μ m, and presents same light transmission.And the light-emitting diode of making shows luminous output and the forward voltage roughly the same with the light-emitting diode of embodiment 1, and qualification rate is also much the same.
Embodiment 5
On the sapphire substrate of 2 inches diameter, stack gradually the GaN resilient coating, mix silicon n type GaN layer, mix silicon GaAlN cap rock, mix zinc and silicon the InGaN active layer, mix magnesium GaAlN cap rock, and mix magnesium p type GaN contact layer, and form the wafer of double-heterostructure.
Then, implement corrosion, the n type GaN layer of exposed portions serve to having 1 chip that Figure 10 illustrates structure.Use predetermined mask, the titanium of evaporation 100 dusts on the n type GaN layer that each exposes, the gold of evaporation thickness 0.5 μ m again on it forms the multilayer film of diameter 100 μ m.
With the wafer of gained, in blanket of nitrogen, under 600 ℃, annealed 5 minutes, make multilayer film change into the n electrode.Measure the interelectrode electric current～voltage characteristic of n with wafer probe, shown the ohm property shown in Figure 12 D.
Then, on p type contact layer, after conventional method formation p electrode, wafer is cut into chip.So, obtain 15000 chips by 2 inches wafers.
Adopt the tube core welding, each chip placing on lead frame, is connected spun gold with the ball bonding machine again on p and n electrode.Among 15000 chips, ball and n electrode are not all peeled off in ball bonding.And, after the welding, extract 20 chips arbitrarily out, during owing to each bar spun gold of pulling, before whole gold goal peeled off from the n electrode, spun gold was just disconnected.
Embodiment 6
As the n electrode material, remove steaming degree 100
Figure C20061010020700232
Titanium, steam again on it beyond aluminium of 0.4 μ m of base thickness degree, manufacture similarly to Example 5, obtain 15000 luminescence chips.Measure the electric current～voltage characteristic of all n electrodes with wafer probe, provided the characteristic shown in Figure 11 A.And within 15000 chips, in the process of ball bonding, gold goal and n electrode are not peeled off.And, after welding, extract 20 chips arbitrarily out, when pulling each bar spun gold, before whole gold goal peeled off from the n electrode, spun gold was just disconnected.
Embodiment 7
As the n electrode, except that evaporation thickness is the Ti-Al alloy that contains 1% titanium of 0.5 μ m; The practice is identical with embodiment 5, thereby obtains 15000 luminescence chips.Measure the electric current～voltage characteristic of whole n electrodes with crystal probe, provided the characteristic shown in Figure 11 B.And within 15000 chips, in ball bonding, gold goal and n electrode are not peeled off.And, after welding, extract 20 chips arbitrarily out, when pulling each bar spun gold, all gold goals all before peeling off from the n electrode spun gold just disconnected.
Embodiment 8
With the luminescence chip of embodiment 5, at p electrode and n electrode place and the frame bonding that 2 lead-in wires are arranged.In this case, p electrode and n electrode pass through indium binding agent bonding separately.After the bonding, when pulling the n electrode, taken place to peel off at the interface of indium and lead frame with the lead frame that is connected.
Present embodiment has been represented binding agent and the direct good bond of lead frame that n electrode of the present invention is used always with scolding tin, indium, billon etc.
Embodiment 9
In this embodiment, except evaporation 100
Figure C20061010020700241
Titanium, thereon evaporation thickness be the aluminium of 0.1 μ m to form the 1st film, the nickel that forms titanium that thickness is 0.1 μ m and 0.1 μ m more thereon is as beyond the 2nd film, other manufacture method of n type electrode material is all identical with embodiment 5.Obtain 15000 luminescence chips thus.Measure the electric current～voltage characteristic of whole n type electrodes with wafer probe, provided the characteristic shown in Figure 13 D.And within 15000 chips, in ball bonding, gold goal and n electrode have all been slided and have been peeled off.And, after the welding, extract 20 chips at random out, when pulling each spun gold, all gold goals all before peeling off from the n electrode spun gold just disconnected.
Embodiment 10
As the 2nd film of n electrode material, except that evaporation thickness is that the titanium of 0.1 μ m and thickness are the gold of 0.4 μ m, all make similarly to Example 9, obtain 15000 luminescence chips.Measure the electric current～voltage characteristic of whole n electrodes according to wafer probe, provide the characteristic shown in Figure 14 D.And among 15000 chips, in ball bonding, gold goal and n electrode are not peeled off.And, after the welding, extract 20 chips at random out, when pulling each spun gold, all gold goals all before peeling off from the n electrode spun gold just disconnected.
Embodiment 11
As the 2nd film of n electrode, the titanium, the thickness that remove evaporation thickness and be 0.1 μ m are the chromium of 0.1 μ m, and thickness is beyond the gold of 0.4 μ m, all make similarly to Example 9, obtain 15000 luminescence chips.Electric current～the voltage characteristic of whole n electrodes of measuring according to wafer probe provides the characteristic shown in Figure 13 C or the 13D.And in 15000 chips, in ball bonding, gold goal and n electrode can not peeled off.And, after the welding, extract 20 chips at random out, when pulling each spun gold, all gold goals all before peeling off from the n electrode spun gold just disconnected.
Embodiment 12
With the luminescence chip of embodiment 9, in p electrode and n electrode place and 2 lead frames bonding.In this case, p electrode and n electrode pass through indium binding agent bonding separately.After the bonding, when pulling with lead frame that the n electrode is connected, peel off at the interface of indium and lead frame.
Though more than make an explanation with reference to specific embodiments of the present invention, the present invention should not only limit to this.Each embodiment with regard to its applicable scope, also can be applicable to other embodiments.And, for example, can be added to the present invention on the gallium nitride-based III-V group compound luminescent device of p-n homojunction or p-n double heterojunction, also be applicable to the gallium nitride-based III-V group compound semiconductor luminescent device of p-n single heterojunction.In addition, the present invention not only is applicable to light-emitting diode, and is applicable to other luminescent devices such as laser diode, also has the light-sensitive device to the following wavelength sensitive of 600nm such as solar cell, photodiode.It is the electrode material of ohmic contact that the present invention mainly provides with gallium nitride-based III-V group compound semiconductor.Thereby the present invention can be applicable to any semiconductor device that has p type gallium nitride-based III-V group compound semiconductor layer and/or n type gallium nitride-based III-V group compound semiconductor layer on the substrate.This substrate is not limited to the sapphire insulation substrate, also available carborundum (SiC), silicon (Si), zinc oxide (ZnO), GaAs (GaAs), gallium phosphide semiconductor chips such as (GaP).

Claims (9)

1. a gallium nitride-based III-V group compound semiconductor device comprises: the substrate with first and second first type surfaces; With on first first type surface that is formed on described substrate, contain the semiconductor laminated structure of n type gallium nitride-based III-V group compound semiconductor layer and p type gallium nitride-based III-V group compound semiconductor layer;
Wherein, described p type semiconductor layer is arranged on the described n type semiconductor layer, and the plane is a rectangular shape;
The n type semiconductor layer exposed portions serve of described n type semiconductor layer is exposed in bight on the diagonal of the planar rectangular of described p type semiconductor layer, existence;
In described n type semiconductor layer exposed portions serve, be provided with first electrode of ohmic contact, and
Described p type semiconductor layer is provided with second electrode of the ohmic contact of light transmission.
2. gallium nitride-based III-V group compound semiconductor device as claimed in claim 1 wherein, has the insulating properties transparent protective film of a part that covers this second electrode surface on described second electrode.
3. gallium nitride-based III-V group compound semiconductor device as claimed in claim 1 wherein, has pad electrode on described second electrode.
4. gallium nitride-based III-V group compound semiconductor device as claimed in claim 3, wherein, described pad electrode and described first electrode are configured on the diagonal of planar rectangular.
5. gallium nitride-based III-V group compound semiconductor device as claimed in claim 3; wherein; described gallium nitride-based III-V group compound semiconductor device has the transparent protective film of insulating properties, and this diaphragm covers the part on the surface of the part of the part of exposing end face of described p type semiconductor layer, described n type semiconductor layer exposed portions serve and described second electrode.
6. gallium nitride-based III-V group compound semiconductor device as claimed in claim 5, wherein, described diaphragm also covers the part surface of described pad electrode.
7. gallium nitride-based III-V group compound semiconductor device as claimed in claim 6, wherein, described diaphragm also covers the part of described first electrode.
8. gallium nitride-based III-V group compound semiconductor device as claimed in claim 2; wherein; described second electrode is provided with pad electrode, and described diaphragm covers the surface of exposing end face and described n N-type semiconductor N of the p type semiconductor layer of exposing between described first electrode and the pad electrode.
9. as claim 3 or 8 described gallium nitride-based III-V group compound semiconductor devices, wherein, described second electrode has the notch portion on the part surface of exposing described p type semiconductor layer, described pad electrode contacts and fills up this notch portion with the p type semiconductor layer of described notch portion, and extends on described second electrode.
CNB2006101002071A 1993-04-28 1994-04-28 Gallium nitride-based iii-v group compound semiconductor device Expired - Lifetime CN100397670C (en)

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