CN100395901C - Light emitting diode and process for producing same - Google Patents

Abstract

The back surface of a semiconductor crystal substrate 102 which has a thickness of about 150 mum and is made of undoped GaN bulk crystal consists of a polished plane 102 a which is flattened through dry-etching and a grinded plane 102 b which is formed in a taper shape and is flattened through dry-etching. On about 10 nm in thickness of GaN n-type clad layer (low carrier concentration layer) 104, about 2 nm in thickness of Al<SUB>0.005</SUB>In<SUB>0.045</SUB>Ga<SUB>0.95</SUB>N well layer 51 and about 18 nm in thickness of Al<SUB>0.12</SUB>Ga<SUB>0.88</SUB>N barrier layer 52 are deposited alternately as an active layer 105 which emits ultraviolet light and has MQW structure comprising 5 layers in total. Before forming a negative electrode (n-electrode c) on the polished plane of the semiconductor substrate a, the polished plane is dry-etched.

Description

Light-emitting diode and manufacture method thereof

Technical field

The present invention relates to light-emitting diode structure and manufacture method thereof, relate in particular to the taking-up efficient of the external quantum efficiency and the light of semiconductor element.

Therefore, the utmost point of the present invention is applicable to the LED (light-emitting diode) and the manufacturing process thereof of bob optical wavelength such as, violet light luminous such as bluish violet or luminescence-utraviolet.

In addition, the present invention relates to: by the semiconductor chip that has been formed by the conductivity III group-III nitride based compound semiconductor of attrition process by abradant surface on form the method for electrode.

The present invention can be widely used in directly forming the semiconductor element of electrode mode on semiconductor chip.As this semiconductor element, except semiconductor laser (LD), light-emitting diode semiconductor light-emitting elements such as (LED), such as also enumerating photo detector and pressure sensor etc.Because application of the present invention does not limit the concrete function of these semiconductor elements and formation etc. especially, thereby applicable scope of the present invention is extremely wide.

Background technology

In following non-patent literature 1, summarize that to have disclosed relevant be the external quantum efficiency of light-emitting diode at center and the general technology opinion of light taking-up efficient with White LED and visible light LED.

In addition, in following patent literature 1, a side of the n N-type semiconductor N substrate of having recorded and narrated at light-emitting diode has the formation example of quadrangular pyramid platform shape tapered portion, has disclosed by forming the situation that this tapered portion improves the taking-up efficient of light.

Usually, when making light-emitting diode, for being formed with the crystal growth substrate of aimed semiconductor layer and electrode, in order in segmentation process thereafter, this semiconductor wafer to be cut apart well by light-emitting component unit, and after having implemented crystal growth etc., grind etc. from the back side, and be processed into chip shape with suitable thickness.Like this, be physical treatment by mechanicalnesses such as grinding or cuttings usually, implement these shapes processing.

In addition, being provided with the structure of the semiconductor element of electrode as the back side at semiconductor chip, is well-known such as the semiconductor light-emitting elements of record in aforementioned patent document 2～patent documentation 4 etc.In these semiconductor elements, be formed with the n electrode at the back side of semiconductor chip with conductivity, on p type layer, be formed with the p electrode with n electrode contraposition ground.

In addition, can find out from aforementioned patent documentation 5 and patent documentation 6 etc., usually be used as under the occasion of crystal growth substrate simultaneously at semiconductor chip, the thickness of this crystal growth substrate is guaranteed in 300 μ m～800 μ m degree, these substrates are through milled processed, usually being processed to thickness is the thin slice of 50 μ m～150 μ m degree, cuts apart by each chip (light-emitting component) unit then.Before or after the required crystal growth operation of each semiconductor layer, can be intended to realize the milled processed of this sheet.

Yet if substrate is thin excessively, substrate itself is easy to break, and the required time of grinding step can increase, therefore be not preferred.And if substrate is blocked up, then when dividing semiconductor wafer, be difficult to be divided into correctly or reliably desirable shape, thereby neither be preferred.In addition, be used as under the occasion of crystal growth substrate simultaneously at semiconductor chip, because usually must be at the front and back of crystal growth operation carrying (move operation) semiconductor chip, thereby, after the crystal growth operation, carry out aforementioned milled processed usually in order to make semiconductor chip have the intensity that to bear this carrying.

Based on aforementioned reason, in the stage before the segmentation process that comes dividing semiconductor wafer by each chip unit, implement aforesaid milled processed usually, thereby make this semiconductor chip from carrying the thickness of (or being easy to carrying), reach the thickness of about 100 μ m degree.

Non-patent literature 1: the show of hillside plot model, " high efficiency of visible light LED " Applied Physics, No. 2 (1999) p of the 68th volume, 139-145

Patent documentation 1:JP spy opens flat 11-317546

Patent documentation 2:JP spy opens the 2002-261014 communique

Patent documentation 3:JP spy opens the 2001-77476 communique

Patent documentation 4:JP spy opens the 2001-102673 communique

Patent documentation 5:JP spy opens flat 7-131069 communique

Patent documentation 6:JP spy opens flat 11-163403 communique

The problem that the invention quasi-solution is determined

Yet, if implement aforesaid physical property shape processing, because physical property friction or impact, Will inevitably cause on the surface of machined surface, form crystal structure confusion and thickness and be 0.1～The damage layer of 15 μ m degree (to call the physical damnification layer in the following text), and remain on this machined surface. And, We are by repeatedly implementing the relevant purple light that sends that has adopted the GaN bulk crystal at substrate The trial-production of light emitting diode, inspection, discussion and demonstration test etc. have been found following phenomenon: because being somebody's turn to do Shape processing and physical injury layer that will inevitably be residual relatively is easy to absorb (perhaps to element internal Scattering) less than the shorter-wavelength light (royal purple light, purple light, ultraviolet light etc.) of 470nm.

In addition, for blue led and the green LED of peak luminous wavelength more than or equal to 470nm , verify equally, but this problem is not obvious or do not come to the surface.

Usually, generally select GaN to be used as the crystal growth substrate, this such as lattice paprmeter etc. each Kind of physical characteristic and N-shaped contact layer on consistent or similar the putting, are favourable roughly. In addition, by Band gap in the AIN substrate is bigger, thereby the light that has sent is difficult to again be absorbed, in this point On be favourable.

Yet, be that independent crystal (to call bulk crystal etc. in the following text) is as the crystal growth with AlGaN Under the occasion of substrate, because between the growing semiconductor crystal layer of performance element function and its substrate Specific refractivity is little, thereby from the light of luminescent layer (active layer) output, quite a few leakage is arranged Enter in the substrate. Therefore, effectively reclaim these light and also effectively draw this point to luminous outlet side GaN bulk crystal etc. is being used for becoming an all the more important problem under the occasion of substrate. That is, This problem is considered to, and having adopted the AlGaN such as GaN in manufacturing from now on is the crystal growth substrate During short light emitting diode of emission wavelength, in the taking-up efficient of external quantum efficiency and the light of element Become the problem that is difficult to avoid on this point.

The granular size of the paste that adopts when aforesaid attrition process in addition, (grinding agent) Under the big occasion, it is coarse that the face of being polished can become, and perhaps can form damage under being polished face Layer. So-called damage layer, the friction when meaning because of attrition process and pressure etc. cause and can observe The layer of crystallinity deterioration, although also be subjected to the impact of values such as paste, frictional force, pressure etc., Investigation according to us finds that it is formed at the thickness of 0.1～10 μ m degree usually.

The cross sectional photograph of the damage layer that is generated by this attrition process shown in Fig. 4. This grinding adds The worker is that the paste with 9 μ m carries out. (a) is based on scanning electron microscopy in the left side of this Fig. 4 The image of mirror (SEM image), right side (b) is based on the monochrome image (CL of electron-ray luminescence Image). Can find out from these photos, the crystallinity deterioration the damage layer be polished shape under the face Become to have 1 μ m and more than.

This damage layer can hinder electrode and the aforementioned good contact shape that is polished between the face of follow-up formation Attitude, owing to have this damage layer, thereby can not obtain good resistive contact. This becomes makes The driving voltage of semiconductor element rises to the reason of unnecessary height.

In order to make by the abradant surface slyness, the aforementioned affected layer thickness that perhaps reduces to follow attrition process and generate, wish to suppress the value of paste, frictional force, pressure etc. in the attrition process as far as possible, but in practice, if adopt this countermeasure, then the processing time of attrition process just can greatly prolong, thereby for industrial products production, this countermeasure is unpractical.

Summary of the invention

The present invention is intended to solve aforementioned problems, and its purpose is, such as utilizing the crystal growth substrate that is made of semiconductor bulk crystals such as GaN, when making the short light-emitting diode (LED) of emission wavelength, guarantees that higher external quantum efficiency and light take out efficient.

In addition, another object of the present invention is to, effectively suppress the driving voltage of semiconductor element.

In addition, another purpose of the present invention is, shortens the processing time of aforementioned attrition process as far as possible.

Wherein, utilize in each method of the present invention at least any one, just can reach aforementioned each purpose respectively, each invention of the application does not guarantee to exist the method that can solve aforementioned all problems simultaneously.

Following method is effective to solving aforementioned problems.

That is, first method of the present invention is, is laminated with the surface-emitting type manufacturing method for LED of semiconductor layer on the crystal growth face of crystal growth substrate, and aforementioned crystal growth wafer is by Al _xGa _1-xN or carborundum constitute, and wherein, 0≤x≤1 is for aforesaid semiconductor layer, general expression Al _1-x-yGa _yIn _xN sets up, it is made of the different a plurality of semi-conductive stepped construction of ratio of components, wherein, 0≤x≤1,0≤y≤1,0≤1-x-y≤1, this method for manufacturing light-emitting comprises: from the back side to the crystal growth substrate grind, cutting or inject process, on aforementioned substrate, be formed with the shape manufacturing procedure of the exit facet or the reflecting surface that help to export light thus, wherein, this exit facet or reflecting surface have planar portions and taper surface, this taper surface be positioned at this planar portions around, tilt with respect to aforementioned crystal growth face; Utilize etching, exit facet or the reflecting surface that forms through this shape manufacturing procedure further carried out the machined surface finishing step that fine finishining is handled.

Wherein, aforementioned etched depth is preferably 0.1 μ m～15 μ m, more preferably 0.2 μ m～8 μ m.Be preferably 1 μ m～7 μ m.In addition, as the crystal growth substrate, can adopt known any materials.

In addition, second method of the present invention is in aforementioned first method, to have: at the whole back side of aforementioned crystal growth substrate, form the operation at the electrode of n conduction type layer.

In addition, third party's method of the present invention is, in aforementioned first method, the operation of at least a portion of the aforementioned taper surface that formation is formed by the aforementioned shapes manufacturing procedure is made of following operation, that is: each that is formed for by each light-emitting diode is cut apart the operation of the summary V font slot segmentation of cutting apart usefulness of the semiconductor wafer with a plurality of light-emitting diodes.In addition, cubic method of the present invention is, aforementioned first or third party's method in, the peak luminous wavelength of aforementioned light-emitting diode is less than 470nm.

In addition, the 5th method of the present invention is, has in the surface-emitting type light-emitting diode of semiconductor layer stacked on the crystal growth face of crystal growth substrate, and aforementioned crystal growth substrate is by Al _xGa _1-xN or carborundum constitute, and wherein, 0≤x≤1 is for aforesaid semiconductor layer, general expression Al _1-x-yGa _yIn _xN sets up, it is made of the different a plurality of semi-conductive stepped construction of ratio of components, wherein, 0≤x≤1,0≤y≤1,0≤1-x-y≤1, aforementioned crystal growth substrate has: through grinding, cutting or inject process is that the physical property shape is processed and the exit facet or the reflecting surface that help light output of formation, this exit facet or reflecting surface have planar portions and taper surface, this taper surface be positioned at this planar portions around, tilt with respect to aforementioned crystal growth face; And then, in aforementioned exit facet or the aforementioned reflecting surface, because of the lip-deep physical injury layer of following physical property friction that aforementioned shapes processing takes place or impact to remain in exit facet or reflecting surface is removed.

In addition, the 6th method of the present invention is, in aforementioned the 5th method, on aforementioned exit facet metal level is set, and this metal level has makes light take out the light transmission that side sees through to light.

In addition, the 7th method of the present invention is, in the aforementioned the 5th or the 6th method, on aforementioned reflecting surface metal level is set, and this metal level has the reflectivity that makes light take out lateral reflection to light.

In addition, of the present invention the from all directions method be in any one method of the aforementioned the 5th to the 7th,, to have electrode at n conduction type layer at the whole back side of aforementioned crystal growth substrate.

In addition, the 9th method of the present invention is that in the light-emitting diode of the surface-emitting type with semiconductor layer stacked on the crystal growth face of crystal growth substrate, aforementioned crystal growth substrate is by the Al of n type _xGa _1-xN or carborundum constitute, and wherein, 0≤x≤1 is for aforesaid semiconductor layer, general expression Al _1-x-yGa _yIn _xN sets up, it is made of the different a plurality of semi-conductive stepped construction of ratio of components, wherein, 0≤x≤1,0≤y≤1,0≤1-x-y≤1, the taper surface of relative crystal growth face tilt is set at least a portion sidewall of aforementioned light-emitting diode, this taper surface is that the face side of light-emitting diode is exposed in the side with crystal semiconductor layer that positive electrode is set, and, the physical injury layer that adopts the physical property friction that takes place because of the formation of following taper surface or impact to remain on the aforementioned conical surface is removed, and aforementioned crystal growth substrate has the reflective metal layer in its whole back side formation.

In addition, the tenth method of the present invention is, in aforementioned the 9th method, by cutting apart by each of each light-emitting diode in the light-emitting diode that semiconductor wafer with a plurality of light-emitting diodes makes, partial sidewall at least at light-emitting diode is provided with taper surface, and this taper surface is formed by a part of surface of the summary V font slot segmentation of cutting apart usefulness that is used to carry out previous segmentation simultaneously.

In addition, the 11 method of the present invention is that in any one method of the aforementioned the 5th to the tenth, the peak luminous wavelength of this light-emitting diode is less than 470nm.

In addition, the 12 method of the present invention is, by the semiconductor chip that has been constituted by the conductivity III group-III nitride based compound semiconductor of attrition process by abradant surface on form the method for electrode, the aforesaid semiconductor substrate is by the Al of n type _xGa _1-xN or carborundum constitute, wherein, and 0≤x≤1, comprise etching work procedure, aforementioned form the electrode forming process of electrode on by abradant surface before, in this etching work procedure, carried out dry ecthing by abradant surface to aforementioned, etch depth is in more than or equal to the scope of 0.1 μ m smaller or equal to 15 μ m.

Wherein, said here " III group-III nitride based compound semiconductor " generally comprises by 2 yuan, 3 yuan or 4 yuan of " Al _1-x-yGa _yIn _xN; 0≤x≤1,0≤y≤1,0≤1-x-y≤1 " semiconductor of this general expression any mixed crystal ratio of expressing, in addition, be added with the semiconductor of p type or n type impurity, also belong to the category of this " III group-III nitride based compound semiconductor ".

In addition, at least a portion of aforementioned III family's element (Al, Ga, In) is replaced into boron (B) and thallium (T1) etc., perhaps at least a portion with nitrogen (N) is replaced into semiconductor of phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi) etc. etc., also belongs to the category of this " III group-III nitride based compound semiconductor ".

In addition, as aforesaid p type impurity (being led), such as adding magnesium (Mg) or calcium known p type impurity such as (Ca).

In addition, as aforementioned n type impurity (alms giver), such as adding silicon (Si), sulphur (S), selenium (Se), tellurium (Te) or germanium known n type impurity such as (Ge).

In addition,, can add two kinds and above element simultaneously, also can add two types (p type and n types) simultaneously these impurity (being led or the alms giver).

As mentioned above, if before electrode forming process to being carried out dry ecthing by abradant surface, then can remove the crystallinity deterioration affected layer, simultaneously by the abradant surface comparison slyness that can become, thereby can obtain good resistive contact.Can think that this is because because crystallinity deterioration etc. causes the higher resistivity of affected layer generation.

By aforementioned effect, can utilize preceding method effectively to suppress the driving voltage of semiconductor element.

Implement dry ecthing such as why utilizing RIE device and ICP device to wait, its reason is, optionally only etching is carried out on desirable surface.

In addition, according to preceding method,, thereby can shorten the milling time of semiconductor chip owing to needn't be specially the value of the paste in the attrition process, frictional force, pressure etc. is suppressed to less.Therefore, the method according to this invention can improve the productivity ratio of semiconductor element.

In addition, the 13 method of the present invention is, in aforementioned the 12 method, in aforementioned etching work procedure to the aforementioned etch depth of dry ecthing that undertaken by abradant surface in more than or equal to the scope of 0.2 μ m smaller or equal to 8 μ m.

Fig. 5 is a curve chart, its illustration to by with 4 * 10 ¹⁸/ cm ³Concentration added Si gallium nitride (: n type GaN) depth D of having been carried out dry ecthing by abradant surface of the semiconductor chip that constitutes (the GaN substrate among Fig. 6, Fig. 7), with the relation of resistance characteristic of this moment.For the depth D of dry ecthing, measured voltage-current characteristic with 0 μ m, 1 μ m, these three kinds of situations of 4 μ m.

Fig. 6, Fig. 7 represent the execution mode of this mensuration.Semiconductor chip a by abradant surface on, be formed with n electrode c by evaporation.Can form crystal grown layer b arbitrarily according to the structure of desirable semiconductor element.This moment, used crystal growth was arbitrarily.Shown in Figure 7 is a kind of structure of having removed affected layer a1 by dry ecthing.In addition, the distance between these two n electrode c of Fig. 6 and Fig. 7 is about 100 μ m degree respectively.And,, constitute determinator y by not shown variable voltage DC power supply, voltage determination device and galvanometer.

After adopting the paste of about 9 μ m to carry out attrition process, drawn measurement result shown in Figure 5, but can find out from this result, if do not implement dry ecthing fully, then the resistance characteristic of relevant n electrode c will very worsen.

According to aforementioned first method, making under the occasion of semiconductor light-emitting elements, such as Fig. 5, Fig. 6, shown in Figure 7 as described above, semiconductor chip is preferably by n type Al _xGa _1-xN (0≤x≤1) constitutes.In other words, this second method is very suitable for forming electrode at the substrate back of semiconductor light-emitting elements at least.

Especially, if utilize by Al _xGa _1-xN

In the semiconductor that constitutes such as the material (n type gallium nitride) that has added n type impurity such as Si, form aforesaid semiconductor substrate a, then from solidity, lattice constant, crystallinity, and physical property viewpoint such as conductance property, because it is this semiconductor chip is had very well simultaneously as the function of growing semiconductor crystal substrate and as the function of n type contact layer, thereby very suitable.

In addition, the of the present invention the tenth cubic method is, in the aforementioned the 12 or the 13 method, former electrodes comprise be layered in aforementioned by the vanadium layer on the abradant surface, be layered in aluminium lamination or aluminium alloy layer on this vanadium layer.

According to the 12 method of the present invention, that removed by dry ecthing is 0.1 μ m～15 μ m by the degree of depth of abradant surface.

Although also depend on the conditions such as value of paste, frictional force and pressure etc. in the attrition process, the present invention can act in aforementioned range effectively.If this degree of depth is excessive, then the time of dry ecthing is long, because of rather than preferred.And if this degree of depth is too small, then based on the effect of dry ecthing with insufficient, can not obtain good resistive contact, thereby neither be preferred.Perhaps, if this degree of depth is too small, then for to a certain degree the resistive contact of good electrical, just must reduce the size of paste, frictional force and pressure etc. greatly, thereby milling time will prolong greatly, because of rather than preferably.

In addition, according to the 13 method of the present invention, that removed by dry ecthing is 0.2 μ m～8 μ m by the degree of depth of abradant surface.

The optimum value of the degree of depth of relevant dry ecthing although also depend on the value of paste, frictional force, pressure etc. and the ratio of components of substrate etc., roughly is in this scope.That is, in aforementioned range, attrition process time and dry ecthing time sum are suppressed to minimum, can between semiconductor chip and electrode, obtain best resistance characteristic thus.

Utilize aforementioned method of the present invention, can be effectively or reasonably solve aforementioned problems.

The invention effect

The effect that obtains with aforementioned method of the present invention is as follows.

Promptly, first method according to the present invention, be that physical treatment (grinding, cutting or inject process) is implemented desirable shape and added man-hour by aforesaid mechanicalness, aforementioned exit facet or reflecting surface (: below, sometimes be generically and collectively referred to as the Physical Processing face or abbreviate machined surface etc. as) the surface on residual aforementioned physical damnification layer, can effectively be removed by etching.Therefore, go up the light absorption of formed physical damnification layer based on machined surface (: aforesaid exit facet or reflecting surface) or can be effectively suppressed to the light diffusion of element internal.Therefore, when making light-emitting diode (LED), can guarantee that its external quantum efficiency and light take out efficient than the highland.

In addition, according to first method of the present invention, absorb or can reduce by the side wall surface of light-emitting diode, thereby can improve the external quantum efficiency of light-emitting diode effectively and take out efficient to the light quantity of internal diffusion.

In addition, the aforementioned shapes manufacturing procedure comprises that this taper forms operation, thus, can comprise this tapered portion and come disposable summary to implement the aforementioned Physical Processing face that comprises aforementioned tapered portion is carried out etched operation (machined surface finishing step).

According to second method of the present invention, can carry out at least a portion that aforementioned taper forms operation by carrying out the operation that forms slot segmentation.In addition, also can carry out aforesaid taper simultaneously and form all of operation by forming the operation of slot segmentation.Therefore, according to second method of the present invention, can guarantee well that aforementioned taper forms the execution efficient of operation.

In addition, for dividing luminous light-emitting diode less than the frequency band inside of 470nm at least at luminous frequency spectrum at least, the aforementioned approaches method can be brought into play great effect.Yet, according to the of the present invention the 4th or the 11 method, in the luminous spectrum bands of the light-emitting diode of target, less than most of light of 470nm, no longer be subjected to aforementioned physical damnification layer harmful effect (: the absorption of light or to the diffusion effect of element internal.) therefore, utilize these methods, can make and get rid of the external quantum efficiency decline that causes because of the physical damnification layer effectively, and the high light-emitting diode of luminous efficiency.

Wherein, aforesaid threshold values (470nm) is rule of thumb distinguished as mentioned above, is considered to this threshold value and also depends on the damage roughness of physical damnification layer and the material (physical property) of the semiconductor crystal (grown layer or semiconductor bulk crystal substrate) in the degree of depth and/or the shape processing etc. to a certain extent.In addition, such as the roughness of physical damnification layer or degree of depth etc., also depend in the milled processed material, diameter, quality, amount of exercise and the flow etc. of the particle that uses in the employed paste material and particle diameter and/or inject process.But can confirm that the present invention is effective at least in aforementioned range.

In addition, material as crystal growth substrate of the present invention, can adopt known any materials, but in order to improve the light output property of light-emitting diode as far as possible, consider that refractive index and light transmission etc. relate to the physical characteristic that light takes out efficient, as the material of aforementioned crystal growth substrate, preferably adopt such as semiconductor bulk crystals such as AlGaN system or SiC, (all directions of the present invention method).In addition, when the physical characteristic that in substrate, has adopted light as the aforementioned to take out efficient preferably during material, more remarkable effect of the present invention.

Especially, being used as the crystal growth substrate by selecting GaN, can making such as various physical characteristics such as lattice constants roughly consistently or similar with n type contact layer, is favourable in this.In addition, because the band gap of AIN substrate is bigger, thereby the light that has sent is difficult to be absorbed once more, is favourable in this.In addition, perhaps moderately additional by suitably selecting these superperformances, or carry out optimum weighting, can make composition formula Al _xGa _1-xAluminium ratio of components x among the N (0≤x≤1) becomes extremely suitable adjustment parameter (all directions of the present invention method).

In addition, according to the 5th method of the present invention, owing to removed the physical damnification layer, thereby the aforementioned lights that can suppress to cause because of the physical damnification layer effectively absorbs the light diffusion of inside (or to).Therefore, according to the 5th method of the present invention, in the light-emitting diode (LED) of target, can guarantee that higher external quantum efficiency and light take out efficient.

In addition, according to the 6th method of the present invention, be provided with on the exit facet of light under the occasion of light transmission metal level, the light absorption on the light transmission face is inhibited, and near the light transmission rate this metal level is improved, thereby can improve external quantum efficiency or take out efficient.

In addition, according to the 7th method of the present invention, be provided with on the reflection of light face under the occasion of reflective metal layer, the light absorption of this reflecting surface is inhibited, and the reflectivity on this reflecting surface is improved, thereby can improve external quantum efficiency or take out efficient.

In addition, according to the 5th～from all directions method of the present invention, absorb or can reduce very effectively by the side wall surface of light-emitting diode, and can take out side to light and export these light effectively to the light quantity of internal diffusion, but thereby the utmost point improve the external quantum efficiency and the extraction efficiency of light-emitting diode effectively.

In addition, according to the 9th method of the present invention, because taper surface exposes from face side, thereby in the occasion that will directly take out to the face side of light-emitting diode from the light of taper surface outgoing etc., but the utmost point improves the external quantum efficiency and the extraction efficiency of light-emitting diode effectively.

And, also can utilize the part of the slot segmentation that is formed at face side surperficial, form these taper surfaces (the tenth method of the present invention).Under this occasion, taper needn't be set again specially form operation, be favourable on this point.

According to the 11 method, the abradant surface that forms electrode is carried out dry ecthing, and on this etched, form electrode.Owing to remove affected layer by grinding, thereby can improve the resistance characteristic of electrode pair abradant surface.

According to the 12 method, adopt n type Al at semiconductor chip _xGa _1-xUnder the occasion of N (0≤x≤1), if, then can improve resistive greatly in that the abradant surface that forms electrode is carried out forming electrode after the dry ecthing.

According to the 12 method, if will be made as 0.1 μ m～15 μ m, then can make milling time and dry ecthing time sum almost reach minimum, thereby can make the ohmic effect of improving of electrode almost reach maximum by the degree of depth that dry ecthing is removed by abradant surface.

Description of drawings

Fig. 1 is the cutaway view of the flip chip type light-emitting diode 100 of embodiment 1.

Fig. 2 is the cutaway view of the formal dress type light-emitting diode 200 of embodiment 2.

Fig. 3 is the cutaway view of the formal dress type light-emitting diode 1000 of embodiment 3.

Fig. 4 is the cross sectional photograph of the affected layer that generated by attrition process.

Fig. 5 is an illustration to the curve chart of the relation of the degree of depth of having been carried out dry ecthing by abradant surface and resistance characteristic.

Fig. 6 is the mode circuit figure of the mode of the expression resistance characteristic of measuring Fig. 2.

Fig. 7 is the mode circuit figure of the mode of the expression resistance characteristic of measuring Fig. 2.

Fig. 8 is the cutaway view of light-emitting diode 500 in the embodiments of the invention.

Fig. 9 is each driving voltage V of light-emitting diode 500 and its variation (light-emitting diode 500 ') in the expression embodiments of the invention _FForm.

Figure 10 is the manufacturing procedure picture of expression other embodiments of the invention.

Symbol description is as follows:

100... light-emitting diode (embodiment 1)

102... semiconductor crystal substrate (not having the GaN of interpolation bulk crystal)

102a... undertaken accurately machined by dry ecthing by abradant surface

102b... undertaken accurately machined by dry ecthing by abradant surface

105... the active layer of luminescence-utraviolet (MQW structure)

A... semiconductor chip a1... affected layer

B... crystal grown layer (semiconductor layer) c...n electrode (negative electrode)

D... the depth y of dry ecthing ... determinator

500... light-emitting diode 504...n type coating

505... active layer 510... trap layer

520... barrier layer 506...p type coating

507...p type contact layer 509... optically transparent electrode (positive electrode)

Embodiment

The present invention also can act in the following embodiments well.

Such as, aforementioned etched depth is that 0.1 μ m～15 μ m are suitable, is preferably 0.2 μ m～8 μ m.In addition, according to the observation to 1 μ m and above affected layer thereof, etch depth is preferably 1 μ m～7 μ m.If this degree of depth is shallow excessively, then under most occasions, can not fully remove aforementioned physical damnification layer.And if this degree of depth is dark excessively, just then the required time of etching work procedure prolong, thereby be not preferred aspect productivity ratio and the production cost.That is,, can remove the physical damnification layer that residues on the Physical Processing face with necessary and sufficient degree by being as the criterion with this suitable scope.

More preferably, preferably according to actual physical shape processing mode, come to determine aptly or best this etched depth.Such as, under the occasion of implementing attrition process, according to the value of the paste that is adopted and various conditions such as the surface pressing of the machined surface when grinding and processing speeds, change necessity and sufficient etch depth, but the optimum value of the etch depth of these occasions can by virtue of experience obtain without special experimental mistake.To other mechanicalness shape processing such as cutting and inject process too.

In addition, the material of relevant aforementioned crystal growth substrate and the impurity that is added are in the existing record of preamble.

Especially, be used as the crystal growth substrate by selecting GaN, various physical characteristics such as lattice constant are roughly consistent or similar with n type contact layer such as making, and are favourable in this.In addition, because the band gap of AIN substrate is bigger, thereby the light that has sent is difficult to be absorbed once more, is favourable in this.In addition, by suitably selecting these superperformances, perhaps moderately additional or carry out best of breed after, can make composition formula Al _xGa _1-xAluminium ratio of components x among the N (0≤x≤1) becomes extremely suitable adjustment parameter.Especially, make emission wavelength under the occasion of short LED, preferably, in the scope that does not hinder other formation, enlarging the band gap (thereby, aluminium ratio of components x) of each crystal semiconductor layer as far as possible.

In addition, the structure of the active layer of light-emitting diode (luminescent layer) can be arbitrarily, can adopt MQW structure and SQW structure and/or not have single layer structure of quantum well structure etc.

Below, based on specific embodiment the present invention is described.

Wherein, embodiments of the present invention are not limited to each embodiment shown below.

Embodiment 1

Fig. 1 represents the cutaway view of the flip chip type light-emitting diode 100 of present embodiment 1.By do not have adding the dorsal part that thickness that the GaN bulk crystal constitutes is about the semiconductor crystal substrate 102 of 150 μ m, by accurately machined smooth by abradant surface 102a and being constituted through the accurately machined taper of dry ecthing by abradant surface 102b through dry ecthing.Adopt the c face of this GaN bulk crystal, be used as with semiconductor crystal substrate 102 by the crystal growth face of abradant surface 102a almost parallel.On this crystal growth face, come the thickness of stacked gallium nitride (GaN) formation to be about the n type contact layer 103 of 4.0 μ m by doped silicon (Si) by crystal growth.

It is 1 * 10 that the impurity (Si) of this n type contact layer 103 adds concentration ¹⁹/ cm ³Degree.On this n type contact layer 103, be formed with the n type coating 104 (low carrier concentration layer) that the thickness that is made of GaN is about 10nm.

In addition, in the above, be formed with the active layer 105 of the MQW structure of luminescence-utraviolet, in this active layer 105, alternately stacked totally 5 layers thickness be about 2nm by Al _0.005In _0.045Ga _0.95Trap layer 51 and the thickness that N forms be about 18nm by Al _0.12Ga _0.88The barrier layer 52 that N forms.In addition, on this active layer 105, be formed with p type Al by doped with Mg _0.15Ga _0.85N formation and thickness are about the p type coating 106 of 50nm.And then, on p type coating 106, be formed with that p type GaN by doped with Mg constitutes and thickness is about the p type contact layer 107 of 100nm.

In addition, on p type contact layer 107, be formed with the positive electrode 120 that has based on the sandwich construction of metal evaporation, in addition, on the n of high carrier concentration type contact layer 103, be formed with negative electrode 140.The positive electrode 120 of sandwich construction is a kind of following three-decker, that is: the positive electrode ground floor 121 that engages with p type contact layer 107, be formed at positive electrode ground floor 121 top the positive electrode second layer 122 so that be formed at the 3rd layer 123 of the positive electrode on the top of the positive electrode second layer 122.

On the other hand, positive electrode ground floor 121 is metal levels that are made of rhodium (Rh) that the thickness that engages with p type contact layer 107 is about 0.1 μ m.In addition, the positive electrode second layer 122 is metal levels by gold (Au) formation that thickness is about 1.2 μ m.In addition, positive electrode is that thickness is about 20 for the 3rd layer 123

The metal level that constitutes by titanium (Ti).

The negative electrode 140 of sandwich construction constitutes: respectively the part of exposing from the part of n type contact layer 103 above, stack gradually: thickness is about 175 Vanadium (V) layer 141, thickness be about 1000

Aluminium (Al) layer 142, thickness be about 500 Vanadium (V) layer 143, thickness be about 500

Nickel (Ni) layer 144, thickness be about 8000 Gold (Au) layer 145.

Between the positive electrode 120 and negative electrode 140 that so constitute, be formed with by SiO ₂The diaphragm 130 that film constitutes.Protective layer 130 is from for forming the n type contact layer 103 that negative electrode 140 exposes, until covering with the lower part: the side of the side of the active layer 105 that exposes by etching, p type coating 106, reach p type contact layer 107 the side and above the side of the 3rd layer 123 of side, positive electrode of a part, positive electrode ground floor 121 and the positive electrode second layer 122 and the part above it.By SiO ₂The thickness of the part that the diaphragm 130 covering positive electrodes that film constitutes are the 3rd layer 123 is 0.5 μ m.

Next, the manufacture method of this light-emitting diode 10 is described.

Aforementioned light-emitting diode 10 is by making based on the vapor phase growth of organic metal vapor growth method (hereinafter to be referred as " MOVPE ").The gas that is adopted is: ammonia (NH ₃), carrier gas (H ₂, N ₂), trimethyl gallium (Ga (CH ₃) ₃) (to call " TMG " in the following text), trimethyl aluminium (Al (CH ₃) ₃) (to call " TMA " in the following text), trimethyl indium (In (CH ₃) ₃) (to call " TMI " in the following text), silane (SiH ₄), cyclopentadienyl magnesium (Mg (C ₅H ₅) ₂) (to call " CP in the following text ₂Mg ").

At first, with cleaned by organic washing and heat treatment, be interarea and with the c face by there not being the semiconductor crystal substrate 102 that the GaN bulk crystal that adds constitutes, be installed on the pedestal of mounting in the reative cell of MOVPE device.The thickness of the semiconductor crystal substrate 102 during this installation is 400 μ m degree.Next, under normal pressure, make H ₂Gas flows in the reative cell, under 1150 ℃ temperature semiconductor crystal substrates 102 is cured simultaneously.

(growth of n type contact layer 103)

Next, make the temperature of semiconductor crystal substrate 102 remain on 1150 ℃, and H is provided ₂, NH ₃, TMG and diluted silane, thickness is about 4.0 μ m, electron concentration is 2 * 10 and form ¹⁸/ cm ³, Si concentration is 1 * 10 ¹⁹/ cm ³By n type contact layer 103 that GaN constituted.

(growth of n type coating 104)

Make the temperature of semiconductor crystal substrate 102 remain on 1150 ℃, and H be provided thereafter, ₂, NH ₃And TMG, and form the n type coating 104 (low carrier concentration layer) that the thickness that is made of GaN is about 10nm.

(growth of active layer 105)

Then, after forming aforementioned n type coating 104, form the active layer 105 that adds up to five layers of aforementioned MQW structure that is constituted.

That is, make the temperature of semiconductor crystal substrate 102 drop to 770 ℃ at first at first, meanwhile, with carrier gas from H ₂Change to N ₂, keeping this carrier gas and NH ₃Quantity delivered the time, supply with TMG, TMI and TMA, thus on n type coating 104, form thickness be about 2nm by Al _0.005In _0.045Ga _0.95The trap layer 51 that N constitutes.

Next, make the temperature of semiconductor crystal substrate 102 rise to 1000 ℃, and on aforementioned trap layer 51, provide H ₂, NH ₃, TMG and TMA, and form thickness be about 18nm by Al _0.12Ga _0.88The barrier layer 52 that N constitutes.

Next, repeat aforementioned operation, make trap layer 51 and barrier layer 52 alternately laminated, add up to five layers of aforementioned active layer 105 that (trap layer 51, barrier layer 52, trap layer 51, barrier layer 52, last trap layer 51) constituted and form.

(crystal growth of p type coating 106)

Next, make the temperature of semiconductor crystal substrate 102 rise to 890 ℃, and N is provided ₂, TMG, TMA and CP ₂Mg, thickness is about 20nm and the concentration of having mixed is 5 * 10 and form ¹⁹/ cm ³The p type Al of magnesium (Mg) _0.15Ga _0.85The p type coating 106 that N constituted.

(crystal growth of p type contact layer 107)

At last, make the temperature of semiconductor crystal substrate 102 rise to 1000 ℃, simultaneously carrier gas is changed to H once more ₂, and H is provided ₂, NH ₃, TMG and CP ₂Mg, thickness is about 85nm and the concentration of having mixed is 5 * 10 and form ¹⁹/ cm ³The p type contact layer 107 that constituted of the p type GaN of magnesium (Mg).

More than shown in operation, be the crystal growth operation of each semiconductor layer of constituting by III group-III nitride based compound semiconductor.

(formation of positive electrode 120)

Then, be coated with photoresists on wafer surface, the electrode of removing on the p type contact layer 107 by photoetching forms the photoresists of part, and forms fenestra.That is, only expose a part of zone that should become the p type in the formation of positive electrode 120 zone contact layer 107.Next, be evacuated to 10 ^-4The high vacuum that the Pa level is following, then on the p type contact layer 107 that is exposed, evaporation thickness rhodium (Rh) positive electrode ground floor 121, the thickness that is constituted that be about 0.1 μ m is about the positive electrode second layer 122, the thickness that the gold (Au) of 1.2 μ m constituted and is about 20 successively

The 3rd layer 123 of the positive electrode that constituted of titanium (Ti).Next, take out sample from evaporation coating device, utilization is peeled off method and is removed these each metal levels that are piled up on the photoresists.

Thereafter, same with prior art, according to the technology (each manufacturing process) of known flip chip type light-emitting diode, form the each several part of negative electrode 140 and diaphragm 130 successively.

(Alloying Treatment)

With vacuum pump drain sample atmosphere, supply with O thereafter, ₂Gas, and reach 3Pa pressure, under this state, make atmosphere temperature reach about 550 ℃, heat three minutes degree, and make p type contact layer 107 and p type coating 106p type low resistanceization, realize the alloying of the alloying of p type contact layer 107 and positive electrode 120 and n type contact layer 103 and negative electrode 140 simultaneously.Thus, make these electrodes and realize more firm joint with respect to each semiconductor layer that is formed with positive and negative two electrodes.

(attrition process)

Next, go up to form diaphragm in wafer surface (surface), thus protect each electrode and stacked semiconductor layer avoid the pressure and the impact of milled processed, and on the wafer paster of lapping device, attach wafer.Next, utilize grinder, the back side of semiconductor crystal substrates 102 is ground.The value of the paste that is adopted is 9 μ m, with thickness be reduced thickness to the 150 μ m of semiconductor crystal substrate 102 of 400 μ m till.Then, take off wafer and clean, and remove cured dose and diaphragm when attaching from the wafer paster of lapping device.At last, make this wafer drying.

Paste diameter in the aforementioned milled processed is preferably 0.5～15 μ m degree.If this diameter is excessive, just then the thickness of affected layer can surpass anticipation thickness, because of rather than preferably.If this diameter is too small, just then milling time can be long, so neither be preferred.Be preferably 1～9 μ m degree.

(formation of tapered portion)

At first, wafer is attached on the splicing tape.At this moment, make electrode forming surface towards splicing tape one side.Next, handle, form glazing bar shape V font groove by element unit at chip back surface by the grinding of having adopted cutting machine.Thus, can form taper shown in Figure 1 by abradant surface 102b.At last, wafer is taken off from splicing tape.

(etching work procedure)

Next, dry ecthing is carried out at the back side (by abradant surface) of the semiconductor crystal substrate 102 after grinding, till reaching about 2 μ m degree of depth.By this dry ecthing, can remove more than half at least part of the affected layer that when attrition process, is generated.In this dry ecthing, can adopt following any one device.

(a) RIE device

(b) ICP device

Specifically, such as implementing aforesaid dry ecthing according to following order.

(1) utilizes resist, form diaphragm on the surface (surface) of wafer at the etching gas of RIE.

(2) back side of wafer is made progress, be set on the RIE device.

(3) utilize the RIE device, come chip back surface is carried out dry ecthing.

(etched implementation condition)

(a) gases used: CCI ₂F ₂

(b) vacuum degree: 5.3Pa (0.04Torr)

Wherein, at this moment, extraction voltage (accelerating voltage) is set to 800V, carries out etching then, till the degree of depth that reaches 0.8 μ m degree, then, extraction voltage is dropped to till the 400V, proceed the dry ecthing of remaining 0.2 μ m then.

Such as like this, extraction voltage (accelerating voltage) is weakened on the limit progressively, and etching is finished on the limit, can remove or reduce the etch damage (and thin lower floor's physical damnification layer) because of etching forms at chip back surface thus.

(4) last, utilize stripper etc., remove the aforementioned diaphragm of RIE at etching gas.

In addition, as the enforcement benchmark of relevant these dry ecthings, such as the dry-etching method that can open among the flat 8-274081 to be put down in writing with reference to the spy etc.

(segmentation process)

Next, implement hemisect and line etc.,, the semiconductor of wafer-like is divided into single shaped like chips then by cutting off operation etc. in face side.These each operations can be implemented according to known operation.As the detailed enforcement benchmark of relevant this dividing method, such as can be with reference to dividing method of being put down in writing among the TOHKEMY 2001-284642 etc.

According to aforementioned manufacturing process, just can obtain the flip chip type light-emitting diode 100 of Fig. 1.

So in the light-emitting diode 100 that obtains, compare with the product of not implementing aforementioned dry ecthing, light output illustrates about 20% raising.In addition, by forming tapered portion, its light output can reach about two times of the product that do not form tapered portion.

Promptly, the light-emitting diode 100 of present embodiment 1, synergism effect by following processing etc., can obtain high luminous output, that is: the GaN bulk crystal is used as the crystal growth substrate, perhaps on the crystal growth substrate, form tapered portion, perhaps come the fine finishining of being undertaken by abradant surface and the face that is ground of crystal growth substrate is handled by dry ecthing.

(distortion or optimized all conditions)

And, for previous embodiment 1, also can utilize following each condition etc., make its malformation or carry out optimization.

Such as, the optimum value of the degree of depth of relevant dry ecthing, depend on the value of paste value, frictional force and pressure etc. used in the former grinding step and the ratio of components of substrate etc., but, rule of thumb judge in the scope that this value roughly is in 1～8 μ m degree by other investigation.In addition, under this occasion, attrition process time and dry ecthing time sum can be suppressed to minimumly, help productivity ratio.

In addition, in the aforementioned embodiment,, preferably adopt and do not have the Al that adds as semiconductor crystal substrate 102 _xGa _1-xN (0≤x≤1), but as this substrate material also can adopt other III group-III nitride based compound semiconductor and/or SiC semiconductor crystal etc.

In addition, in the aforementioned embodiment, as semiconductor crystal substrate 102, adopted by gallium nitride independently (: the semiconductor chip of the Gou Chenging GaN bulk crystal), but semiconductor crystal substrate 102 needn't be an individual layer.Such as for obtaining and the same formation of previous embodiment, preferably as suitable semiconductor crystal substrate 102 and residual, thickness is 150 μ m and above Al thereof _xGa _1-xThe semiconductor bulk crystal that N (0≤x≤1) is constituted.Because 150 μ m and other above position thereof are ground off in grinding step, thereby its formation can be arbitrarily.Therefore, on silicon chip, form membranaceous basalis, and make the substrate (that is epitaxial growth substrate) of GaN growth in the above such as also adopting.Under this occasion, can utilize gas etch and milled processed to wait and remove silicon chip and basalis, and only keep the n type Al of about 150 μ m degree _xGa _1-xThe position of N (0≤x≤1).

Wherein, the thickness of the semiconductor crystal substrate 102 that should keep needn't necessarily be defined in aforesaid 150 μ m, if here the thickness of the semiconductor crystal substrate 102 that should keep be in 50～300 these scopes of μ m.In addition, the thickness of the semiconductor crystal substrate 102 before grinding step is implemented is preferably 250～500 μ m degree.Be preferably 300～400 μ m degree.If this thickness is blocked up, just then the time of grinding step can be long, and if thin excessively, then when semiconductor wafer is carried, can damage semiconductor wafer, because of rather than preferred.

(at the modified example of embodiment 1)

In addition, in previous embodiment 1, (surface) side is provided with positive and negative two electrodes on the surface, but negative electrode also can be formed on the dorsal part of semiconductor crystal substrate 102, promptly by dry ecthing carried out accurately machined smooth by abradant surface 102a and by dry ecthing carried out accurately machined taper by on the abradant surface 102b.If semiconductor crystal substrate 102 is used as the good n type substrate of electrical conductivity, and formed negative electrode is used as the transparent thin-film electrode, then, also can make the flip chip type light-emitting diode by this structure.

Such as, in this flip chip type light-emitting diode, because at ultraviolet light during from the output of the surface of light transmission negative electrode, in the process that this output arrived, can suppress light absorption, thereby can come to take out light to the outside effectively via this light transmission negative electrode based on the physical damnification layer.

That is, also can on aforesaid etch processes face, form optically transparent electrode.Since this optically transparent electrode can be not via the physical damnification layer come with aforementioned n type substrate directly well evaporation engage (bonding form), thereby under this occasion, can guarantee simultaneously that based on etch processes of the present invention the good electrical of electrode is resistive.

Such as, in the manufacturing process of this flip chip type light-emitting diode of conduction type up and down, replace and form aforementioned negative electrode 140, and form the transparent thin-film electrode at the back side of semiconductor crystal substrate 102 by vapor deposition treatment, but also can between aforementioned " etching work procedure " and " segmentation process ", carry out the evaporation operation of this transparent thin-film electrode.In addition, such as the wire-bonded that also can utilize (Fig. 1 or shown in Figure 4) shown in the aforementioned patent document 1, implement the wiring of this light-emitting diode on negative electrode.

In addition, forming by inject process under aforementioned Physical Processing face or the occasion to its shaping, the present invention is very useful.In previous embodiment 1, by dry ecthing come fine finishining slightly smooth by abradant surface 102a with come fine finishining by dry ecthing taper by abradant surface 102b, contact by edge (arris), but also can make this limit (rib) become circle, and form desirable R (based on the fillet of chamfering) by inject process.Although because this inject process and on its Physical Processing face, form the physical damnification layer,, then can obtain the effect same with previous embodiment 1 if after this inject process, carry out aforesaid etch processes.In addition, if moderately implement this inject process, then can obtain shortening the effect of necessity and sufficient disposing time.

In following embodiment 2, this execution mode has been made illustration.

Embodiment 2

Under the occasion that forms slot segmentation etc. by laser radiation, curing is adhered in the fusing that the semi-conductive melt that melts because of laser radiation heat solidifies once more after solidfied material and this melt disperse again once more in process chamber the fusing solidfied material etc. that disperses again, can residue in the side wall surface and the back side of element, therefore from external quantum efficiency and take out the viewpoint of efficient, preferably by inject process etc., remove these and melt again solidfied material and the fusing solidfied material again that disperses.Therefore also can according to the difference of its treatment conditions, and form and aforementioned same physical damnification layer by this inject process.Therefore, such as in the occasion etc. of utilizing this inject process to form aforementioned Physical Processing face down, the present invention also is of great use.

Fig. 2 represents the cutaway view of the formal dress type light-emitting diode 200 of present embodiment 2.Shown in Figure 2 as this, this light-emitting diode 200, be to adopt known formal dress type to carry mode, by attrition process, laser processing and inject process, come physical property ground to form the back side 1a of the semiconductor crystal substrate 1 that forms by nothing interpolation GaN bulk crystal, then, carry out fine finishining by dry ecthing.This attrition process and previous embodiment 1 are same, are intended to realize the sheet of semiconductor crystal substrate 1.In addition, the purpose of laser processing is at the back side of semiconductor crystal substrate 1, to form wafer and cut apart with V font groove and appropriate R (fillet).In addition, the purpose of inject process is, removes aforementioned fusing solidfied material and the fusing solidfied material again that disperses again, and forms the R of appropriateness.Certainly, last dry ecthing purpose and previous embodiment 1 are same, be intended to remove by inject process come shaping the Physical Processing face on residual physical damnification layer.

The negative electrode of n type semiconductor layer 2a is located in symbol 6 expressions, and the positive electrode of p type semiconductor layer 2b is located in symbol 7 expressions.Positive electrode 7 preferably has light transmission.In lead frame 3, be provided with the slightly reflecting surface 3a of conic section rotary body shape, its surface roughly forms mirror-like.Semiconductor crystal substrate 1 comes mutually bonding with the inside bottom surface central authorities of reflecting surface 3a by light transmission bonding agent 4.For improving external quantum efficiency, this light transmission bonding agent 4 is preferably selected extremely material transparent for use.In addition, preferably according to the refractive index size of light transmission bonding agent 4 etc., come to set suitably or best the inclination angle of the inclined plane 1a of light-emitting diode 200.Perhaps, also can be predetermined the value at the inclination angle of inclined plane 1a, and consider various conditions such as refractive index, select the material of light transmission bonding agent 4, adjust material with this.

In aforementioned light-emitting diode 200, by effect of the present invention based on the inventive method, take out effect efficient and improved greatly from the back side of semiconductor crystal substrate 1 and the light of side wall surface with inclined plane 1a, thereby in the lift-launch mode of this formal dress type LED (semiconductor light-emitting elements), also can guarantee to be higher than the external quantum efficiency of prior art.

That is, the present invention also can bring into play great effect to formal dress type light-emitting diode.

Embodiment 3

In previous embodiment 1, on semiconductor crystal substrate 102, form tapered portion, also can be but be used for tapered portion that light takes out at the sidewall of each semiconductor layer (103～107) stacked by crystal growth, practising physiognomy with surface side of wafer forms over the ground.Stacked and have formed tapered portion on the face side of each semiconductor layer of element function by crystal growth, also help to improve the taking-up efficient and the external quantum efficiency of light.In addition, on surface side of wafer, form the occasion of the separatory V font of chip groove etc. etc., form same tapered portion in surface side of wafer.Form these tapered portion such as utilizing cutting machine to wait.Etching of the present invention (fine finishining processing) is also effective for the face side tapered portion of formation like this.

Below, in present embodiment 3, this execution mode of the present invention has been made particular instantiation.

Fig. 3 is the cutaway view of the formal dress type light-emitting diode 1000 of present embodiment 3.This light-emitting diode 1000 has sapphire substrate 1001, and it is ground to thickness and is about till the 100 μ m after diaphragm 1300 forms.

On this sapphire substrate 1001, form the thickness that constitutes by aluminium nitride (AlN) and be about the AlN single crystalline layer 1010 of 0.5 μ m, and form n type contact layer 1020 in the above, these n type contact layer 1020 doped silicons (Si), and be 5 * 10 by electron concentration ¹⁸/ cm ³Al _0.12Ga _0.88N forms, and thickness is about 1.5 μ m.

In addition, be formed with n type coating 1030 on this n type contact layer 1020, this n type coating 1030 is about thickness the Al of 1.5nm _0.15Ga _0.85The Al that layer 1031 that N constituted and thickness are about 1.5nm _0.04Ga _0.9638 circulations that N constituted layer 1032 is stacked, and be doped with silicon (Si) and electron concentration is 5 * 10 ¹⁹/ cm ³The total film thickness multiple layer that is about 100nm constitute.

In addition, on n type coating 1030, be formed with the luminescent layer 1040 of the single quantum well structure of main output ultraviolet light.The luminescent layer 1040 of this single quantum well structure (SQW) has been stacked following each layer and forming, that is: thickness is about the undoped Al of 25nm _0.13Ga _0.87Barrier layer 1041, the thickness that N constituted is about the undoped Al of 2nm _0.005In _0.045Ga _0.95Trap layer 1042, the thickness that N constituted is about 15nm and by undoped Al _0.13Ga _0.87The barrier layer 1043 that N constitutes.

Be formed with p type confining bed 1050 on luminescent layer 1040, this p type confining bed 1050 is doped with magnesium (Mg), is 5 * 10 by hole concentration ¹⁷/ cm ³Al _0.16Ga _0.84N constitutes and thickness is about 40nm.On this p type confining bed 1050, be formed with p type coating 1060, this p type coating 1060 is about thickness the Al of 1.5nm _0.12Ga _0.88The Al that layer 1061 that N constituted and thickness are about 1.5nm _0.03Ga _0.9730 circulations that N constituted layer 1062 is stacked, and be doped with magnesium (Mg) and hole concentration is 5 * 10 ¹⁷/ cm ³The total film thickness multiple layer that is about 90nm constitute.Be formed with the p type contact layer 1070 that thickness is about 30nm on p type coating 1060, this p type contact layer 1070 is doped with magnesium (Mg) and hole concentration is 1 * 10 ¹⁸/ cm ³AlGaN constitute.

In addition, on p type contact layer 1070, be formed with transparent thin-film positive electrode 1100, on n type contact layer 1020, be formed with negative electrode 1400 based on metal evaporation.Transparent thin-film positive electrode 1100 is by constituting with the lower part: be about the second layer 1120 that gold (Au) that the ground floor 1110 that the cobalt (Co) of 1.5nm constituted and the thickness that engages with this cobalt film be about 6nm is constituted with thickness that p type contact layer 1070 directly engages.

Thick film positive electrode 1200 constitutes in the following manner, that is: above transparent thin-film positive electrode 1100, stack gradually vanadium (V) ground floor 1210, the thickness that is constituted that thickness is about 18nm and be about the 3rd layer 1230 that the second layer 1220 that the gold (Au) of 15 μ m constituted, aluminium (Al) that thickness is about 10nm are constituted.

The negative electrode 1400 of sandwich construction constitutes in the following manner, that is: the part of exposing from n type contact layer 1020 parts, stacked thickness are about the second layer 1420 that aluminium (Al) that ground floor 1410 that the vanadium (V) of 18nm constituted and thickness be about 100nm is constituted.

In addition, at topmost, be formed with by SiO ₂The diaphragm 1300 that film constitutes.On the other hand, at the foot that deserves with the bottom surface (etching face β) of the sapphire substrate 1001 of etched processing,, form the reflective metal layer 1500 that aluminium (Al) that thickness is about 500nm is constituted by metal evaporation.And except metals such as Rh, Ti, W, this reflective metal layer 1500 also can be nitride such as TiN, HfN.

The taper etching face α that is positioned at chip left and right sides wall among the figure is a kind of following surface, that is: when utilizing cutting machine to form in the face side of wafer to cut apart, and then utilize dry ecthing to come the tapered portion (by abradant surface) on the sidewall of aforesaid semiconductor crystal layer etc. is carried out accurately machined with V font groove.For this etching face α, be removed owing to when V font groove forms, residue in the physical damnification layer of tapered portion (by abradant surface), thereby can suppress the absorption of ultraviolet light effectively.Therefore, come accurately machined etching face α to help light upward to take out by dry ecthing.

In addition, etching face β (bottom surface of sapphire substrate 1001) is and then is come the back side (by abradant surface) of the wafer that is exposed by milled processed is carried out accurately machined by dry ecthing.For this etching face β, be removed owing to after milled processed, residue in the physical damnification layer of chip back surface (by abradant surface), thereby can suppress the absorption of ultraviolet light effectively.Therefore, can improve the reflectivity of reflective metal layer 1500 effectively.Like this, by dry ecthing fine finishining etching face β also help light upward to take out.

In addition, in the stepped construction of aforesaid semiconductor crystal, reach best, can guarantee the band gap of each crystal semiconductor layer of expanding greatly by the aluminium ratio of components that makes each crystal semiconductor layer.According to this formation, light for the near ultraviolet ray zone that luminescent layer sent, also can suppress the absorption in the crystal semiconductor layer outside the luminescent layer effectively, thereby for aforementioned light-emitting diode 1000, also can set this band gap simultaneously, and greatly help to improve the external quantum efficiency of light-emitting diode.

Embodiment 4

Fig. 8 is the cutaway view of the major part of light-emitting diode 500 in the present embodiment.In the semiconductor chip a of this Fig. 8, be doped with silicon (Si) as n type impurity.It adds concentration is 4 * 10 ¹⁸/ cm ³Degree.Below, its function from light-emitting diode 500 is sometimes referred to as p type contact layer 503 with this semiconductor chip a.

Crystal grown layer b is made of the III group-III nitride based compound semiconductor with sandwich construction.Above the semiconductor chip a that constitutes by n type gallium nitride (GaN), help the crystal growth of this crystal grown layer b.For semiconductor chip a, to face opposite above it (with call the back side in the following text or by abradant surface etc.) carry out attrition process and dry ecthing, and then on this surface, be formed with negative electrode (n electrode c).

On aforesaid semiconductor substrate a (n type contact layer 503), being formed with the thickness that is made of undoped GaN is 105

N type coating 504 (low carrier concentration layer).In addition, in the above, be formed with the active layer 505 of MQW structure, the thickness that the alternately stacked total of this active layer 505 is five layers is about 35

By In _0.30Ga _0.70The trap layer 510 that N constitutes, be about 70 with thickness

The barrier layer 520 that constitutes by GaN.In addition, on this active layer 505, be formed with the p type Al of doped with Mg _0.15Ga _0.85The thickness that N constituted is about the p type coating 506 of 50nm.In addition, on p type coating 506, be formed with the p type contact layer 507 that thickness that the p type GaN of doped with Mg constituted is about 100nm.

In addition, on p type contact layer 507, be formed with light transmission positive electrode (p electrode 509) based on metal evaporation.This p electrode 509 is by being about 40 with thickness that p type contact layer 507 directly engages

Cobalt (Co) and the thickness that engages with this Co be about 60 Gold (Au) constitute.

On the other hand, (etched face) is about 200 by thickness to n electrode c successively from the back side

Vanadium (V) and the thickness aluminium (Al) or the Al alloy that are about 1.8 μ m constitute.Why so increasing the thickness of n electrode c, is in order to make light fully reflection upward.

Next, the manufacture method to this light-emitting diode 500 is explained.Growth method and used material are identical with previous embodiment.

At first, will clean by organic washing and heat treatment, be interarea and by the semiconductor crystal substrate a that monocrystal GaN constitutes with a face, be installed to mounting on the pedestal of the reative cell of MOVPE device.The thickness of semiconductor crystal substrate a during this installation is 400 μ m degree.Next, under normal pressure, make H ₂Gas flows in the reative cell, and its flow velocity is 2 liters/minute, and the time is about 30 minutes, under 1150 ℃ temperature semiconductor chip a is cured simultaneously.

(growth of n type coating 504)

Next, make the temperature of semiconductor chip a remain on 1150 ℃, and provide H with 20 liters/minute flow velocity ₂, provide NH with 10 liters/minute flow velocity ₃, with 1.7 * 10 ^-4Mole/minute flow velocity provides TMG, is 105 and form the thickness that is made of undoped GaN

N type coating 504 (low carrier concentration layer).

(growth of active layer 505)

Then, after having formed aforementioned n type coating 504, form the active layer 505 that adds up to five layers of aforementioned MQW structure (Fig. 8) that is constituted.

That is, at first initial, make the temperature of semiconductor chip a drop to 730 ℃, meanwhile, with carrier gas from H ₂Change to N ₂, keeping this carrier gas and NH ₃Quantity delivered the time, with 3.1 * 10 ^-6Mole/minute flow velocity provides TMG, with 0.7 * 10 ^-6Mole/minute flow velocity provides TMI, on n type coating 4, forms thickness and is about 35 thus

In _0.30Ga _0.70The trap layer 510 that N constituted.

Next, make the temperature of semiconductor chip a rise to 885 ℃, and on aforementioned trap layer 510, provide N with 20 liters/minute flow velocitys ₂, provide NH with 10 liters/minute flow velocity ₃, with 1.2 * 10 ^-5Mole/minute flow velocity provides TMG, is about 70 and form thickness

The barrier layer that GaN constituted 520.

Below, repeat aforementioned operation, and make trap layer 510 and barrier layer 520 alternately laminated, add up to the aforementioned active layer 505 that five layers (trap layer 510, barrier layer 520, trap layer 510, barrier layer 520, last trap layers 510) are constituted and form.

(crystal growth of p type coating 506)

, make the temperature of semiconductor chip a rise to 890 ℃, provide N with 10 liters/minute flow velocitys thereafter ₂, with 1.6 * 10 ^-5Mole/minute flow velocity provides TMG, with 6 * 10 ^-6Mole/minute flow velocity provides TMA, with 4 * 10 ^-7Mole/minute flow velocity provides CP ₂Mg is about 200 and form thickness

Doping concentration be 5 * 10 ¹⁹/ cm ³The p type Al of magnesium (Mg) _0.15Ga _0.85The p type coating 506 that N constituted.

(crystal growth of p type contact layer 507)

At last, make the temperature of semiconductor chip a rise to 1000 ℃, simultaneously carrier gas is changed to H once more ₂, and provide H with 20 liters/minute flow velocity ₂, provide NH with 10 liters/minute flow velocity ₃, with 1.2 * 10 ^-4Mole/minute flow velocity provides TMG, with 2 * 10 ^-5Mole/minute flow velocity provides CP ₂Mg, thickness is about 85nm and the concentration of having mixed is 5 * 10 and form ¹⁹/ cm ³The p type contact layer 507 that constituted of the p type GaN of magnesium (Mg).

More than shown in operation, be the crystal growth operation of each semiconductor layer of constituting by III group-III nitride based compound semiconductor.

(formation of n electrode 509)

After aforesaid crystal growth operation, on the surface of p type contact layer 507, be coated with photoresists, the electrode of removing on the p type contact layer 7 by photoetching forms the photoresists of part, and forms fenestra, that is, p type contact layer 7 is exposed.Be evacuated to 10 ^-4The high vacuum that the Pa level is following, on the p type contact layer 7 that is exposed, the evaporation thickness is about 40 then

Co, and the evaporation thickness is about 60 on this Co

Au.Next, take out sample, utilize and peel off method and remove Co and the Au that is piled up on the photoresists, form the light transmission p electrode 509 bonding thus with p type contact layer 7 from evaporation coating device.

(attrition process)

Next, utilize grinder to come the back side of grinding semiconductor substrate a.The paste value that is adopted is 9 μ m, with thickness be reduced thickness to the 150 μ m of semiconductor chip a of 400 μ m till, clean then and dry.The paste diameter is preferably 0.5～15 μ m degree.If this diameter is excessive, just then the thickness of affected layer can surpass anticipation thickness, because of rather than preferably.If this diameter is too small, just then milling time can be long, neither be preferred.Be preferably 1～9 μ m degree.

(etching work procedure)

Next, dry ecthing is carried out at the back side (by abradant surface) of the semiconductor chip a after grinding, till reaching about 2 μ m degree of depth.By this dry ecthing, can remove more than half at least part of the affected layer that when attrition process, is generated.In this dry ecthing, can adopt following any device.

(a) RIE device

(b) ICP device

As the detailed implementation criteria of relevant this dry ecthing, such as can be with reference to dry-etching method of putting down in writing among the flat 8-274081 of TOHKEMY etc.

(formation of n electrode c)

Next, on the whole back side of semiconductor chip a, be coated with photoresists,, form window in exposing on the regulation zone on the face of n type contact layer 503, and be evacuated to 10 by photoetching ^-4The high vacuum that the Pa level is following, then by respectively successively the evaporation thickness be about 200

Vanadium (V) and thickness be about the Al of 1.8 μ m, and carry out stacked.Remove photoresists then, form thus with semiconductor chip a (: bonding n electrode c n type contact layer 503).

(Alloying Treatment)

With vacuum pump drain sample atmosphere, supply with O thereafter, ₂Gas also reaches 3Pa pressure, under this state, make atmosphere temperature reach 550 ℃, heat three minutes degree, and make p type contact layer 507, p type coating 506 reach p type low resistanceization, carry out p type contact layer 507 and the Alloying Treatment of p electrode 9 and the Alloying Treatment of semiconductor chip a and n electrode c simultaneously.Thus, each electrode (n electrode c, p electrode 9) is engaged very securely with respect to each semiconductor layer that should engage.

Through hemisect operation and segmentation process etc., the semiconductor of wafer-like be divided into single shaped like chips thereafter.These each operations can be implemented according to known operation.As the detailed enforcement benchmark of relevant this dividing method, such as also can be with reference to dividing method of being put down in writing among the TOHKEMY 2001-284642 etc.

Fig. 9 represents each driving voltage V of light-emitting diode 500 and its variation (light-emitting diode 500 ') in the embodiment of the invention _FDiode 500 ' have the structure same with Fig. 8, the unique difference on the manufacture method is: in the manufacturing process of aforementioned light-emitting diode 500, omit being carried out the etching work procedure of dry ecthing by abradant surface and be manufactured into semiconductor chip a.That is, light-emitting diode 500 ' in, the depth D of aforementioned dry ecthing is 0 μ m.

Second " I " of this table is the drive current that circulates between positive and negative two electrodes of element, represents the required current value of good luminous output of each light-emitting diode.Can find out from this table, be the light-emitting diode 500 of the dry ecthing of 2 μ m for having implemented the degree of depth, driving voltage V _FBe 3.5V, and for the light-emitting diode 500 of not implementing dry ecthing ', driving voltage V _FBe 10V, its difference reaches 6.5V.

Can judge from aforesaid measurement result: the light-emitting diode 500 such as image pattern 8 is such, forms under the occasion of n electrode c at the back side of the semiconductor chip a with conductivity, the depth D of dry ecthing can be made as such as 2 μ m degree.This result with utilize Fig. 5, Fig. 6, aforementioned effect that Fig. 7 carries out and the explanation basically identical of effect.

The optimum value that is used for the depth D of the dry ecthing of acquisition optimal resistance characteristic between semiconductor chip and electrode, depend on the value of paste, frictional force and pressure etc. and the ratio of components of substrate etc., but, rule of thumb judge in the scope that this value roughly is in 1～8 μ m degree by other investigation.In addition, under this occasion, attrition process time and dry ecthing time sum can be suppressed to minimum, thereby help productivity ratio.

In addition, in the aforementioned embodiment,, preferably adopt n type Al as semiconductor chip a _xGa _1-xN (0≤x≤1), but also can adopt other III group-III nitride based compound semiconductor.The n type impurity that should add in addition, is not limited to Si especially yet.

In addition, in the aforementioned embodiment, as semiconductor chip a, adopted by gallium nitride independently (: the semiconductor chip that the constitutes whole GaN of n type), but semiconductor crystal substrate a needn't be an individual layer.Such as for obtaining and the same structure of Fig. 8, residual and thickness is 150 μ m and above n type Al thereof as long as have as suitable n type contact layer 3 _xGa _1-xN (0≤x≤1) gets final product.Because 150 μ m and other above position thereof are removed in grinding step, thereby its formation can be arbitrarily.Therefore, on silicon chip, form membranaceous basalis, and make the substrate of n type GaN growth in the above such as also adopting.Under this occasion, can remove silicon chip and basalis by grinding step, and only keep the n type Al of about 150 μ m degree _xGa _1-xThe position of N (0≤x≤1).

Yet the thickness of the n type contact layer that should keep needn't necessarily be limited to aforesaid 150 μ m, if here the thickness of the n type contact layer that should keep be in 50～300 these scopes of μ m.In addition, the thickness of the semiconductor chip a before grinding step is implemented is preferably 250～500 μ m degree.Be preferably 300～400 μ m degree.If this thickness is blocked up, just then the time of grinding step can be long, and if too short, then when semiconductor wafer is carried, can damage semiconductor wafer, because of rather than preferred.

In addition, in the aforementioned embodiment, before grinding step, implement the formation of p electrode 509, but also can form p electrode 509 with the process sequence (after the etching work procedure) roughly the same with the formation of n electrode c.

In addition, also can form n electrode c in heat treatment (alloy treatment of p electrode 509) afterwards.Under this occasion, because not to being heat-treated by the n electrode c of evaporation, thereby in the Alloying Treatment of in fact not implementing n electrode c.

In addition, in the aforementioned embodiment, make p electrode 509 have light transmission, but also can make n electrode c have light transmission.

In addition, in the aforementioned embodiment, making active layer is the MQW structure, but as the structure of active layer, also can adopt the SQW structure and/or not have single layer structure of quantum well structure etc.

Embodiment 5

Other embodiment below is described.In Figure 11 (a), on sapphire substrate 600, be formed with the light-emitting diode 610 that constitutes by multilayer III group-III nitride based compound semiconductor.On this light-emitting diode 610, be formed with p electrode 620, this p electrode 620 engages with paster 650.Next, shown in Figure 11 (b), as keeping utensil, grind sapphire substrate 600, and make it to eliminate with paster 650.At this moment, on light-emitting diode 610 undermost III group-III nitride based compound semiconductor layers, form affected layer 630.With the method same, this affected layer 630 is carried out etching with previous embodiment.Then, on etched III group-III nitride based compound semiconductor layer, form n electrode 640.Paster 650 becomes the holding member when grinding sapphire substrate 600.In addition, after forming product, can also can perhaps also can be used as the fixed part of light-emitting diode 610 products as the radiator of light-emitting diode 610 as making the metallic reflection sheet of light to n electrode 640 1 lateral reflections.In addition, also can after having ground sapphire substrate 600, peel off this paster 650.Lamination order on sapphire substrate 600 is the stacked n layer of elder generation, but also can first stacked p layer.Can after having ground sapphire substrate 600, heat-treat, carry out the activate of the p layer under this occasion thus.

The present invention also can be used for the manufacturing of this light-emitting diode.

The present invention can be widely used in the semiconductor element that directly forms this mode of electrode on semiconductor chip.As this semiconductor element, except semiconductor laser (LD), light-emitting diode semiconductor light-emitting elements such as (LED), such as also enumerating photo detector and pressure sensor etc.That is, application of the present invention does not limit the concrete function of these semiconductor elements and formation etc. especially, thereby applicable scope of the present invention is extremely wide.

Utilizability on the industry

The part that the present invention can be used for luminous at least frequency spectrum has less than the short light-emitting diode of the wavelength of the luminous zone of 470nm.Therefore, the present invention also is used for having in the visible region electro-optical device of this luminous zone certainly.

Need not go into the details, according to its action principle, the present invention is too applicable to semiconductor light-receiving device.

In addition, the present invention is not detailed crystal growth condition and the special restriction such as its formation and stacked formation to the semiconductor crystal of these semiconductor elements.

In addition, the present invention also is specially adapted to exist the short-wavelength light device of emission wavelength in the ultraviolet range.Purposes as these short-wavelength light devices has: adopt the light stimulus catalytic materials the photochemistry field, be used for the lighting field of activating fluorescent body and be the biological field etc. of representative with the light trap, use such as can be used as the invisible light modulation that constitutes fluorescent lamp.

In the present invention, illustration embodiment as the aforementioned, but content of the present invention is not only limited to previous embodiment, in the scope that does not break away from spirit of the present invention, comprises whole variation.

The present invention comprises that all the basis of advocating priority is that 2003 No. 202240 content is willing in JP special permission hope 2004 No. 112796, special permission.

Claims (8)

1. a method for manufacturing light-emitting is the surface-emitting type manufacturing method for LED that is laminated with semiconductor layer on the crystal growth face of crystal growth substrate, the method is characterized in that,

Aforementioned crystal growth substrate is by Al _xGa _1-xN or carborundum constitute, wherein, and 0≤x≤1,

For aforesaid semiconductor layer, general expression Al _1-x-yGa _yIn _xN sets up, and it is made of the different a plurality of semi-conductive stepped construction of ratio of components, wherein, and 0≤x≤1,0≤y≤1,0≤1-x-y≤1,

This method for manufacturing light-emitting comprises:

Grind, cut or inject process from the back side to aforementioned crystal growth substrate, thus, on aforementioned substrate, be formed with the exit facet that helps light output or the shape manufacturing procedure of reflecting surface, wherein, this exit facet or reflecting surface have planar portions and taper surface, this taper surface be positioned at this planar portions around, tilt with respect to aforementioned crystal growth face;

Utilize etching, aforementioned exit facet or the aforementioned reflecting surface that forms through the aforementioned shapes manufacturing procedure further carried out the machined surface finishing step that fine finishining is handled.

2. method for manufacturing light-emitting according to claim 1 is characterized in that having:

At the whole back side of aforementioned crystal growth substrate, form operation at the electrode of n conduction type layer.

3. method for manufacturing light-emitting according to claim 1 is characterized in that:

The operation that is formed at least a portion of the aforementioned taper surface that forms in the aforementioned shapes manufacturing procedure is made up of following operation: form the operation of the summary V font slot segmentation of cutting apart usefulness, the semiconductor wafer that this summary V font slot segmentation of cutting apart usefulness is used for having a plurality of aforementioned light-emitting diodes is cut apart by each of each aforementioned light-emitting diode.

4. according to claim 1 or the described method for manufacturing light-emitting of claim 3, it is characterized in that: the peak luminous wavelength of aforementioned light-emitting diode is less than 470nm.

5. a light-emitting diode is the surface-emitting type light-emitting diode with semiconductor layer stacked on the crystal growth face of crystal growth substrate, and this light-emitting diode is characterised in that:

Aforementioned crystal growth substrate is by Al _xGa _1-xN or carborundum constitute, wherein, and 0≤x≤1,

For aforesaid semiconductor layer, general expression Al _1-x-yGa _yIn _xN sets up, and it is made of the different a plurality of semi-conductive stepped construction of ratio of components, wherein, and 0≤x≤1,0≤y≤1,0≤1-x-y≤1,

Aforementioned crystal growth substrate has: through grinding, cutting or inject process is that the physical property shape is processed and the exit facet or the reflecting surface that help light output of formation, this exit facet or reflecting surface have planar portions and taper surface, this taper surface be positioned at this planar portions around, tilt with respect to aforementioned crystal growth face;

In aforementioned exit facet or the aforementioned reflecting surface, be removed because of following physical property friction that aforementioned shapes processing takes place or impact to remain in its lip-deep physical damnification layer.

6. light-emitting diode according to claim 5 is characterized in that: have metal level on aforementioned exit facet, this metal level has makes light take out the light transmission that side sees through to light.

7. according to claim 5 or the described light-emitting diode of claim 6, it is characterized in that: have metal level on aforementioned reflecting surface, this metal level has the reflectivity that makes light take out lateral reflection to light.

According to claim 5 to any described light-emitting diode of claim 7, it is characterized in that: the whole back side at aforementioned crystal growth substrate has the electrode at n conduction type layer.

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