CN100388226C - PCIX bus operating mode and arbitration decision test card - Google Patents
PCIX bus operating mode and arbitration decision test card Download PDFInfo
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- CN100388226C CN100388226C CNB2004100679663A CN200410067966A CN100388226C CN 100388226 C CN100388226 C CN 100388226C CN B2004100679663 A CNB2004100679663 A CN B2004100679663A CN 200410067966 A CN200410067966 A CN 200410067966A CN 100388226 C CN100388226 C CN 100388226C
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Abstract
The present invention discloses an operation mode for a PCIX bus and an arbitration decision testing card which is connected to the PCIX bus and collects the signals of the PCIX bus. The present invention comprises a clock separating device, a plurality of signal sampling devices and an arbitration deciding device, wherein the clock separating device is used for generating and displaying a plurality of clock signals; the signal sampling devices respectively receive one separated clock signal from the clock separating device as a latch signal, collect samples from the signals on the bus at the rising edge of the latch signal; the arbitration deciding device receives the signals on the bus collected by the signal sampling devices, carries out arbitration decision on the collected signals, and displays an arbitration deciding result. When carrying out the arbitration decision, the testing card of the present invention can decide transmitting ends without occupying excessive oscilloscope channels, and can conveniently decide operating modes.
Description
Technical field
The present invention relates to the detection technique of PCIX bus, more particularly, relate to a kind of operational mode and arbitration decision test card of PCIX bus.
Background technology
At present along with popularizing that the PCIX bus is used, detect about the ruuning situation of PCIX bus and to become more and more important.Therefore usually, the PCIX bus can connect a plurality of equipment, needs to determine currently just which equipment to take the PCIX bus by, and this kind judgement is referred to as arbitration decision.Simultaneously according to existing technology, it is very inconvenient carrying out arbitration decision under the PCIX pattern, must use extra oscillograph, judge by the signal on the oscillograph sampling PCIX bus, usually this kind judgement need take channel oscilloscope and remove to carry out arbitration decision, simultaneously need again to use extra device, too trouble seems.
Therefore, just need a kind ofly can not use other equipment, test card is judged in detection direct and that the PCIX bus is used, simplifies the process that detects and judge.
Summary of the invention
The operational mode and the arbitration decision test card that the purpose of this invention is to provide a kind of PCIX bus can carry out bus operational mode and arbitration decision by the signal on the Direct Sampling bus, thereby simplify and the convenient process of judging.
According to the present invention, a kind of operational mode and arbitration decision test card of PCIX bus is provided, be connected to the PCIX bus, can gather the bus signals on the described PCIX bus, comprising:
One clock tripping device will be separated into several clock signals and the demonstration that are separated from each other from the bus clock signal on the bus; This clock tripping device will be separated into n the clock signal that is separated from each other from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting (n-1) individual clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third ... (n-1) clock signal postpones a clock period successively on the basis of described first clock signal; The n clock signal is the described first clock signal negate;
Several signal sampling devices all are connected to described clock tripping device, and the clock signal that receives a separation in the described clock tripping device respectively is as latch signal, the signal on the rising edge of latch signal is sampled described bus;
One arbitration judgment means links to each other with described several signal sampling devices, receives the signal on the described bus that described several signal sampling devices gather, and arbitrates according to these acquired signal and judges and show the result who arbitrates judgement.
According to one embodiment of the invention, also comprise an operational mode judgment means, judge that according to the signal of gathering on described PCIX bus it still is the PCI pattern that the PCIX bus runs on the PCIX pattern.
Test card of the present invention comprises FRAME, IRDY, TRDY, DEVSEL, STOP, RST, PCICLK, GNT0, GNT1, GNT2, GNT3 at the signal of gathering on the PCIX bus.
According to one embodiment of the invention, described operational mode judgment means can judge that at the RST rising edge present mode is PCIX pattern or PCI pattern; When this moment, if the FRAME signal of bus and IRDY were all invalid and among TRDY, DEVSEL, the STOP any one or a plurality of be the PCIX pattern when effective; Otherwise be the PCI pattern.
In one embodiment, described clock tripping device will be separated into 5 clock signals that are separated from each other from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting 4 clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third, the 4th clock signal postpones a clock period successively on the basis of described first clock signal; The 5th clock signal is the described first clock signal negate.
Described several signal sampling devices in the test card of the present invention, all be connected to described clock tripping device, the clock signal that receives a separation in the described clock tripping device respectively is as latch signal, the signal on the rising edge of latch signal is sampled described bus; The signal of described sampling comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.In one embodiment, comprise 5 signal sampling devices, gather 5 groups of different clocks rising edges sampled signal constantly successively, this sampled signal comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.
Described arbitration judgment means in the test card of the present invention receives the signal of described several signal sampling devices on the rising edge of latch signal is sampled described bus, and the signal of described sampling comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.According to arbitrating judgement in the sets of signals of different Temporal Sampling by different signal sampling devices.
The operational mode of PCIX bus of the present invention and arbitration decision test card can be intuitively and easily the decision pattern be PCI pattern or PCIX and clock frequency, and can take channel oscilloscope more when judging and remove to judge transmitting terminal (that is arbitration) arbitrating.Test card of the present invention directly from bus up-sampling signal, has reduced signal attenuation possible in the transmission course in the PCIX operating process, therefore can ensure signal quality and arbitrate judgement more surely.
Description of drawings
In conjunction with the accompanying drawings to the further describing of embodiment, those skilled in the art will have clearer and more definite understanding to above-mentioned and other feature and advantage of the present invention by following, and identical mark is represented identical feature in the accompanying drawing, wherein:
Fig. 1 is the operational mode of PCIX bus of the present invention and the structured flowchart of arbitration decision test card;
Fig. 2 is the physical circuit figure according to the block diagram of Fig. 1;
Fig. 3 is the sequential chart of the clock signal of the separation adopted in one embodiment of the invention.
Embodiment
Further specify technical scheme of the present invention below in conjunction with drawings and Examples.
With reference to figure 1, Fig. 1 illustrates the operational mode and the arbitration decision test card 100 of PCIX bus of the present invention, this test card is connected to the PCIX bus, can gather the bus signals on the PCIX bus, these signals comprise FRAME, IRDY, TRDY, DEVSEL, STOP, RST, PCICLK, GNT0, GNT1, GNT2, GNT3.
The basic ideas of carrying out arbitration decision among the present invention are to organize signal on the bus at different time up-samplings more, and the signal synthesis with these groups gets up to judge then, judge to realize arbitration.Specifically comprise these devices:
One clock tripping device 104 will be separated into several clock signals and the demonstration that are separated from each other from the bus clock signal on the bus, in this embodiment, be to show by one second display, and second display also can be a light-emitting diode display.
Whether clock tripping device 104 at first judgment data is in the IDLE state, if two kinds of following situations think that then bus is in the state of IDLE,
1) idle N-2 clock period bus, promptly signal FRAME and IRDY are all invalid.
2) N-3 clock period, FRAME invalidating signal and the IRDY signal is effective.
After satisfying above-mentioned condition, when the GNT signal is drop-down N-2 clock period, authorize to begin image data N clock period.
The major function of clock tripping device 104 is n clock signals that are separated from each other being separated into from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting (n-1) individual clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third ... (n-1) clock signal postpones a clock period successively on the basis of first clock signal; The n clock signal is the first clock signal negate.In this embodiment, clock tripping device 104 will be separated into 5 clock signals that are separated from each other from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting 4 clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third, the 4th clock signal postpones a clock period successively on the basis of described first clock signal; The 5th clock signal is the described first clock signal negate.The sequential chart of this embodiment as shown in Figure 3.
The clock signal that produces this separation can adopt following program to realize:
MODULE?Latch_Produce
U2?device′P16V8R′；
CLK，IRDY，TRDY?PIN?1，2，3；
LA0，LA1，LA2，LA3，LA4，G?PIN?12，13，14，15，16，17；
EQUATIONS
LA0; (LA4 is the LA0 negate).
LA1:=LA0; (clock period of LA1 rise edge delay LA0)
LA2:=LA1; (clock period of LA2 rise edge delay LA1)
LA3:=LA2; (clock period of LA3 rise edge delay LA2)
IRDY﹠amp; TRDY Then G=0; (effective second display outputs of data "--", otherwise second display does not work)
Else?G＝1；
STATE_DIAGRAM LA0; (generating LA0)
State?0：goto?1；
State?1：if?LA3?then?0；
else?1；
END?Latch_Produce
Several signal sampling devices 106 all are connected to clock tripping device 104, and respectively the clock signal of a separation in the receive clock tripping device 104 is as latch signal, the signal on the rising edge of latch signal is sampled described bus.Several signal sampling devices 106 receive the clock signal of a separation in the described clock tripping device 104 respectively as latch signal, the signal on the rising edge sampling bus of latch signal; The signal of sampling comprises CLK, FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.In this embodiment, comprise 5 signal sampling device 106a, 106b, 106c, 106d, 106e, gather 5 groups of sampled signals successively, comprise CLK, FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.
Sampled signal can realize by following example procedure:
MODULE?Clock_N
Un?device′P16V8R′；
CLK、FRAME、IRDY、GNT0、GNT1、GNT2、GNT3PIN1，2，3，4，5，6，7；
DFRAME、DIRDY、DGNT0、DGNT1、DGNT2、DGNT3?PIN12，13，14，15，16，17；
EQUATIONS
DFRAME＝FRAME；
DIRDY＝IRDY；
DGNT0＝GNT0；
DGNT1＝GNT1；
DGNT2＝GNT2；
DGNT3＝GNT3；
END?Clock_N
One arbitration judgment means 108, link to each other with several signal sampling devices 106, receive the signal on the bus that several signal sampling devices 106 gather, arbitrate the result who judges and show the arbitration judgement according to these acquired signal, in this embodiment, use one the 3rd display to realize, the 3rd display also can be a light-emitting diode display.Arbitration judgment means 108 receives the signal of several signal sampling devices 106 on the rising edge of latch signal is sampled described bus, and the signal of described sampling comprises CLK, FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.According to arbitrating judgement in the sets of signals of different Temporal Sampling by different signal sampling devices.
The arbitration judgement can adopt following program to realize:
The signal that the LA0 rising edge samples is respectively: FRAME0, IRDY0, GNT00～03;
The signal that the LA1 rising edge samples is respectively: FRAME1, IRDY1, GNT10～13;
The signal that the LA2 rising edge samples is respectively: FRAME2, IRDY2, GNT20～23;
The signal that the LA3 rising edge samples is respectively: FRAME3, IRDY3, GNT30～33;
The signal that the LA4 rising edge samples is respectively: FRAME4, IRDY4, GNT40～43;
5 status signal: Latch0～4 are only judged as internal logic,
Latch3＝！FRAME3&[(FRAME1&IRDY1)#(FRAME0&！IRDY0)]
Latch2＝！FRAME2&[(FRAME0&IRDY0)#(FRAME4&！IRDY4)]
Latch1＝！FRAME1&[(FRAME4&IRDY4)#(FRAME3&！IRDY3)]
Latch0＝！FRAME0&[(FRAME3&IRDY3)#(FRAME2&！IRDY2)]
Latch4＝！FRAME4&[(FRAME2&IRDY2)#(FRAME1&！IRDY1)]
4 trigger pip: TR0～3,
TR0＝Latch0&！GNT30#Latch1&！GNT40#Latch2&！GNT00
#Latch3&！GNT10#Latch4&！GNT20
TR1＝Latch0&！GNT31#Latch1&！GNT41#Latch2&！GNT01
#Latch3&！GNT11#Latch4&！GNT21
TR2＝Latch0&！GNT32#Latch1&！GNT42#Latch2&！GNT02
#Latch3&！GNT12#Latch4&！GNT22
TR3＝Latch4&！GNT23#Latch1&！GNT43#Latch2&！GNT03
#Latch3&！GNT13#Latch4&！GNT23
Export the signal of the 3rd display: A～G to
Final arbitration judged result is promptly determined in the result who communicates with that test card as followsly, wherein tests card number 0,1,2,3 and represents the first, second, third and the 4th test card respectively:
According to embodiment shown in Figure 1, also comprise an operational mode judgment means 102 in this test card 100, judge that according to the signal of gathering on the PCIX bus it still is the PCI pattern that the PCIX bus runs on the PCIX pattern, and the result of demonstration judgement, in this embodiment, be to show above-mentioned result by one first display.Operational mode judgment means 102 can judge that at bus signals RST rising edge present mode is PCIX pattern or PCI pattern.If this moment, the FRAME signal and the IRDY of bus were all invalid, when promptly bus is in the IDLE state, among TRDY, DEVSEL, the STOP any one or a plurality of be the PCIX pattern when effective.Described first display of described operational mode judgment means shows present mode and frequency, and first display can be a light-emitting diode display.For operational mode judgment means 102, can in general-purpose chip, be written into following program and realize:
Signal FRAME, IRDY, TRDY, STOP, RST, DEVSEL, promptly rise along sampling the clock signal clk input of RST signal as operational mode judgment means 102 thereon all from bus, can realize that the example of above-mentioned functions program is as follows:
U1?device′P16V8R′；
CLK，FRAME，IRDY，TRDY，DEVSEL，STOP?PIN?1，2，3，4，5，6；
IDLE，A，B，C，D，E，F，G?PIN?12，13，14，15，16，17，18，19；
EQUATIONS
！IDLE＝FRAME&IRDY；
[A，D]＝[0，0]；
TRUTH_TABLE?IN?U1([DEVSEL，STOP，TRDY]:＞[B，C，E，F，G])
[1,1,1]:＞[1,1,0,0,1,1]; (showing " FF ", expression PCI mode of operation)
[1,1,0]:＞[1,0,0,0,0,0]; (showing " 66 ", expression PCIX-66MHz pattern)
[1,0,1]:＞[0,0,0,0,1,0]; (showing " 00 ", expression PCIX-100MHz pattern)
[1,0,0]:＞[0,0,1,1,0,0]; (showing " 33 ", expression PCIX-133MHz pattern)
[0,1,1]:＞[0,0,0,0,0,0]; (showing " 88 ", expression PCIX retained-mode)
[0,1,0]:＞[0,0,0,0,0,0]; (showing " 88 ", expression PCIX retained-mode)
[0,0,1]:＞[0,0,0,0,0,0]; (showing " 88 ", expression PCIX retained-mode)
[0,0,0]:＞[0,0,0,0,0.0]; (showing " 88 ", expression PCIX retained-mode)
END?PCIX_MODE
Above-mentioned test card has been realized the function that the mode of operation of test card of the present invention is judged,
Need to prove, the result that above-mentioned test card test obtains might not show, they also can be used as intermediate data and are directly handled by next module, having used display that these results are shown in this embodiment, is in order to make things convenient for user's use better.
The physical circuit figure that shown in Figure 2 is according to the block diagram of Fig. 1.
Adopted technical scheme of the present invention, the operational mode of the PCIX bus that provides and arbitration decision test card can take channel oscilloscope more and remove to judge transmitting terminal (that is arbitration) when arbitrating judgement, can also be intuitively and easily the decision pattern be PCI pattern or PCIX and clock frequency, and test card of the present invention in the PCIX operating process directly from bus up-sampling signal, reduced signal attenuation possible in the transmission course, therefore can ensure signal quality and arbitrate judgement more surely.
The foregoing description provides to being familiar with the person in the art and realizes or use of the present invention; those skilled in the art can be under the situation that does not break away from invention thought of the present invention; the foregoing description is made various modifications or variation; thereby protection scope of the present invention do not limit by the foregoing description, and should be the maximum magnitude that meets the inventive features that claims mention.
Claims (8)
1. the operational mode of a PCIX bus and arbitration decision test card are connected to the PCIX bus, can gather the bus signals on the described PCIX bus, it is characterized in that, comprising:
One clock tripping device will be separated into several clock signals that are separated from each other from the bus clock signal on the bus; Wherein, described clock tripping device will be separated into n the clock signal that is separated from each other from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting (n-1) individual clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third ... (n-1) clock signal postpones a clock period successively on the basis of described first clock signal; The n clock signal is the described first clock signal negate;
Several signal sampling devices all are connected to described clock tripping device, and the clock signal that receives a separation in the described clock tripping device respectively is as latch signal, the signal on the rising edge of latch signal is sampled described bus;
One arbitration judgment means links to each other with described several signal sampling devices, receives the signal on the described bus of described several signal sampling devices collections, arbitrates judgement according to these acquired signal.
2. the operational mode of PCIX bus as claimed in claim 1 and arbitration decision test card is characterized in that, also comprise an operational mode judgment means, judge that according to the signal of gathering on described PCIX bus it still is the PCI pattern that the PCIX bus runs on the PCIX pattern.
3. the operational mode of PCIX bus as claimed in claim 2 and arbitration decision test card, it is characterized in that the described signal of gathering comprises FRAME, IRDY, TRDY, DEVSEL, STOP, RST, PCICLK, GNT0, GNT1, GNT2, GNT3 on the PCIX bus.
4. the operational mode of PCIX bus as claimed in claim 3 and arbitration decision test card is characterized in that, described operational mode judgment means can judge that at the RST rising edge present mode is PCIX pattern or PCI pattern; When this moment, if the FRAME signal of bus and IRDY were all invalid and among TRDY, DEVSEL, the STOP any one or a plurality of be the PCIX pattern when effective; Otherwise be the PCI pattern.
5. the operational mode of PCIX bus as claimed in claim 3 and arbitration decision test card, it is characterized in that, described clock tripping device will be separated into 5 clock signals that are separated from each other from the bus clock signal on the bus, wherein first clock signal rose and descends after lasting 4 clock period in first clock period of bus clock signal, through rising again after the clock period, so repeat; Second, third, the 4th clock signal postpones a clock period successively on the basis of described first clock signal; The 5th clock signal is the described first clock signal negate.
6. the operational mode of PCIX bus as claimed in claim 3 and arbitration decision test card, it is characterized in that, described several signal sampling devices, all be connected to described clock tripping device, the clock signal that receives a separation in the described clock tripping device respectively is as latch signal, the signal on the rising edge of latch signal is sampled described bus; The signal of described sampling comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.
7. the operational mode of PCIX bus as claimed in claim 6 and arbitration decision test card, it is characterized in that, comprise 5 signal sampling devices, gather 5 groups of different clocks rising edges sampled signal constantly successively, this sampled signal comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.
8. the operational mode of PCIX bus as claimed in claim 6 and arbitration decision test card, it is characterized in that, described arbitration judgment means receives the signal of described several signal sampling devices on the rising edge of latch signal is sampled described bus, and the signal of described sampling comprises FRAME, IRDY, GNT0, GNT1, GNT2, GNT3.According to arbitrating judgement in the sets of signals of different Temporal Sampling by different signal sampling devices.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100679663A CN100388226C (en) | 2004-11-08 | 2004-11-08 | PCIX bus operating mode and arbitration decision test card |
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|---|---|---|---|
| CNB2004100679663A CN100388226C (en) | 2004-11-08 | 2004-11-08 | PCIX bus operating mode and arbitration decision test card |
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| CN1773466A CN1773466A (en) | 2006-05-17 |
| CN100388226C true CN100388226C (en) | 2008-05-14 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101739291B (en) * | 2009-12-02 | 2013-01-30 | 北京航空航天大学 | Hardware transactional nesting method for supporting rollback of conditional part |
| CN106598864B (en) * | 2016-12-19 | 2019-06-11 | 中国科学院长春光学精密机械与物理研究所 | A kind of multichannel bus timing monitoring system, method and microcomputer system |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1335938A (en) * | 1999-09-02 | 2002-02-13 | 皇家菲利浦电子有限公司 | Device and method of preventing bus contention |
| US20020120805A1 (en) * | 2001-02-23 | 2002-08-29 | Hensley Ryan J. | Method and apparatus for a dual mode PCI/PCI-X device |
| US6581129B1 (en) * | 1999-10-07 | 2003-06-17 | International Business Machines Corporation | Intelligent PCI/PCI-X host bridge |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1335938A (en) * | 1999-09-02 | 2002-02-13 | 皇家菲利浦电子有限公司 | Device and method of preventing bus contention |
| US6581129B1 (en) * | 1999-10-07 | 2003-06-17 | International Business Machines Corporation | Intelligent PCI/PCI-X host bridge |
| US20020120805A1 (en) * | 2001-02-23 | 2002-08-29 | Hensley Ryan J. | Method and apparatus for a dual mode PCI/PCI-X device |
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