CN100384088C - A D/A signal conversion method and D/A signal conversion apparatus - Google Patents
A D/A signal conversion method and D/A signal conversion apparatus Download PDFInfo
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- CN100384088C CN100384088C CNB2004101014633A CN200410101463A CN100384088C CN 100384088 C CN100384088 C CN 100384088C CN B2004101014633 A CNB2004101014633 A CN B2004101014633A CN 200410101463 A CN200410101463 A CN 200410101463A CN 100384088 C CN100384088 C CN 100384088C
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Abstract
The present invention discloses a digital-analog signal conversion method which is applied to digital signals jumping from a maximum value to a minimum value or from a minimum value to a maximum value. Before the digital signals are input into a digital-analog converter, the jumping positions of the digital signals are converted into progressive variation by the method of increasing multiple intermediate values at the jumping positions, and finally the processed digital signals are input into the digital-analog converter to be processed by digital-analog conversion, so corresponding analog signals are generated. The present invention simultaneously discloses a digital-analog signal conversion device which comprises the digital-analog converter and a digital signal processor for inputting digital signals; when the digital signals jump from a maximum value to a minimum value or from a minimum value to a maximum value, intermediate values are added at the jumping positions, so that the processed digital signals which [are] progressively changed at the jumping positions are output. Compared with the prior art, the present invention has the advantages of simplicity, easy implementation and low cost, and the present invention can effectively eliminate impulse voltage and can optimize converted analog signals particularly.
Description
Technical field
The present invention relates to the signal processing method when digital signal converts analog signal in a kind of circuit design, particularly a kind ofly be applied to have by maximum to the minimum value saltus step or by the method for minimum value to the digital and analogue signals conversion of the digital signal of maximum saltus step.
The present invention also relates to a kind of digital and analogue signals conversion equipment that adopts this method simultaneously.
Technical background
In integrated circuit (IC) design, digital signal will be converted into analog signal by digital to analog converter sometimes and just can be employed, and this mainly finishes by D/A converting circuit.When carrying out digital-to-analogue conversion, if adopt general D/A converting circuit, maximum appears to the minimum value saltus step then in digital signal, and perhaps minimum value is when the maximum saltus step, then the analog signal of conversion generation will produce bigger surge voltage in saltus step place, and this is very unfavorable for analog signal.
Summary of the invention
The objective of the invention is:, provide the method for the digital and analogue signals conversion of a kind of method surge voltage simple, that produced in the time of can eliminating the digital and analogue signals conversion at the deficiencies in the prior art.
The present invention also provides a kind of simple in structure, the digital and analogue signals conversion equipment that can eliminate surge voltage simultaneously.
In order to solve the problems of the technologies described above, the technical solution used in the present invention is: a kind of method of digital and analogue signals conversion, be applied to have by maximum to the minimum value saltus step or by the digital signal of minimum value to the maximum saltus step, before with described digital signal input digital to analog converter, by increase the method for a plurality of medians in saltus step place, the maximum of described digital signal converted to by maximum to the minimum value saltus step reduce step by step to minimum value, being converted to by minimum value to the maximum saltus step by minimum value of described digital signal raise step by step to maximum, to carry out digital-to-analogue conversion through the digital signal input digital to analog converter of this processing more at last, produce the corresponding simulating signal.
The numerical value of described median can calculate by formula, its formula is: the maximum-n* of the numerical value=digital signal of n median (minimum value of the maximum-digital signal of digital signal)/(m+1), wherein m is the sum of median, and n, m are integer, and n≤m.
Described median can be increased in the described digital signal under the selection of a plurality of selection signals.
When described digital signal described saltus step do not occur, if digital signal current be maximum, then first selects signal can keep high level state, other selects signal can keep low level state; If digital signal is current is minimum value, and then all select signal all to keep low level state.
When described digital signal occurs by maximum to the minimum value saltus step, in can the described selection signal of triggering for generating first selected the trailing edge of signal, and other in the described selection signal selects the rising edge of signal can be by the trailing edge triggering for generating of its previous selection signal.
When x the trailing edge of selecting signal arrives, digital signal can increase x median by maximum to minimum value saltus step place, wherein x is an integer, and the sum of x≤median.
When described digital signal occurred by minimum value to the maximum saltus step, last in can the described selection signal of triggering for generating selected the rising edge of signal, and other rising edge of selecting signal is by trailing edge triggering for generating of selecting signal thereafter.
When k the rising edge of selecting signal arrives, digital signal can increase (k-1) individual median by minimum value to maximum saltus step place, wherein k is an integer, and the sum of 1＜k≤selection signal.
A kind of digital and analogue signals conversion equipment that adopts the described method of claim 1, comprise digital to analog converter, also comprise digital signal processor, be used for supplied with digital signal, and have by maximum to the minimum value saltus step or by minimum value during when described digital signal to the maximum saltus step, increase median in described saltus step place, thereby the output hopping place is a digital signal after the processing of gradual change step by step, described digital to analog converter receives from digital signal after the processing of described digital signal processor, output corresponding simulating signal after digital-to-analogue conversion.
Described digital signal processor can be made of digital signal arithmetic element, selection signal generating unit and signal selector, described digital signal arithmetic element is used for maximum and the minimum value according to the digital signal of input, produce one group of digital signal that comprises a plurality of medians, and export the signal input part of described signal selector to; Described selection signal generating unit is used for producing a plurality of selection signals according to described digital signal, and is input to the control end of described signal selector; Described signal selector is used under the control of described selection signal, and selecting output is described processing back digital signal from described digital signal arithmetic element digital signal.
In technique scheme, digital and analogue signals conversion method provided by the present invention, because in the maximum of digital signal and saltus step place between the minimum value, some medians have been increased, thereby make its saltus step process become smoother, the digital signal of this level and smooth decline and rising can not produce surge voltage when handling through common digital to analog converter, thereby has optimized the analog signal after the conversion.Analog signal conversion device provided by the present invention, by digital signal processor the gradual change step by step that the digital signal that has saltus step increases median is handled, it is simple in structure, enforcement is easy, with low cost, but can obviously eliminate the surge voltage of the analog signal after the digital-to-analogue conversion.Therefore, method of the present invention and install relative prior art has characteristics such as simple, practical, with low cost, that conversion of signals is effective.
Description of drawings
Accompanying drawing 2 is the switching signal oscillogram of digiverter among Fig. 1;
Accompanying drawing 3 is the circuit block diagram of digital and analogue signals conversion equipment of the present invention;
Accompanying drawing 4 is the digital signal processor circuit functional-block diagram of a kind of preferred embodiment of digital and analogue signals conversion equipment of the present invention;
Accompanying drawing 5 is a switching signal oscillogram of the present invention.
Embodiment
For the present invention clearly is described, at first prior art is further analyzed with reference to Fig. 1, Fig. 2 in the Figure of description.
As shown in Figure 1, convert digital signal to analog signal in the prior art, realize by digital to analog converter.
As shown in Figure 2, when digital signal was high level, value corresponding was D_top, and when being low level, value corresponding is D_bottom, and being converted to voltage corresponding after the analog signal is A_top and A_bottom.When digital signal becomes low level from high level, promptly its value corresponding is when maximum D_top is reduced to minimum value D_bottom, and analog signal becomes A_bottom from voltage A_top, and vice versa.But in the structure shown in Figure 1, in this saltus step transfer process, because the reaction speed of digital to analog converter is slower than saltus step speed; add the impulse electricity of electric capacity; bring very strong surge voltage through regular meeting, thereby had a strong impact on the analog signal after the conversion, circuit is broken down or misoperation.
Purpose of the present invention is eliminated these surge voltages exactly, optimizes the conversion of signals effect.
Below in conjunction with Fig. 3, Fig. 4, Fig. 5 and specific embodiment in the Figure of description the present invention is described in further detail.
The invention provides the method for a kind of digital and analogue signals conversion, be applied to have by maximum to the minimum value saltus step or by the digital signal of minimum value, specifically to the maximum saltus step:
Before with described digital signal input digital to analog converter, by increase the method for a plurality of medians in saltus step place, the maximum of described digital signal converted to by maximum to the minimum value saltus step reduce step by step to minimum value, being converted to by minimum value to the maximum saltus step by minimum value of described digital signal raise step by step to maximum, to carry out digital-to-analogue conversion through the digital signal input digital to analog converter of this processing more at last, produce the corresponding simulating signal.
With reference to figure 3, the present invention provides a kind of digital and analogue signals conversion equipment simultaneously, comprises digital to analog converter and digital signal processor.
Described digital signal processor is used for supplied with digital signal, and have by maximum to the minimum value saltus step or by minimum value during when described digital signal to the maximum saltus step, increase median in described saltus step place, thereby the output hopping place is a digital signal after the processing of gradual change step by step, described digital to analog converter receives from digital signal after the processing of described digital signal processor, output corresponding simulating signal after digital-to-analogue conversion.Thereby reach the purpose of the surge voltage of the analog signal of eliminating saltus step place.
Figure 4 shows that a kind of preferable embodiment of described digital signal processor.Wherein constitute by digital signal arithmetic element, selection signal generating unit and signal selector.
Described digital signal arithmetic element is used for maximum and the minimum value according to the digital signal of input, produces one group of digital signal that comprises a plurality of medians, and exports the signal input part of described signal selector to.The digital signal of described digital signal arithmetic element output comprises maximum, minimum value and a plurality of medians between described maximum and minimum value of the digital signal of input.
The Numerical Calculation Method of described median is:
Maximum-the n* of the numerical value=digital signal of n median (minimum value of the maximum-digital signal of digital signal)/(m+1), wherein m is the sum of median, n, m are integer, and n≤m.
Described selection signal generating unit is used for producing a plurality of selection signals according to described digital signal, and is input to the control end of described signal selector.Described median is to be increased in the described digital signal under the selection of a plurality of selection signals.
Described signal selector is used under the control of described selection signal, and selecting output is described processing back digital signal from described digital signal arithmetic element digital signal.
In the present embodiment, described digital signal arithmetic element specifically by add, subtract, the multiplication and division digital circuit realizes.Described selection signal generating unit can realize that described signal selector can adopt normal signal to select circuit to realize by d type flip flop.Its structure is digital circuit technique common in this area, and those of ordinary skill need not can realize through creative work, so ominous stating.
Elaborate the method for digital and analogue signals conversion of the present invention below in conjunction with Fig. 5.
Among Fig. 5, DA represents digital signal A, i.e. the supplied with digital signal of digital and analogue signals conversion equipment, and DA_top is the maximum of digital signal A, DA_bottom is the minimum value of digital signal A.
Level[0]～Level[3] represent that respectively 4 are selected signal.
Digital signal B shown in DB presentation graphs 3 and Fig. 4, promptly through digital signal after the processing of digital signal processor output, 3 medians have wherein been increased, make the stepped reduction/rising step by step of saltus step place waveform, DB_top is for handling the maximum of back digital signal, and DB_bottom is for handling the minimum value of back digital signal.The numerical value of each median is: the numerical value=DA_top-n* of n median (DA_top-DA_bottom)/4, wherein n≤3.
A represents analog signal, and A_top, A_bottom are respectively DB_top, DB_bottom and are converted to voltage corresponding after the analog signal.
When described digital signal DA described saltus step do not occur, if DA current be maximum DA_top, then described selective signal generator makes selects signal Level[0] keep high level state, select signal Level[1]～Level[3] all keep low level state.At this moment, signal selector is selected the maximum output of described arithmetic element output, and promptly DB is DB_top, and then the output of digital to analog converter output analog signal A is voltage A_top.
If DA is current is minimum value DA_bottom, then all select signal all to keep low level state, and signal selector is selected the minimum value output of described arithmetic element output, and promptly DB is DB_bottom, and the output of digital to analog converter output analog signal A is voltage A_bottom.
When described digital signal DA occurs by maximum to the minimum value saltus step, triggering for generating is selected signal Level[0] trailing edge, then signal selector is selected first median of output, first median occurs thereby handle back digital signal DB, its numerical value is: (3*DA_top+DA_bottom)/4.Level[0 simultaneously] trailing edge trigger Level[1] rising edge appears.Through after the pulsewidth of certain hour, Level[1] trailing edge arrive.The pulsewidth time here can realize by the number or the width of the clock signal of adjustment circuit by applied environment according to the present invention.As Level[1] trailing edge trigger Level[2 when arriving] rising edge, the synchronous signal selector is selected second median of output, second median appears in DB, its numerical value is: (2*DA_top+2*DA_bottom)/4.So analogize, then can get waveform shown in Figure 5, wherein, described digital signal DA occurs by maximum when the minimum value saltus step, except that first selects the trailing edge triggering for generating of the rising edge of other selection signal of signal by its previous selection signal.And when x the trailing edge of selecting signal arrives, digital signal increase x median by maximum to minimum value saltus step place, wherein x is an integer, and the total m of x≤median.
When last selects signal Level[3] trailing edge when arriving, signal selector is selected the minimum value DA_bottom output of digital signal.
Otherwise, when described digital signal DA occurs by minimum value to the maximum saltus step, in the described selection signal of triggering for generating last selected signal Level[3] rising edge, Level[2] rising edge by Level[3] trailing edge trigger, so analogize, except that last selects signal Level[3] other rising edge of selecting signal is by the trailing edge triggering for generating of a selection signal thereafter.Thereby, when k the rising edge of selecting signal arrives, digital signal increase (k-1) individual median by minimum value to maximum saltus step place, wherein k is an integer, and the sum of 1＜k≤selection signal.When first selected the rising edge of signal to arrive, signal selector was selected the maximum DB_top of output digital signal.
By above-mentioned analysis explanation as seen, export the stepped variation step by step of waveform of analog signal A according to the modulus signal conversion equipment of the inventive method, thereby eliminated the phenomenon of surge voltage in the prior art, guaranteed the superperformance of analog signal.
Claims (10)
1. the method for digital and analogue signals conversion, be applied to have by maximum to the minimum value saltus step or by the digital signal of minimum value to the maximum saltus step, it is characterized in that: before described digital signal input digital to analog converter, by increase the method for a plurality of medians in saltus step place, the maximum of described digital signal converted to by maximum to the minimum value saltus step reduce step by step to minimum value, being converted to by minimum value to the maximum saltus step by minimum value of described digital signal raise step by step to maximum, to carry out digital-to-analogue conversion through the digital signal input digital to analog converter of this processing more at last, produce the corresponding simulating signal.
2. the method for digital and analogue signals conversion according to claim 1, it is characterized in that: the numerical value of described median calculates by formula, and its formula is: the maximum-n of the numerical value=digital signal of n median
*(minimum value of the maximum-digital signal of digital signal)/(m+1), wherein m is the sum of median, n, m are integer, and n≤m.
3. the method for digital and analogue signals conversion as claimed in claim 1 or 2, it is characterized in that: described median is to be increased in the described digital signal under the selection of a plurality of selection signals.
4. as the method for digital and analogue signals conversion as described in the claim 3, it is characterized in that: when described digital signal described saltus step do not occur, if digital signal is current is maximum, and then first selects signal to keep high level state, and other selects signal to keep low level state; If digital signal is current is minimum value, and then all select signal all to keep low level state.
5. as the method for digital and analogue signals conversion as described in the claim 4, it is characterized in that: when described digital signal occurs by maximum to the minimum value saltus step, in the described selection signal of triggering for generating first selected the trailing edge of signal, and other in the described selection signal selected the trailing edge triggering for generating of the rising edge of signal by its previous selection signal.
6. as the method for digital and analogue signals conversion as described in the claim 5, it is characterized in that: when selecting the trailing edge arrival of signal for x, digital signal increase x median by maximum to minimum value saltus step place, wherein x is an integer, and the sum of x≤median.
7. as the method for digital and analogue signals conversion as described in the claim 4, it is characterized in that: when described digital signal occurs by minimum value to the maximum saltus step, in the described selection signal of triggering for generating last selected the rising edge of signal, and other rising edge of selecting signal is by trailing edge triggering for generating of selecting signal thereafter.
8. as the method for digital and analogue signals conversion as described in the claim 7, it is characterized in that: when selecting the rising edge arrival of signal for k, digital signal increase (k-1) individual median by minimum value to maximum saltus step place, wherein k is an integer, and the sum of 1＜k≤selection signal.
9. digital and analogue signals conversion equipment that adopts the described method of claim 1, comprise digital to analog converter, it is characterized in that: also comprise digital signal processor, be used for supplied with digital signal, and have by maximum to the minimum value saltus step or by minimum value during when described digital signal to the maximum saltus step, increase median in described saltus step place, thereby the output hopping place is a digital signal after the processing of gradual change step by step, described digital to analog converter receives from digital signal after the processing of described digital signal processor, output corresponding simulating signal after digital-to-analogue conversion.
10. as digital and analogue signals conversion equipment as described in the claim 9, it is characterized in that: described digital signal processor is made of digital signal arithmetic element, selection signal generating unit and signal selector, described digital signal arithmetic element is used for maximum and the minimum value according to the digital signal of input, produce one group of digital signal that comprises a plurality of medians, and export the signal input part of described signal selector to; Described selection signal generating unit is used for producing a plurality of selection signals according to described digital signal, and is input to the control end of described signal selector; Described signal selector is used under the control of described selection signal, and selecting output is described processing back digital signal from the digital signal of described digital signal arithmetic element.
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1122973A (en) * | 1994-10-21 | 1996-05-22 | 美国电报电话公司 | Digital-to-analog converter with reduced number of resistors |
| CN1242116A (en) * | 1996-12-16 | 2000-01-19 | 艾利森电话股份有限公司 | Digital-to-analog conversion |
| US6778122B2 (en) * | 2002-12-23 | 2004-08-17 | Institute Of Microelectronics | Resistor string digital to analog converter with differential outputs and reduced switch count |
| CN2810032Y (en) * | 2004-12-21 | 2006-08-23 | 北京中星微电子有限公司 | A D/A signal conversion device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1122973A (en) * | 1994-10-21 | 1996-05-22 | 美国电报电话公司 | Digital-to-analog converter with reduced number of resistors |
| CN1242116A (en) * | 1996-12-16 | 2000-01-19 | 艾利森电话股份有限公司 | Digital-to-analog conversion |
| US6778122B2 (en) * | 2002-12-23 | 2004-08-17 | Institute Of Microelectronics | Resistor string digital to analog converter with differential outputs and reduced switch count |
| CN2810032Y (en) * | 2004-12-21 | 2006-08-23 | 北京中星微电子有限公司 | A D/A signal conversion device |
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