CN100381924C - Liquid crystal display device and manufacturing method thereof - Google Patents
Liquid crystal display device and manufacturing method thereof Download PDFInfo
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- CN100381924C CN100381924C CNB2005100067337A CN200510006733A CN100381924C CN 100381924 C CN100381924 C CN 100381924C CN B2005100067337 A CNB2005100067337 A CN B2005100067337A CN 200510006733 A CN200510006733 A CN 200510006733A CN 100381924 C CN100381924 C CN 100381924C
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Abstract
The present invention relates to a liquid crystal display device and a manufacturing method thereof. At least one storage capacitance structure is formed on a lower substrate, the storage capacitance structure is composed of a first metal layer, a second metal layer and a dielectric layer clamped between the first metal layer and the second metal layer, wherein the first metal layer and the second metal layer are separating layers, and the second metal layer which is electrically connected with a pixel electrode is positioned above the first metal layer and overlaps the first metal layer partially. Afterwards, an insulation spacing layer is formed on the surface of the inner side of an upper substrate and is extended to the inner part of a liquid crystal layer for keeping the thickness of the liquid crystal layer; subsequently, common electrodes are correspondingly formed on the lower substrate and the isolation spacing layer, and a separated transparent conductor layer is electrically connected with the first metal layer. In this way, a known storage capacitance electrode wire which extends horizontally does not need to be formed, and a storage capacitor in pixels can be obtained.
Description
Technical field
The present invention relates to a kind of Liquid crystal disply device and its preparation method, particularly a kind of do not have lines type storage capacitor electrode line (storage capacitanceelectrode lines, Liquid crystal disply device and its preparation method Cs-line).
Background technology
Liquid crystal indicator (LCD) comprises that one is gone up substrate and a following substrate, and is clipped in one deck liquid crystal layer between the substrate up and down.In general, last substrate has a colored filter (color filter) and a common electrode (commonelectrode).And down substrate to have the gate line of horizontal expansion, the source electrode line of longitudinal extension (or claiming data line), be positioned at gate line be the thin film transistor (TFT) (TFT) of on-off element with near being taken as of source electrode line infall, and by the pixel capacitors in gate line and the determined zone of source electrode line.Each thin film transistor (TFT) has a grid, a source electrode and a drain electrode.Grid is to extend out from gate line, and source electrode is to extend out from source electrode line.Drain electrode normally is connected to pixel capacitors by the electric property of a contact hole (contact hole).Wherein pixel capacitors, common electrode and be clipped in liquid crystal layer therebetween and constitute a liquid crystal capacitance (C
LC).
Yet, in each pixel, further form memory capacitance (Cs) usually in order to improve display quality.See also Figure 1A and Figure 1B, in order to the array substrate of known LCD to be described.Figure 1A is the partial plan that shows known LCD array substrate, and Figure 1B is the sectional view along the 1B-1B line segment of Figure 1A, in order to the technology of known LCD array substrate to be described.
At first, the gate line 110 that forms horizontal expansion on the substrate of glass 100 and storage capacitor electrode line 120 (below be referred to as the Cs line), wherein this gate line 110 comprises the teat that is taken as grid 115.Form gate insulator 130 and cover whole substrate 100.On this gate insulator 130 of part, form one semiconductor layer 140.The source electrode line 150 that forms longitudinal extension on this gate insulator 130 of part separates the metal level 155 of (discrete) with one deck, this source electrode line 150 comprises a source electrode 152 that extends on the part semiconductor layer 140, is also forming a drain electrode 154 on the part semiconductor layer and is extending on the part of grid pole insulation course 130 simultaneously.
Then, form a layer insulating 160 and cover whole substrate 100.One first opening 172 and one second opening 174 of this insulation course 160 passed through in formation, and this first opening 172 exposes from this drain electrode 154, and this second opening 174 exposes from this metal level 155.Then, on this insulation course 160 of part, form a pixel capacitors 180, and insert in the described opening 172,174 and electric property is connected to this drain electrode 154 and this metal level 155.Through this, this metal level 155, this Cs line 120 and the gate insulator 130 that is clipped in have therebetween constituted a memory capacitance (Cs) 199.
Yet above-mentioned known LCD has many shortcomings.For example, when broken string 190 takes place for Cs line 120, can cause horizontal stripe bright line or concealed wire and influence display quality, thereby panel need be scrapped.Also have, because the Cs line 120 of horizontal expansion is opaque, so can reduce the aperture ratio of pixel.Also have, Cs line 120 relatively may have the situation generation of crosstalk (cross talk) with the infall of source electrode line 150, thereby influences display quality.
Summary of the invention
Therefore, the purpose of this invention is to provide a kind of Liquid crystal disply device and its preparation method that does not need the Cs line of horizontal expansion with memory capacitance.
In order to achieve the above object, the invention provides a kind of liquid crystal indicator, have a plurality of pixel regions, each pixel region comprises: first and second relative substrate accompanies one deck liquid crystal layer therebetween; At least one storage capacitor construction is positioned in this first substrate, wherein this storage capacitor construction is made of one deck first conductor layer, one deck second conductor layer and the one dielectric layer that is clipped in therebetween, described first and second conductor layer is a separating layer, and this second conductor layer is positioned at this first conductor layer top and overlaps with this first conductor layer; One layer insulating covers this first substrate and this storage capacitor construction; One first opening passes through this insulation course and exposes from this first conductor layer with this dielectric layer; One second opening passes through this insulation course and exposes from this second conductor layer; On this insulation course of part, form one deck first transparent conductor layer, and insert this first opening and electric property is connected to this first conductor layer; On this insulation course of part, form one deck second transparent conductor layer, and insert this second opening and electric property and be connected to this second conductor layer and on the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And form on this second substrate and this dielectric spacer layer correspondingly that to be taken as be one deck the 3rd transparent conductor layer of common electrode, and electric property is connected to this first transparent conductor layer or this second transparent conductor layer.
In order to achieve the above object, the invention provides another kind of liquid crystal indicator, have a plurality of pixel regions, each pixel region comprises a storage capacitor construction, and this pixel region comprises: first and second relative substrate accompanies one deck liquid crystal layer therebetween; In this first substrate, form the conductor layer that one deck separates; One layer insulating covers this first substrate and this conductor layer; On this insulation course of part, form one deck first transparent conductor layer, and overlapping with the first of this conductor layer; On this insulation course of part, form one deck second transparent conductor layer, and overlapping with the second portion of this conductor layer; A connector passes through this insulation course, and wherein this conductor layer is connected to this first transparent conductor layer or second transparent conductor layer by the electric property of this connector; On the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And forming on this second substrate and this dielectric spacer layer correspondingly that to be taken as be one deck the 3rd transparent conductor layer of common electrode, electric property is connected to this second transparent conductor layer; Wherein, when this connector was connected to this second transparent conductor layer, this storage capacitor construction was made of this first conductor layer, this insulation course and this first transparent conductor layer; Wherein, when this connector was connected to this first transparent conductor layer, this storage capacitor construction was made of this first conductor layer, this insulation course and this second transparent conductor layer.
In order to achieve the above object, the invention provides a kind of manufacture method of liquid crystal indicator, its step comprises at least: form gate line and one deck the first metal layer that separates of horizontal expansion in one first substrate, this gate line has a grid; Form one dielectric layer and cover this gate line, this first metal layer and this first substrate; On this dielectric layer that is positioned at above this grid, form one semiconductor layer; On this dielectric layer, form a source electrode line of longitudinal extension, this source electrode line comprises a source electrode that extends on this semiconductor layer of part, and on this semiconductor layer of part, form a drain electrode simultaneously and on this dielectric layer, form one deck second metal level that separates, wherein this first metal layer, one deck second metal level and this dielectric layer of being clipped in therebetween constitute a storage capacitor construction, and this second metal level and this first metal layer are overlapped; Comprehensive formation one layer insulating covers this first substrate; Forming one first opening passes through this insulation course and this dielectric layer and exposes from this first metal layer; Forming one second opening passes through this insulation course and exposes from this second metal level; On this insulation course of part, form one deck first transparent conductor layer, and insert this first opening and electric property to connecting this first metal layer; On this insulation course of part, form one deck second transparent conductor layer, and insert this second opening and electric property is connected to this second metal level; One second substrate is provided, relative with this first substrate; Forming one deck liquid crystal layer is clipped between this first substrate and this second substrate; On the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And form on this second substrate and this dielectric spacer layer correspondingly that to be taken as be one deck the 3rd transparent conductor layer of common electrode, and electric property is connected to this first transparent conductor layer or this second transparent conductor layer.
In order to achieve the above object, the invention provides the manufacture method of another kind of liquid crystal indicator, its step comprises at least: form gate line and the layer of metal layer that separates of horizontal expansion in one first substrate, this gate line has a grid; Form a layer insulating and cover this gate line, this metal level and this first substrate; On this insulation course that is positioned at above this grid, form one semiconductor layer; Form a source electrode line of longitudinal extension on this dielectric layer, this source electrode line comprises a source electrode that extends on this semiconductor layer of part, and forms a drain electrode simultaneously on this semiconductor layer of part; A pixel capacitors of formation and electric property are connected to this drain electrode above this insulation course of part, wherein the first of this pixel capacitors and this metal level is overlapping, and the layer of transparent conductor layer that formation separates on this insulation course of part simultaneously and overlapping with the second portion of this metal level; Form a connector and pass through this insulation course and be connected to this metal level, wherein this metal level is connected to this pixel capacitors or this transparent conductor layer by the electric property of this connector; One second substrate is provided, relative with this first substrate; Forming one deck liquid crystal layer is clipped between this first substrate and this second substrate; On the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And correspondingly form a common electrode on this second substrate and this dielectric spacer layer, and electric property is connected to this transparent conductor layer.
According to the present invention, the Cs line that does not need to make horizontal expansion as is known just can form memory capacitance in pixel, therefore can improve the good rate of product, increases the aperture ratio of pixel and solves known problem.
Description of drawings
For purpose of the present invention, feature and advantage can be become apparent, preferred embodiment cited below particularly, and conjunction with figs., carry out following detailed explanation:
Figure 1A is the partial plan that shows known liquid crystal indicator;
Figure 1B is the sectional view of the 1B-1B line segment in Figure 1A;
Fig. 2 is the partial plan that shows according to the liquid crystal indicator of first embodiment of the invention;
Fig. 3 is the sectional view of the 3-3 line segment in Fig. 2;
Fig. 4 is the sectional view of demonstration according to the liquid crystal indicator of the variation example one of first embodiment;
Fig. 5 is the partial plan of demonstration according to the liquid crystal indicator of the variation example two of first embodiment;
Fig. 6 A is the equivalent circuit diagram that shows according to Fig. 3;
Fig. 6 B is the equivalent circuit diagram that shows according to Fig. 4;
Fig. 7 is the partial plan that shows according to the liquid crystal indicator of second embodiment of the invention;
Fig. 8 is the sectional view of the 8-8 line segment in Fig. 7;
Fig. 9 is the sectional view of demonstration according to the liquid crystal indicator of the variation example of second embodiment;
Figure 10 A is the equivalent circuit diagram that shows according to Fig. 8; And
Figure 10 B is the equivalent circuit diagram that shows according to Fig. 9.
[symbol description]
Prior art part (Figure 1A and Figure 1B)
Substrate under the 100-; The 110-gate line; The 115-grid; The 120-Cs line; The 130-gate insulator; The 140-semiconductor layer; The 150-source electrode line; The 152-source electrode; The 154-drain electrode; The 155-metal level; The 160-insulation course; 172,174-opening; The 180-pixel capacitors; The 190-Cs broken string.
The present invention's part (Fig. 2-10)
200, substrate under the 700-; 210,710-gate line; 215,715-grid; 220,255,720-metal level; 230,730-dielectric layer; 240,740-semiconductor layer; 250,750-source electrode line; 252,752-source electrode; 254,754-drain electrode; 260,760-passivation layer; 268,768-insulation course; 272,274,276,474,772,776,972-opening; 280,780-first transparent conductor layer; 282,782-second transparent conductor layer; 290,340,790,840-calibration membrane; 300, the last substrate of 800-; 310,810-colored filter; 315,815-light shield layer; 330,830-the 3rd transparent conductor layer; 320,820-dielectric spacer layer; 350,850-liquid crystal layer; 299,799,999-storage capacitor construction.
Embodiment
First embodiment
Fig. 2 is the partial plan that shows according to the liquid crystal indicator of first embodiment of the invention, and Fig. 3 is the sectional view of the 3-3 line segment in Fig. 2, in order to the technology of first embodiment to be described.What will specify here is, though following diagram has only shown a pixel region, liquid crystal indicator in fact of the present invention can comprise a lot of pixel regions.
See also Fig. 2 and 3, at first providing for example is glass or a quartzy dielectric base 200 (below be referred to as down substrate).Form gate line 210 and one deck the first metal layer 220 that separates (discrete) shape of horizontal expansion in following substrate 200, this gate line has a grid 215.Wherein, this gate line 210 is formed by same deposition step with the first metal layer 220, and its material for example is conductor materials such as Al, Cr, Mo or its alloy.
Afterwards, form one dielectric layer 230 and cover this gate line 210, this first metal layer 220 and this time substrate 200, wherein this dielectric layer 230 for example is via the formed Si of CVD (chemical vapour deposition technique)
3N
4Or SiO
2Layer.Form on this dielectric layer 230 that is positioned at above this grid 215 that to be taken as be the one semiconductor layer 240 of channel layer (channellayer), wherein this semiconductor layer 240 for example is by the formed silicon layer of CVD.
Then, on this dielectric layer 230, form a source electrode line 250 of longitudinal extension, this source electrode line 250 comprises a source electrode 252 that extends on this semiconductor layer 240 of part, and on this semiconductor layer 240 of part and this dielectric layer 230, form a drain electrode 254 simultaneously, and one deck second metal level 255 that on this dielectric layer 230, forms separation, this the first metal layer 220 wherein, one deck second metal level 255 and this dielectric layer 230 that is clipped in therebetween constitute a storage capacitor construction 299, this second metal level 255 is overlapped with this first metal layer 220, and promptly the area of this second metal level 255 is less than this first metal layer 220.Wherein, this source electrode line 250, this source electrode 252, this drain electrode 254 and this second metal level 255 are formed by same deposition step, and its material for example is conductor materials such as Al, Cr, Mo or its alloy.
Then, comprehensive formation one deck passivation layer 260 covers whole substrate 200 down, and this passivation layer 260 for example is via the formed corresponding Si of CVD
3N
4Layer.Then, in order to obtain smooth surface, can form the organic flatness layer 265 of one deck again on this passivation layer 260, this organic flatness layer 265 for example is via the formed organic resin layer of rubbing method.What will specify here is to form this organic flatness layer 265.For convenience of description, at this this passivation layer 260 and this organic flatness layer 265 merging are called insulation course 268.
Then, form first opening 272, second opening 274 and the 3rd opening 276 via photography mint-mark etching program, wherein this first opening 272 passes through this insulation course 268 and exposes from this first metal layer 220 with this dielectric layer 230, this second opening 274 passes through this insulation course 268 and exposes from this second metal level 255, exposes from this drain electrode 254 and the 3rd opening 276 passes through this insulation course 268.
Afterwards, on this insulation course 268 of part, form one deck first transparent conductor layer 280, and insert this first opening 272 and electric property is connected to this first metal layer 220.Form on this insulation course 268 of part that to be taken as be one deck second transparent conductor layer 282 of pixel capacitors, and insert this second opening 274 and be connected to this second metal level 255 and this drain electrode 254 with the 3rd opening 276 and electric property.Described transparent conductor layer 280,282 can be by formed ITO of same deposition step or IZO layer.Here be noted that described transparent conductor layer the 280, the 282nd, mutual insulating is isolated.Then, on this second transparent conductor layer 282, form one deck alignment layer 290.
Still see also Fig. 3, provide for example to be a upward substrate 300 of glass, relative with this time substrate 200.On this, on the inner surface of substrate 300, can form a colored filter 310, in this colored filter 310, may further include one deck light shield layer 315.Then, on this colored filter 310, form one deck dielectric spacer layer (spacer) 320, this dielectric spacer layer 320 extends in the following liquid crystal layer 350 and (promptly keeps liquid crystal born of the same parents thickness in order to the thickness that keeps liquid crystal layer 350, cellgap), wherein the material of this dielectric spacer layer 320 for example is a light sensitive material.In addition, the position of this light shield layer 315 of part is corresponding to this dielectric spacer layer 320.
Then, form on substrate 300 and this dielectric spacer layer 320 on this correspondingly that to be taken as be one deck the 3rd transparent conductor layer 330 of common electrode, and electric property is connected to this first transparent conductor layer 280, and wherein the 3rd transparent conductor layer 330 for example is ITO or IZO layer.
Then, on the 3rd transparent conductor layer 330, form one deck alignment layer 340.Here be noted that and on this dielectric spacer layer 320, do not form this calibration membrane 340.At last, liquid crystal material is injected up and down between the substrate 300 and 200, thus formation one deck liquid crystal layer 350.
According to above-mentioned technology, the present invention also provides a kind of liquid crystal indicator structure.See also Fig. 3, liquid crystal indicator of the present invention has a plurality of pixel regions, and each pixel region comprises at least: the first relative substrate 200 and second substrate 300 accompany one deck liquid crystal layer 350 therebetween; At least one storage capacitor construction 299 is positioned in this first substrate 200, wherein this storage capacitor construction 299 is made of one deck first conductor layer 220, one deck second conductor layer 255 and the one dielectric layer 230 that is clipped in therebetween, described first and second conductor layer the 220, the 255th, separating layer, this second conductor layer 255 be positioned at these first conductor layer, 220 tops and with the part this first conductor layer 220 overlapping (promptly the area of this second conductor layer 255 is less than this first conductor layer 220); One layer insulating 268 covers this first substrate 200 and this storage capacitor construction 299; One first opening 272 passes through this insulation course 268 and exposes from this first conductor layer 220 with this dielectric layer 230; One second opening 274 passes through this insulation course 268 and exposes from this second conductor layer 255; One deck first transparent conductor layer 280 that on this insulation course 268 of part, forms, and insert this first opening 272 and electric property is connected to this first conductor layer 220; One deck second transparent conductor layer 282 that on this insulation course 268 of part, forms, and insert this second opening 274 and electric property is connected to this second conductor layer 255; One deck dielectric spacer layer 320 that on the inner surface of this second substrate 300, forms, and extend in this liquid crystal layer 350 in order to keep the thickness of this liquid crystal layer 350; And being taken as of correspondingly forming above this second substrate 300 and this dielectric spacer layer 320 be one deck the 3rd transparent conductor layer 330 of common electrode, and electric property is connected to this first transparent conductor layer 280.
See also Fig. 6 A, it shows the equivalent electrical circuit according to each pixel region of first embodiment of the invention (corresponding diagram 3).Symbol GL represents gate line, and symbol SL represents source electrode line, and symbol TFT represents thin film transistor (TFT).
The variation example one of first embodiment
Fig. 4 is the sectional view of demonstration according to the liquid crystal indicator of the variation example one of first embodiment.What will specify here is, among Fig. 4 with Fig. 3 in similar elements will represent with identical diagrammatical symbol, and omit its material explanation.The difference of Fig. 4 and Fig. 3 is: the electric property of pixel capacitors is connected to the first metal layer 220, and the electric property of common electrode is connected to second metal level 255.
See also Fig. 4, forming a grid 215 and one deck the first metal layer 220 in the substrate 200 down.Form one dielectric layer 230 and cover this grid 215, this first metal layer 220 and this time substrate 220.Form on this dielectric layer 230 that is positioned at above this grid 215 that to be taken as be the one semiconductor layer 240 of channel layer.
Then, form a source electrode 252 that extends on this semiconductor layer 240 of part, and on this semiconductor layer 240 of part and this dielectric layer 230, form a drain electrode 254 simultaneously, and on this dielectric layer 230, form one deck second metal level 255, wherein this first metal layer 220, one deck second metal level 255 and this dielectric layer 230 of being clipped in therebetween constitute a storage capacitor construction 299, this second metal level 255 is overlapped with this first metal layer 220, and promptly the area of this second metal level 255 is less than this first metal layer 220.
Then, comprehensive formation one deck passivation layer 260 covers whole substrate 200 down.Also have,, can on this passivation layer 260, form the organic flatness layer 265 of one deck again, yet this organic flatness layer 265 can not need in order to obtain smooth surface.For convenience of description, at this this passivation layer 260 and this organic flatness layer 265 merging are called insulation course 268.
Then, form first opening 472, second opening 474 and the 3rd opening 276, wherein this first opening 472 passes through this insulation course 268 and exposes from this second metal level 255, this second opening 474 passes through this insulation course 268 and this dielectric layer 230 exposes from this first metal layer 220, and the 3rd opening 276 passes through this insulation course 268 and exposes from this drain electrode 254.
Afterwards, on this insulation course 268 of part, form one deck first transparent conductor layer 280, and insert this and first open 472 and this second metal level 255 of electric property connection.Form on this insulation course 268 of part that to be taken as be one deck second transparent conductor layer 282 of pixel capacitors, and insert this second open 474 and the 3rd opening 276 and electric property be connected to this first metal layer 220 and this drain electrode 254.Here be noted that described transparent conductor layer the 280, the 282nd, mutual insulating is isolated.Then, on this second transparent conductor layer 282, form one deck alignment layer 290.
Still see also Fig. 4, provide for example to be a upward substrate 300 of glass, relative with this time substrate 200.On this, on the inner surface of substrate 300, can form a colored filter 310, in this colored filter 310, may further include one deck light shield layer 315.Then, form one deck dielectric spacer layer 320 on this colored filter 310, this dielectric spacer layer 320 extends in the following liquid crystal layer 350 in order to keep the thickness (promptly keeping liquid crystal born of the same parents thickness) of liquid crystal layer 350.In addition, the position of this light shield layer 315 of part is corresponding to this dielectric spacer layer 320.
Then, form on substrate 300 and this dielectric spacer layer 320 on this correspondingly that to be taken as be one deck the 3rd transparent conductor layer 330 of common electrode, and electric property is connected to this first transparent conductor layer 280.
Then, on the 3rd transparent conductor layer 330, form one deck alignment layer 340.Here be noted that and on this dielectric spacer layer 320, do not form this calibration membrane 340.At last, liquid crystal material is injected up and down between the substrate 300 and 200, thus formation one deck liquid crystal layer 350.
According to above-mentioned technology, the present invention also provides another kind of liquid crystal indicator structure.See also Fig. 4, liquid crystal indicator of the present invention has a plurality of pixel regions, and each pixel region comprises at least: the first relative substrate 200 and second substrate 300 accompany one deck liquid crystal layer 350 therebetween; At least one storage capacitor construction 299 is positioned in this first substrate 200, wherein this storage capacitor construction 299 is made of one deck first conductor layer 220, one deck second conductor layer 255 and the one dielectric layer 230 that is clipped in therebetween, described first and second conductor layer the 220, the 255th, separating layer, this second conductor layer 255 be positioned at these first conductor layer, 220 tops and with the part this first conductor layer 220 overlapping (promptly the area of this second conductor layer 255 is less than this first conductor layer 220); One layer insulating 268 covers this first substrate 200 and this storage capacitor construction 299; One first opening 472 passes through this insulation course 268 and exposes from this second conductor layer 255; One second opening 474 passes through this insulation course 268 and exposes from this first conductor layer 220 with this dielectric layer 230; One deck first transparent conductor layer 280 that on this insulation course 268 of part, forms, and insert this first opening 472 and electric property is connected to this second conductor layer 255; One deck second transparent conductor layer 282 that on this insulation course 268 of part, forms, and insert this second opening 474 and electric property is connected to this first conductor layer 220; One deck dielectric spacer layer 320 that on the inner surface of this second substrate 300, forms, and extend in this liquid crystal layer 350 in order to keep the thickness of this liquid crystal layer 350; And correspondingly to be formed on being taken as that this second substrate 300 and this dielectric spacer layer 320 tops form be one deck the 3rd transparent conductor layer 330 of common electrode, and electric property is connected to this first transparent conductor layer 280.
See also Fig. 6 B, it shows the equivalent electrical circuit according to each pixel region of above-mentioned variation example (corresponding diagram 4).Symbol GL represents gate line, and symbol SL represents source electrode line, and symbol TFT represents thin film transistor (TFT).
The variation example two of first embodiment
Fig. 5 is the partial plan of demonstration according to the liquid crystal indicator of the variation example two of first embodiment.What will specify here is, among Fig. 5 with Fig. 1 in similar elements will represent with identical diagrammatical symbol, and omit its material and technology explanation.The difference of Fig. 5 and Fig. 1 is: the first metal layer 220 and second metal level 255 can design around the part of pixel region, it not only can form a plurality of memory capacitance in each pixel region, and described metal level 220 and 255 can be used as the light shield layer that prevents light leak, thereby dwindle light shield layer 315 areas in the colored filter 310 of substrate 300, therefore further improve the aperture ratio.
That is to say that application person can be according to the needs in the design, with described metal level 220 of the present invention and the 255 any positions of design in pixel region.
Second embodiment
Fig. 7 is the partial plan that shows according to the liquid crystal indicator of second embodiment of the invention, and Fig. 8 is the sectional view of the 8-8 line segment in Fig. 7, in order to the technology of second embodiment to be described.What will specify here is, though following diagram only shows a pixel region, liquid crystal indicator in fact of the present invention can comprise a lot of pixel regions.
See also Fig. 7 and 8, at first providing for example is glass or a quartzy dielectric base 700 (below be referred to as down substrate).Form gate line 710 and the layer of metal layer 720 that separates shape of horizontal expansion in following substrate 700, this gate line has a grid 715.Wherein, this gate line 710 and this metal level 720 are formed by same deposition step, and its material for example is conductor materials such as Al, Cr, Mo or its alloy.
Afterwards, form one dielectric layer 730 and cover this gate line 710, this metal level 720 and this time substrate 700, wherein this dielectric layer 730 for example is via the formed Si of CVD
3N
4Or SiO
2Layer.Form on this dielectric layer 730 that is positioned at above this grid 715 that to be taken as be the one semiconductor layer 740 of channel layer, wherein this semiconductor layer 740 for example is the formed silicon layer of CVD.
Then, on this dielectric layer 730, form a source electrode line 750 of longitudinal extension, this source electrode line 750 comprises a source electrode 752 that extends on this semiconductor layer 740 of part, and forms a drain electrode 754 simultaneously on this semiconductor layer 740 of part and this dielectric layer 730.Wherein, this source electrode line 750, this source electrode 752 are formed by same deposition step with this drain electrode 754, and its material for example is conductor materials such as Al, Cr, Mo or its alloy.
Then, comprehensive formation one deck passivation layer 760 covers whole substrate 700 down, and this passivation layer 760 for example is via the formed corresponding Si of CVD
3N
4Layer.
Then, form first opening 772 and second opening 776 via photography mint-mark etching program, wherein this first opening 772 passes through this passivation layer 760 and this dielectric layer 730 exposes from this metal level 720, and this second opening 776 passes through this passivation layer 760 and exposes from this drain electrode 754.
Afterwards, form one deck first transparent conductor layer 780 on this passivation layer 760 of part, and insert this first opening 772 and form connector and electric property is connected to this metal level 720, this first transparent conductor layer 780 is also overlapping with the first of this metal level 720.Form on this passivation layer 760 of part that to be taken as be one deck second transparent conductor layer 782 of pixel capacitors, and insert this second opening 776 and electric property is connected to this drain electrode 754, this second transparent conductor layer 782 and overlapping with the second portion of this metal level 720.Described transparent conductor layer 780,782 can be by formed ITO of same deposition step or IZO layer.Here be noted that described transparent conductor layer the 780, the 782nd, mutual insulating is isolated.Then, on this second transparent conductor layer 782, form one deck alignment layer 790.
Still see also Fig. 3, provide for example to be a upward substrate 800 of glass, relative with this time substrate 700.On this, on the inner surface of substrate 800, can form a colored filter 810, in this colored filter 810, may further include one deck light shield layer 815.Then, on this colored filter 810, form one deck dielectric spacer layer 820, it is interior in order to keep the thickness (promptly keeping liquid crystal born of the same parents thickness) of liquid crystal layer 850 that this dielectric spacer layer 820 extends to following liquid crystal layer 850, and wherein the material of this dielectric spacer layer 820 for example is a light sensitive material.In addition, the position of this light shield layer 815 of part is corresponding to this dielectric spacer layer 820.
Then, form on substrate 800 and this dielectric spacer layer 820 on this correspondingly that to be taken as be one deck the 3rd transparent conductor layer 830 of common electrode, and electric property is connected to this first transparent conductor layer 780, and wherein the 3rd transparent conductor layer 830 for example is ITO or IZO layer.Therefore, this second transparent conductor layer 782, this metal level 720 and the dielectric layer 730 and the passivation layer 760 that are clipped in therebetween constitute a storage capacitor construction 799.
Then, on the 3rd transparent conductor layer 830, form one deck alignment layer 840.Here be noted that and on this dielectric spacer layer 820, do not form this alignment layer 840.At last, liquid crystal material is injected up and down between the substrate 800 and 700, thus formation one deck liquid crystal layer 850.
According to above-mentioned technology, the present invention also provides a kind of liquid crystal indicator structure.See also Fig. 8, liquid crystal indicator of the present invention has a plurality of pixel regions, and each pixel region comprises a storage capacitor construction 799, and this pixel region comprises at least: the first relative substrate 700 and second substrate 800 accompany one deck liquid crystal layer 850 therebetween; One deck conductor layer 720 of the separation that in this first substrate 700, forms; One layer insulating 768 (being being collectively referred to as of dielectric layer 730 and passivation layer 760) covers this first substrate 700 and this conductor layer 720; One opening 772 passes through this insulation course 768 and exposes from this conductor layer 720; One deck first transparent conductor layer 780 that on this insulation course 768 of part, forms, and insert this opening 772 and electric property is connected to this conductor layer 720; One second transparent conductor layer 782 that on this insulation course 768 of part, forms, and overlap with this conductor layer 720; One deck dielectric spacer layer 820 that on the inner surface of this second substrate 800, forms, and extend in this liquid crystal layer 850 in order to keep the thickness of this liquid crystal layer 850; And being taken as of correspondingly forming above this second substrate 800 and this dielectric spacer layer 820 be one deck the 3rd transparent conductor layer 830 of common electrode, and electric property is connected to this first transparent conductor layer 780; Wherein, this storage capacitor construction 799 is made of with this second transparent conductor layer 782 this conductor layer 720, this insulation course 768.
See also Figure 10 A, it shows the equivalent electrical circuit according to each pixel region of second embodiment of the invention (corresponding diagram 8).Symbol GL represents gate line, and symbol SL represents source electrode line, and symbol TFT represents thin film transistor (TFT).
The variation example of second embodiment
Fig. 9 is the sectional view of demonstration according to the liquid crystal indicator of the variation example of second embodiment.What will specify here is, among Fig. 9 with Fig. 8 in similar elements will represent with identical legend symbol, and omit its material explanation.The difference of Fig. 9 and Fig. 8 is: the electric property of pixel capacitors is connected to metal level 720, and the not electric property of common electrode is connected to metal level 720.
See also Fig. 9, forming a grid 715 and the layer of metal layer 720 that separates in the substrate 700 down.Afterwards, form one dielectric layer 730 and cover this gate line 710, this metal level 720 and this time substrate 700.Form on this dielectric layer 730 that is positioned at above this grid 715 that to be taken as be the one semiconductor layer 740 of channel layer.
Then, on this semiconductor layer 740, form a source electrode 752, and on this semiconductor layer 740 of part and this dielectric layer 730, form a drain electrode 754 simultaneously.Then, comprehensive formation one deck passivation layer 760 covers whole substrate 700 down.
Then, form first opening 972 and second opening 776 via photography mint-mark etching program, wherein this first opening 972 passes through this passivation layer 760 and exposes from this metal level 720 with this dielectric layer 730, and this second opening 776 passes through this passivation layer 760 and exposes from this drain electrode 754.
Afterwards, form first transparent conductor layer 780 that one deck separates on this passivation layer 760 of part, this first transparent conductor layer 780 is also overlapping with the first of this metal level 720.Form on this passivation layer 760 of part that to be taken as be one deck second transparent conductor layer 782 of pixel capacitors, and insert this first opening 972 and this second opening 776 and form connector and electric property is connected to this metal level 720 and this drain electrode 754, this second transparent conductor layer 782 is also overlapping with the second portion of this metal level 720.Here be noted that described transparent conductor layer the 780, the 782nd, mutual insulating is isolated.Then, on this second transparent conductor layer 782, form one deck alignment layer 790.
Still see also Fig. 9, provide one to go up substrate 800, relative with this time substrate 700.On this, on the inner surface of substrate 800, can form a colored filter 810, in this colored filter 810, may further include a light shield layer 815.Then, form one deck dielectric spacer layer 820 on this colored filter 810, this dielectric spacer layer 820 extends in the following liquid crystal layer 850 in order to keep the thickness (promptly keeping liquid crystal born of the same parents thickness) of liquid crystal layer 850.In addition, the position of this light shield layer 815 of part is corresponding to this dielectric spacer layer 820.
Then, form on substrate 800 and this dielectric spacer layer 820 on this correspondingly that to be taken as be one deck the 3rd transparent conductor layer 830 of common electrode, and electric property is connected to this first transparent conductor layer 780.Therefore, this first transparent conductor layer 780, this metal level 720 and the dielectric layer 730 and the passivation layer 760 that are clipped in therebetween constitute a storage capacitor construction 999.
Then, on the 3rd transparent conductor layer 830, form one deck alignment layer 840.Here be noted that and on this dielectric spacer layer 820, do not form this alignment layer 840.At last, liquid crystal material is injected up and down between the substrate 800 and 700, thus formation one deck liquid crystal layer 850.
According to above-mentioned technology, the present invention also provides a kind of liquid crystal indicator structure.See also Fig. 8, liquid crystal indicator of the present invention has a plurality of pixel regions, and each pixel region comprises a storage capacitor construction 999, and this pixel region comprises at least: first substrate 700 respect to one another and second substrate 800 accompany one deck liquid crystal layer 850 therebetween; One deck conductor layer 720 of the separation that in this first substrate 700, forms; One layer insulating 768 (being being collectively referred to as of dielectric layer 730 and passivation layer 760) covers this first substrate 700 and this conductor layer 720; An opening 972 passes through this insulation course 768 and exposes from this conductor layer 720; One deck first transparent conductor layer 780 that on this insulation course 768 of part, forms, and overlapping with this conductor layer 720 of part; One deck second transparent conductor layer 782 that on this insulation course 768 of part, forms, and insert this opening 972 and electric property is connected to this conductor layer 720; One deck dielectric spacer layer 820 that on the inner surface of this second substrate 800, forms, and extend in this liquid crystal layer 850 in order to keep the thickness of this liquid crystal layer 850; And being taken as of correspondingly forming above this second substrate 800 and this dielectric spacer layer 820 be one deck the 3rd transparent conductor layer 830 of common electrode, and electric property is connected to this first transparent conductor layer 780; Wherein, this storage capacitor construction 999 is made of this conductor layer 720, this insulation course 768 and this first transparent conductor layer 780.
See also Figure 10 B, it shows the equivalent electrical circuit according to each pixel region of the variation example (corresponding diagram 9) of second embodiment of the invention.Symbol GL represents gate line, and symbol SL represents source electrode line, and symbol TFT represents thin film transistor (TFT).
[feature of the present invention and advantage]
The invention is characterized in: forming at least one storage capacitor construction in the substrate down, this capacitance structure is made of one deck the first metal layer, one deck second metal level and the one dielectric layer that is clipped in therebetween, first and second metal level is a separating layer, the electric property of second metal level is connected to pixel capacitors, and is positioned at the first metal layer top and overlaps with the first metal layer.Then, on last substrate inner surface, form one deck dielectric spacer layer, and extend in the liquid crystal layer in order to keep the thickness of liquid crystal layer.Then, correspondingly forming common electrode on substrate and the dielectric spacer layer down, and electric property is connected to the first metal layer.
According to the present invention, the Cs line that does not need to make horizontal expansion as is known just can form memory capacitance in pixel, therefore can improve the good rate of product, increases the aperture ratio and the known problem of solution of pixel.
Though the present invention as above illustrates by preferred embodiment; but they do not limit the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; can do some changes and modification, so protection scope of the present invention should be as the criterion with additional claims.
Claims (22)
1. a liquid crystal indicator has a plurality of pixel regions, and each pixel region comprises:
First and second substrate respect to one another accompanies one deck liquid crystal layer therebetween;
At least one storage capacitor construction, be positioned in this first substrate, wherein this storage capacitor construction is made of one deck first conductor layer, one deck second conductor layer and the one dielectric layer that is clipped in therebetween, described first and second conductor layer is a separating layer, and this second conductor layer is positioned at this first conductor layer top and overlapping with this first conductor layer of part;
One layer insulating covers this first substrate and this storage capacitor construction;
One first opening passes through this insulation course and this dielectric layer, exposes from this first conductor layer;
One second opening passes through this insulation course and exposes from this second conductor layer;
One deck first transparent conductor layer that forms on this insulation course in part, and insert this first opening and electric property is connected to this first conductor layer;
One deck second transparent conductor layer that forms on this insulation course in part, and insert this second opening and electric property is connected to this second conductor layer;
One deck dielectric spacer layer that on the inner surface of this second substrate, forms, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And
Being taken as of correspondingly forming on this second substrate and this dielectric spacer layer is one deck the 3rd transparent conductor layer of common electrode, and electric property is connected to this first transparent conductor layer or this second transparent conductor layer.
2. liquid crystal indicator as claimed in claim 1, wherein when the electric property of the 3rd transparent conductor layer was connected to this first transparent conductor layer, this second transparent conductor layer was to be taken as a pixel capacitors.
3. liquid crystal indicator as claimed in claim 1, wherein when the electric property of the 3rd transparent conductor layer was connected to this second transparent conductor layer, this first transparent conductor layer was to be taken as a pixel capacitors.
4. liquid crystal indicator as claimed in claim 1, wherein this first substrate comprises a substrate of glass of a thin film transistor (TFT).
5. liquid crystal indicator as claimed in claim 4, wherein the grid of this thin film transistor (TFT) and this first conductor layer form simultaneously.
6. liquid crystal indicator as claimed in claim 5, wherein source/the drain electrode of this thin film transistor (TFT) forms simultaneously with this second conductor layer.
7. liquid crystal indicator as claimed in claim 1, wherein this insulation course comprises one deck passivation layer and the organic flatness layer of one deck.
8. liquid crystal indicator as claimed in claim 1, wherein this second substrate comprises a substrate of glass of a colored filter.
9. liquid crystal indicator as claimed in claim 8, wherein this colored filter has one deck light shield layer, and this light shield layer is corresponding to this dielectric spacer layer.
10. liquid crystal indicator as claimed in claim 1, wherein said first and second conductor layer is positioned at around the part of this pixel region.
11. a liquid crystal indicator has a plurality of pixel regions, each pixel region comprises a storage capacitor construction, and this pixel region comprises:
First and second substrate respect to one another accompanies one deck liquid crystal layer therebetween;
The conductor layer that the one deck that forms in this first substrate separates;
Cover a layer insulating of this first substrate and this conductor layer;
One deck first transparent conductor layer that on this insulation course of part, forms, and overlapping with the first of this conductor layer;
Be formed on one deck second transparent conductor layer that forms on this insulation course of part, and overlapping with the second portion of this conductor layer;
A connector passes through this insulation course, and wherein this conductor layer is connected to this first transparent conductor layer or second transparent conductor layer by the electric property of this connector;
One deck dielectric spacer layer that on the inner surface of this second substrate, forms, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And
Being taken as of correspondingly forming on this second substrate and this dielectric spacer layer is one deck the 3rd transparent conductor layer of common electrode, and electric property is connected to this second transparent conductor layer;
Wherein, when this connector was connected to this second transparent conductor layer, this storage capacitor construction was made of this conductor layer, this insulation course and this first transparent conductor layer;
Wherein, when this connector was connected to this first transparent conductor layer, this storage capacitor construction was made of this conductor layer, this insulation course and this second transparent conductor layer.
12. liquid crystal indicator as claimed in claim 11, wherein this first substrate comprises a substrate of glass of a thin film transistor (TFT).
13. liquid crystal indicator as claimed in claim 12, wherein this first transparent conductor layer is to be taken as a pixel capacitors, and electric property is connected to this thin film transistor (TFT).
14. liquid crystal indicator as claimed in claim 11, wherein the grid of this thin film transistor (TFT) and this conductor layer form simultaneously.
15. liquid crystal indicator as claimed in claim 11, wherein this second substrate comprises a substrate of glass of a colored filter.
16. liquid crystal indicator as claimed in claim 15, wherein this colored filter has one deck light shield layer, and this light shield layer is corresponding to this dielectric spacer layer.
17. the manufacture method of a liquid crystal indicator, its step comprises:
Form gate line and one deck the first metal layer that separates of horizontal expansion in one first substrate, this gate line has a grid;
Form one dielectric layer and cover this gate line, this first metal layer and this first substrate;
On this dielectric layer that is positioned at above this grid, form one semiconductor layer;
On this dielectric layer, form a source electrode line of longitudinal extension, this source electrode line comprises a source electrode that extends on this semiconductor layer of part, and on this semiconductor layer of part, form a drain electrode simultaneously and on this dielectric layer, form one deck second metal level that separates, wherein this first metal layer, second metal level and this dielectric layer of being clipped in therebetween constitute a storage capacitor construction, and this second metal level is overlapping with this first metal layer of part;
Integrally form a layer insulating and cover this first substrate;
Form one first opening and pass through this insulation course and this dielectric layer, expose from this first metal layer;
Form one second opening and pass through this insulation course, expose from this second metal level;
On this insulation course of part, form one deck first transparent conductor layer, and insert this first opening and electric property is connected to this first metal layer;
On this insulation course of part, form one deck second transparent conductor layer, and insert this second opening and electric property is connected to this second metal level;
One second substrate is provided, relative with this first substrate;
Forming one deck liquid crystal layer is clipped between this first substrate and this second substrate;
On the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And
Form on this second substrate and this dielectric spacer layer correspondingly that to be taken as be one deck the 3rd transparent conductor layer of common electrode, and electric property is connected to this first transparent conductor layer or this second transparent conductor layer.
18. the manufacture method of liquid crystal indicator as claimed in claim 17, wherein when the electric property of the 3rd transparent conductor layer is connected to this first transparent conductor layer, this second transparent conductor layer is to be taken as a pixel capacitors, and is connected to this drain electrode by one the 3rd electric property of opening.
19. the manufacture method of liquid crystal indicator as claimed in claim 17, wherein when the electric property of the 3rd transparent conductor layer is connected to this second transparent conductor layer, this first transparent conductor layer is to be taken as a pixel capacitors, and is connected to this drain electrode by the electric property of one the 3rd opening.
20. the manufacture method of a liquid crystal indicator, its step comprises:
Form gate line and the layer of metal layer that separates of horizontal expansion in one first substrate, this gate line has a grid;
Form a layer insulating and cover this gate line, this metal level and this first substrate;
On this insulation course that is positioned at above this grid, form one semiconductor layer;
Form a source electrode line of longitudinal extension on this dielectric layer, this source electrode line comprises a source electrode that extends on this semiconductor layer of part, and side by side forms a drain electrode on this semiconductor layer of part;
A pixel capacitors of formation and electric property are connected to this drain electrode above this insulation course of part, wherein the first of this pixel capacitors and this metal level is overlapping, and the layer of transparent conductor layer that formation separates on this insulation course of part simultaneously and overlapping with the second portion of this metal level;
Form a connector and pass through this insulation course and connect this to metal level, wherein this metal level is connected to this pixel capacitors or this transparent conductor layer by the electric property of this connector;
One second substrate is provided, relative with this first substrate;
Between this first substrate and this second substrate, form one deck liquid crystal layer;
On the inner surface of this second substrate, form one deck dielectric spacer layer, and extend in this liquid crystal layer in order to keep the thickness of this liquid crystal layer; And
Correspondingly on this second substrate and this dielectric spacer layer, form a common electrode, and electric property is connected to this transparent conductor layer.
21. the manufacture method of liquid crystal indicator as claimed in claim 20, wherein when this connector was connected to this transparent conductor layer, a storage capacitor construction was made of this metal level, this insulation course and this pixel capacitors.
22. the manufacture method of liquid crystal indicator as claimed in claim 20, wherein when this connector was connected to this pixel capacitors, a storage capacitor construction was made of this metal level, this insulation course and this transparent conductor layer.
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| CNB2005100067337A CN100381924C (en) | 2005-01-31 | 2005-01-31 | Liquid crystal display device and manufacturing method thereof |
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| CN100437238C (en) * | 2005-12-22 | 2008-11-26 | 群康科技(深圳)有限公司 | Liquid crystal display device |
| KR20070074891A (en) * | 2006-01-11 | 2007-07-18 | 삼성전자주식회사 | Color filter substrate and liquid crystal display panel |
| CN105870124B (en) * | 2015-01-21 | 2019-06-07 | 群创光电股份有限公司 | Display device |
| TWI607562B (en) | 2016-07-11 | 2017-12-01 | 友達光電股份有限公司 | Display panel |
| JP2019101095A (en) * | 2017-11-29 | 2019-06-24 | シャープ株式会社 | Liquid crystal panel |
| JP2019101548A (en) * | 2017-11-29 | 2019-06-24 | シャープ株式会社 | Liquid crystal panel |
| CN117471776A (en) * | 2022-12-30 | 2024-01-30 | Tcl华星光电技术有限公司 | Display panel and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5748266A (en) * | 1995-03-10 | 1998-05-05 | International Business Machines Corporation | Color filter, liquid crystal display panel, liquid crystal display, and liquid crystal display panel manufacturing method |
| CN1183570A (en) * | 1996-11-26 | 1998-06-03 | 三星电子株式会社 | Liquid crystal display using organic insulating material and manufacturing methods thereof |
| JP2000122097A (en) * | 1998-10-21 | 2000-04-28 | Advanced Display Inc | Liquid crystal display device |
| CN1289432A (en) * | 1998-11-26 | 2001-03-28 | 精工爱普生株式会社 | Electro-optical device and production method thereof and electronic equipment |
| CN1379276A (en) * | 2001-03-30 | 2002-11-13 | 三洋电机株式会社 | Dynamic matrix type display device having complementary capacitance on each pixel |
| US6501529B1 (en) * | 1999-08-18 | 2002-12-31 | International Business Machines Corporation | Liquid crystal display element integrated with a touch sensor |
| US6573969B1 (en) * | 1999-07-14 | 2003-06-03 | Nec Corporation | Liquid crystal display unit with conductive spacers between two substrate structures for biasing back channels of thin film transistors |
-
2005
- 2005-01-31 CN CNB2005100067337A patent/CN100381924C/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5748266A (en) * | 1995-03-10 | 1998-05-05 | International Business Machines Corporation | Color filter, liquid crystal display panel, liquid crystal display, and liquid crystal display panel manufacturing method |
| CN1183570A (en) * | 1996-11-26 | 1998-06-03 | 三星电子株式会社 | Liquid crystal display using organic insulating material and manufacturing methods thereof |
| JP2000122097A (en) * | 1998-10-21 | 2000-04-28 | Advanced Display Inc | Liquid crystal display device |
| CN1289432A (en) * | 1998-11-26 | 2001-03-28 | 精工爱普生株式会社 | Electro-optical device and production method thereof and electronic equipment |
| US6573969B1 (en) * | 1999-07-14 | 2003-06-03 | Nec Corporation | Liquid crystal display unit with conductive spacers between two substrate structures for biasing back channels of thin film transistors |
| US6501529B1 (en) * | 1999-08-18 | 2002-12-31 | International Business Machines Corporation | Liquid crystal display element integrated with a touch sensor |
| CN1379276A (en) * | 2001-03-30 | 2002-11-13 | 三洋电机株式会社 | Dynamic matrix type display device having complementary capacitance on each pixel |
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