CN100371995C - Sawtooth wave position element value detecting circuit - Google Patents
Sawtooth wave position element value detecting circuit Download PDFInfo
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- CN100371995C CN100371995C CNB031533302A CN03153330A CN100371995C CN 100371995 C CN100371995 C CN 100371995C CN B031533302 A CNB031533302 A CN B031533302A CN 03153330 A CN03153330 A CN 03153330A CN 100371995 C CN100371995 C CN 100371995C
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Abstract
The present invention provides a saw tooth wave position element value detecting circuit. The present invention is used for detecting a position element value which is represented by a saw tooth wave signal composed of two times of fundamental frequency 2*f <wob> carried by a wave signal with the fundamental frequency of f<wob>. The detecting circuit comprises a lowpass filter, a comparator and a detection unit, wherein the lowpass filter receives a wave signal and generates a filtering signal; the wave signal is compared with the filtering signal by the comparator, and the comparator generates a comparison signal; the detection unit receives the comparison signal, and generates a first bit element value when a duty cycle of the comparison signal is larger than a preset value of the duty cycle; the detection unit generates a second element value when the duty cycle of the comparison signal is smaller than the preset value of the duty cycle.
Description
Technical field
The present invention relates to a kind of sawtooth wave bit value circuit for detecting.
Background technology
Because the progress of optical disc, the erasable form of CD of new generation (DiscRewritable Format) that is defined as Blue-Ray is just like given birth to.The track of this Blue-Ray CD is carved into wavy in advance, its wave signal (wobble signal) is a string ripple signal, and this string ripple signal is to obtain with respect to the more or less sine skew (sinusoidaldeviation) of average centerline (average centelines) from track.For the Blue-Ray CD, (nominal wobblelength NWL) is equivalent to 69 channel bits (channel bits) to a standard wave length, and this channel bit is the smallest record unit of Blue-Ray CD.
The basic configuration of wave is cosine wave (CW) (cosine), can be expressed as cos{2 π * f
Wob* t}, and the wave with this basic configuration be called as dull wave (Monotone wobble, MW).There are some wave signals can be, use being used on the record disc address (address) of some record cells and being called for short ADIP (Adressin Pre-groove), wherein have two kinds of modulating methods to be used simultaneously by modulation.First kind of minimum key value of moving (Minimum Shift Keying-cosine variant is hereinafter to be referred as MSK-cos) that modulating method is a varies with cosine, and second method is harmonic modulation ripple (Harmonic Modulated Wave is hereinafter to be referred as HMW).
Fig. 1 shows the definition of MSK mark.The method of MSK-cos modulation is that (MSK mark MM) replaces three dull wave MW with a MSK mark each time.As shown in the drawing, a MSK mark comprises three standard wave length N WL, and is defined as follows: first standard wave length N WL is frequency 1.5*f
WobCosine wave (CW), can be expressed as cos{2 π * (1.5*f
Wob) * t}, with beginning as the MSK mark; Second standard wave length N WL is frequency f
WobCosine wave (CW), can be expressed as-cos{2 π * f
Wob* t}, and MSK mark successively; And the 3rd standard wave length N WL is frequency 1.5*f
WobCosine wave (CW), can be expressed as-cos{2 π * (1.5*f
Wob) * t}, with end as the MSK mark.
Fig. 2 shows the definition of sawtooth wave.The method of HMW modulation is each time with some sawtooth waves (Sawtooth Wobbles, STW) the dull wave MW of replacement equal number.Each sawtooth wave STW is made up of the sinusoidal wave institute of basic cosine wave (CW) and two frequencys multiplication, can be expressed as:
Cos{2 π * f
Wob* t} ± a*sin{2 π * (2*f
Wob) * t}, wherein a=0.25.
This cosine wave (CW) by basic frequency with and the approximate a kind of sawtooth wave of waveform formed of second harmonic, therefore the wave that method produced with the HMW modulation is called the sawtooth wave."+" or "-" number then produced inclination to the left or to the right (inclination), and wherein "+" number is used to represent bit value (bit value) " 1 ", and "-" number is used to represent bit value " 0 ".
Fig. 3 shows the framework of the ADIP information of Blue-Ray CD.The data that is recorded in CD must be aimed at (aligned) with the ADIP address of wave modulation.As shown in Figure 3,56 standard wave length N WL are corresponding to two record material frames (recording frame), and are called as an ADIP unit (ADIPunit).Each record material frame comprises (sync) and data (date) synchronously, has 1932 channel bits.And each ADIP unit and two record material frames about 9.5 wave periods of being separated by.
Fig. 4 shows the form of ADIP unit.As shown in Figure 4, the form of this ADIP unit has comprised:
Dull unit (monotone unit): comprise a MSK mark (MM), and 53 dull waves (MW);
Reference unit (reference unit): comprise a MSK mark (MM), 15 dull waves (MW), 37 sawtooth waves (STW) and 1 dull wave (MW);
Lock unit 0 (sync_0 unit): comprise a MSK mark (MM), 13 dull waves (MW), 1 MSK mark (MM), 7 dull waves (MW), 1 MSK mark (MM) and 27 dull waves (MW);
Lock unit 1 (sync_1 unit): comprise a MSK mark (MM), 15 dull waves (MW), 1 MSK mark (MM), 7 dull waves (MW), 1 MSK mark (MM) and 25 dull waves (MW);
Lock unit 2 (sync_2 unit): comprise a MSK mark (MM), 17 dull waves (MW), 1 MSK mark (MM), 7 dull waves (MW), 1 MSK mark (MM) and 23 dull waves (MW);
Lock unit 3 (sync_3 unit): comprise a MSK mark (MM), 19 dull waves (MW), 1 MSK mark (MM), 7 dull waves (MW), 1 MSK mark (MM) and 21 dull waves (MW);
Bit data 1 (data_1 unit): comprise a MSK mark (MM), 9 dull waves (MW), 3 dull waves (MW), 1 MSK mark (MM), 37 sawtooth waves (STW) and 1 dull wave (MW);
Bit data 0 (data_0 unit): comprise a MSK mark (MM), 11 dull waves (MW), 1 dull wave (MW), 1 MSK mark (MM), 37 sawtooth waves (STW) and 1 dull wave (MW).
So, can orient ADIP address on the discs according to the form of above-mentioned ADIP unit.So in order correctly to judge the form of ADIP unit, right judgement sawtooth wave (STW) is that bit value " 1 " or " 0 " are very important subjects under discussion.
Summary of the invention
Because the problems referred to above the purpose of this invention is to provide the effectively economic circuit for detecting of a kind of sawtooth wave bit value and correctly detect sawtooth wave bit value.
Above-mentioned purpose of the present invention is realized by following technical scheme.
A kind of sawtooth wave bit value circuit for detecting is the bit value that is used for detecting the sawtooth wave of a wave signal, and this wave signal has a basic frequency, it is characterized in that comprising:
One wave filter is reception and filter aforementioned wave signal, and produces a filtering signal;
One comparer is comparison of aforementioned wave signal and aforementioned filtering signal, and produces a comparison signal; And
One detecting unit is to receive aforementioned comparison signal, and when the responsibility cycle of this comparison signal during greater than a responsibility cycle predetermined value, produces first bit value, and when the responsibility cycle of this comparison signal during less than this responsibility cycle predetermined value, produces second bit value.
Described sawtooth wave bit value circuit for detecting, it is characterized in that: aforesaid filters is a low-pass filter, and its 3db frequency is aforementioned basic frequency.
Described sawtooth wave bit value circuit for detecting, it is characterized in that: aforementioned responsibility cycle predetermined value is 50%.
Described sawtooth wave bit value circuit for detecting, it is characterized in that: aforementioned detecting unit comprises:
One second low-pass filter is to receive aforementioned comparison signal, and produces a voltage signal; And
An accurate detecting unit is to receive the aforesaid voltage signal, and accurate during greater than a charge threshold level when the position of this voltage signal, produces aforementioned first bit value, and when the standard of this voltage signal during less than this charge threshold level, produces aforementioned second bit value.
Described sawtooth wave bit value circuit for detecting, it is characterized in that: aforementioned first bit value is 1, and aforementioned second bit value is 0.
Sawtooth wave bit value circuit for detecting of the present invention comprises: a low-pass filter is to receive wave signal, and produces a filtering signal; One comparer is comparison wave signal and filtering signal, and produces a comparison signal; And a detecting unit, be to receive comparison signal, and, produce first bit value, and, produce second bit value when the responsibility cycle of this comparison signal during less than this responsibility cycle predetermined value when the responsibility cycle of this comparison signal during greater than a responsibility cycle predetermined value.
The invention has the advantages that:
A kind of sawtooth wave bit value circuit for detecting provided by the present invention, it constitutes simple economy, and can be effectively correct detect sawtooth wave bit value.
Describe sawtooth wave bit value circuit for detecting of the present invention in detail below with reference to accompanying drawing.
Description of drawings
Fig. 1 shows the definition of MSK mark.
Fig. 2 shows the definition of sawtooth wave.
Fig. 3 shows the framework of the ADIP information of Blue-Ray CD.
Fig. 4 shows the form of ADIP unit.
Fig. 5 is a sawtooth wave bit value circuit for detecting of the present invention.
Fig. 6 A is the f of wave signal and this wave signal process low-pass filter
c=f
WobThe time output signal.
Fig. 6 B is the output of Fig. 6 A and the comparison signal of input signal process comparer.
Fig. 6 C is the f of wave signal and this wave signal process low-pass filter
c=2*f
WobThe time output signal.
Fig. 6 D is the output of Fig. 6 C and the comparison signal of input signal process comparer.
Fig. 6 E is the f of wave signal and this wave signal process low-pass filter
c=0.5*f
WobThe time output signal.
Fig. 6 F is the output of Fig. 6 E and the comparison signal of input signal process comparer.
Fig. 7 shows second embodiment of sawtooth wave bit value circuit for detecting of the present invention.
The comparison signal of Fig. 8 A, 8B and 8C displayed map 7 and the synoptic diagram of voltage signal, wherein Fig. 8 A be that responsibility cycle is about 50%, Fig. 8 B be responsibility cycle less than 50% and Fig. 8 C be that responsibility cycle is greater than 50%.
Fig. 9 shows the oscillogram of emulation, and wherein Fig. 9 A is comparison signal for original wave signal, Fig. 9 B from the disc acquisition for filtering signal and Fig. 9 C through low-pass filter.
Embodiment
Operating principle of the present invention is the filtering signal that produces approximate basic frequency after utilizing low-pass filter with the high frequency filtering of wave signal, utilize comparer relatively filtering signal and wave signal again, can judge the bit value of sawtooth wave according to the size of the responsibility cycle of comparison signal.
Fig. 5 is a sawtooth wave bit value circuit for detecting of the present invention.As shown in the drawing, sawtooth wave bit value circuit for detecting 50 of the present invention comprises a low-pass filter 51, a comparer 52 and a responsibility cycle detecting unit 53.Low-pass filter 51 receives the wave signals, and exports a filtering signal, and comparer 52 is relatively this wave signal and filtering signal then, and exports a comparison signal.53 responsibility cycle according to this comparison signal of responsibility cycle detecting unit produce the bit value of sawtooth wave.That is when the responsibility cycle of comparison signal during greater than a responsibility cycle predetermined value (for example 50%), the bit value of sawtooth wave is 1, otherwise when the responsibility cycle of comparison signal during less than the responsibility cycle predetermined value, the bit value of sawtooth wave is 0.
Responsibility cycle detecting unit 53 can utilize a high frequency time pulse as the counting clock pulse, the umber of pulse of the counting clock pulse when re-using the high levels of counter (figure do not show) counting comparison signal and low level can be used as the judgement of responsibility cycle according to the umber of pulse of being counted.The embodiment that responsibility cycle detecting unit 53 is implemented with counter is the technology that the sector person has the knack of, and no longer is described in detail.
Fig. 6 A is the filtering signal of the low-pass filter of wave signal and this wave signal process Fig. 5, and wherein solid line is the wave signal, and dotted line is the filtering signal, and the f of this low-pass filter
c=f
Wob, and Fig. 6 B is the output of Fig. 6 A and the comparison signal of input signal process comparer.Fig. 6 C is the filtering signal of the low-pass filter of wave signal and this wave signal process Fig. 5, and wherein solid line is the wave signal, and dotted line is the filtering signal, and the f of this low-pass filter
c=2*f
Wob, and Fig. 6 D is the output of Fig. 6 C and the comparison signal of input signal process comparer.Fig. 6 E is the filtering signal of the low-pass filter of wave signal and this wave signal process Fig. 5, and wherein solid line is the wave signal, and dotted line is the filtering signal, and the f of this low-pass filter
c=0.5*f
Wob, and Fig. 6 F is the output of Fig. 6 E and the comparison signal of input signal process comparer.
Fig. 6 A, 6C, with the bit value of the sawtooth wave of the wave signal of 6E be 1, so Fig. 6 B, 6D, with the responsibility cycle of the comparison signal of 6F all greater than 50%, as long as therefore utilize the responsibility cycle of responsibility cycle detecting unit 53 these comparison signals of detecting, the bit value of the sawtooth wave that can judge rightly.Moreover, as Fig. 6 A
-Oscillogram shown in the 6F can be recognized, the f of low-pass filter
cValue is from 0.5*f
WobTo 2*f
WobAll can, so to the f of low-pass filter
cThe degree of accuracy of value is not too responsive, and this makes that the circuit design of low-pass filter is very simple, need only make of general resistor, capacitor to get final product.
Fig. 7 shows second embodiment of sawtooth wave bit value circuit for detecting of the present invention.As shown in the drawing, sawtooth wave bit value circuit for detecting 50 of the present invention comprises a low-pass filter 51, a comparer 52 and a responsibility cycle detecting unit 53.And this responsibility cycle detecting unit 53 comprises one second low-pass filter 531 and an accurate detecting unit 532.If responsibility cycle detecting unit 53 is implemented in the counter mode, then need a high-frequency count clock pulse; But present embodiment does not then need the high-frequency count clock pulse, but utilizes low-pass filter and the accurate detecting unit in position to implement the responsibility cycle detecting unit.The comparison signal of comparer 52 through second low-pass filter 531 after, produce the voltage signal of an approximate direct current position standard, and the position of this voltage signal is accurate is directly proportional with the responsibility cycle of comparison signal.Therefore, utilize the accurate detecting unit 532 in position to detect the position standard of voltage signal, whether the responsibility cycle that can detect comparison signal easily surpasses responsibility cycle predetermined value (50%).This accurate detecting unit 532 can utilize one second comparer to implement.That is, this second comparer comparative voltage signal and a reference voltage, when voltage signal greater than reference voltage, the responsibility cycle of then representing comparison signal is greater than the responsibility cycle predetermined value, therefore exports 1 bit value as the sawtooth wave; Otherwise, when voltage signal less than reference voltage, the responsibility cycle of then representing comparison signal is less than the responsibility cycle predetermined value, therefore exports 0 bit value as the sawtooth wave.
Fig. 8 A, 8B and 8C show the synoptic diagram of comparison signal and voltage signal, wherein Fig. 8 A be that responsibility cycle is about 50%, Fig. 8 B be responsibility cycle less than 50% and Fig. 8 C be that responsibility cycle is greater than 50%.So, be Vcc if comparison signal is 1 o'clock a voltage, then reference voltage can be set at 1/2Vcc.
Fig. 9 shows the oscillogram of emulation, and wherein Fig. 9 A is comparison signal for original wave signal, Fig. 9 B from the disc acquisition for filtering signal and Fig. 9 C through low-pass filter.Among Fig. 9 B, solid line is the wave signal after original wave signal process first order low-pass filter (figure does not show) filter away high frequency noise, and dotted line is the filtering signal of wave signal through low-pass filter 51.The bit value of the sawtooth wave of the wave signal of Fig. 9 B is 0, so the responsibility cycle of the comparison signal of Fig. 9 C is all less than 50%.
Though more than with embodiment the present invention is described, therefore do not limit scope of the present invention, only otherwise break away from main idea of the present invention, the sector person can carry out various distortion or change.
Claims (5)
1. sawtooth wave bit value circuit for detecting is the bit value that is used for detecting the sawtooth wave of a wave signal, and this wave signal has a basic frequency, it is characterized in that comprising:
One wave filter is reception and filter aforementioned wave signal, and produces a filtering signal;
One comparer is comparison of aforementioned wave signal and aforementioned filtering signal, and produces a comparison signal; And
One detecting unit is to receive aforementioned comparison signal, and when the responsibility cycle of this comparison signal during greater than a responsibility cycle predetermined value, produces first bit value, and when the responsibility cycle of this comparison signal during less than this responsibility cycle predetermined value, produces second bit value.
2. sawtooth wave bit value circuit for detecting according to claim 1, it is characterized in that: aforesaid filters is a low-pass filter.
3. sawtooth wave bit value circuit for detecting according to claim 1, it is characterized in that: aforementioned responsibility cycle predetermined value is 50%.
4. sawtooth wave bit value circuit for detecting according to claim 1, it is characterized in that: aforementioned detecting unit comprises:
One second low-pass filter is to receive aforementioned comparison signal, and produces a voltage signal, and the position of this voltage signal is accurate to be directly proportional with above-mentioned responsibility cycle; And
An accurate detecting unit, be to receive the aforesaid voltage signal, and when the position of this voltage signal accurate during greater than a charge threshold level, the responsibility cycle of promptly representing this comparison signal is greater than this responsibility cycle predetermined value, produce aforementioned first bit value, and accurate during less than this charge threshold level when the position of this voltage signal, the responsibility cycle of promptly representing this comparison signal produces aforementioned second bit value less than this responsibility cycle predetermined value.
5. sawtooth wave bit value circuit for detecting according to claim 4, it is characterized in that: aforementioned first bit value is 1, and aforementioned second bit value is 0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031533302A CN100371995C (en) | 2003-08-07 | 2003-08-07 | Sawtooth wave position element value detecting circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB031533302A CN100371995C (en) | 2003-08-07 | 2003-08-07 | Sawtooth wave position element value detecting circuit |
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| Publication Number | Publication Date |
|---|---|
| CN1581306A CN1581306A (en) | 2005-02-16 |
| CN100371995C true CN100371995C (en) | 2008-02-27 |
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| CNB031533302A Expired - Fee Related CN100371995C (en) | 2003-08-07 | 2003-08-07 | Sawtooth wave position element value detecting circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1166578A (en) * | 1997-08-07 | 1999-03-09 | Sanyo Electric Co Ltd | Circuit for detecting wobble signal of disk player |
| JPH11306685A (en) * | 1998-04-21 | 1999-11-05 | Sony Corp | Signal processing circuit |
| US6069499A (en) * | 1998-07-20 | 2000-05-30 | Samsung Electronics Co., Ltd. | Data slicer |
| CN1277510A (en) * | 1999-06-03 | 2000-12-20 | 松下电器产业株式会社 | Baseband signal off-centre correcting circuit and method and its frequency shift keying receiving equipment |
| JP2002074660A (en) * | 2000-08-22 | 2002-03-15 | Ricoh Co Ltd | Phase demodulation method, phase demodulator and information recording/reproducing device |
| CN1356694A (en) * | 2000-12-05 | 2002-07-03 | 提阿克株式会社 | Optical disk drive |
-
2003
- 2003-08-07 CN CNB031533302A patent/CN100371995C/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1166578A (en) * | 1997-08-07 | 1999-03-09 | Sanyo Electric Co Ltd | Circuit for detecting wobble signal of disk player |
| JPH11306685A (en) * | 1998-04-21 | 1999-11-05 | Sony Corp | Signal processing circuit |
| US6069499A (en) * | 1998-07-20 | 2000-05-30 | Samsung Electronics Co., Ltd. | Data slicer |
| CN1277510A (en) * | 1999-06-03 | 2000-12-20 | 松下电器产业株式会社 | Baseband signal off-centre correcting circuit and method and its frequency shift keying receiving equipment |
| JP2002074660A (en) * | 2000-08-22 | 2002-03-15 | Ricoh Co Ltd | Phase demodulation method, phase demodulator and information recording/reproducing device |
| CN1356694A (en) * | 2000-12-05 | 2002-07-03 | 提阿克株式会社 | Optical disk drive |
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| Publication number | Publication date |
|---|---|
| CN1581306A (en) | 2005-02-16 |
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