CN100368985C - Fast centroid statistical method and device - Google Patents
Fast centroid statistical method and device Download PDFInfo
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- CN100368985C CN100368985C CNB031336108A CN03133610A CN100368985C CN 100368985 C CN100368985 C CN 100368985C CN B031336108 A CNB031336108 A CN B031336108A CN 03133610 A CN03133610 A CN 03133610A CN 100368985 C CN100368985 C CN 100368985C
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- 238000007493 shaping process Methods 0.000 claims description 9
- 238000000926 separation method Methods 0.000 claims description 7
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Abstract
The invention relates to image processing, in particular to a fast centroid statistical method and a fast centroid statistical device capable of outputting a target position patient in real time. Directly carrying out statistical operation on a target binary signal by using a super-large-scale integrated circuit of a statistical program without storage, finally outputting a line weighted sum, a field weighted sum and a binary statistical total number, reading the three data by using a single chip microcomputer, and respectively removing the line weighted sum to obtain position data in a line direction and the field weighted sum to obtain position data in a field direction by using the binary statistical total number; the device adopts a super large scale integrated circuit as a core device, is connected with an input circuit through a control bus, and is connected with a singlechip through a data bus, an address and a control bus. The invention occupies short time of the single chip microcomputer and can output the position information in real time.
Description
Technical field
The present invention relates to image processing, the fast mass center counting method and the device of the real-time export target positional information of specifically a kind of energy.
Background technology
At present, known barycenter statistical circuit is made up of input circuit, RAM, single-chip microcomputer, output circuit, the binary signal of target is stored in the middle of the RAM by input circuit, and single-chip microcomputer carries out statistical calculation according to the row field synchronization, by the output circuit output position information.Because need carry out the very heavy multiplication that adds, taken a large amount of time of single-chip microcomputer.In addition, it is that binary signal is stored into computing again among the RAM, output position information in real time earlier.
Summary of the invention
In order to overcome existing barycenter statistical circuit deficiency, the invention provides a kind of short, the fast mass center counting method and device of output position information in real time of single-chip microcomputer time that take.
To achieve these goals, the technical solution adopted for the present invention to solve the technical problems is as follows:
Mass center counting method is: the VLSI (very large scale integrated circuit) of using statistics program, without storage, directly the target binary signal is carried out statistical calculation, the statistics sum of final output row weighted sum, a weighted sum and two-value, read above three data by single-chip microcomputer, again with the statistics sum of two-value remove respectively position data that capable weighted sum obtains line direction, and the weighted sum position data that obtains field direction get final product.
Its equipment therefor: the employing VLSI (very large scale integrated circuit) is a core devices, is connected with input circuit by control bus, and is connected with single-chip microcomputer with control bus by data bus, address; Be specially: the two-stage not gate shaping in the not gate shaping circuit respectively of line synchronizing signal and field sync signal, be connected with VLSI (very large scale integrated circuit), clock signal and binary signal are directly connected to VLSI (very large scale integrated circuit), VLSI (very large scale integrated circuit) links to each other with control end with data terminal respectively, row field synchronization separation vessel provides latch address for VLSI (very large scale integrated circuit), storage space when row field synchronization separation vessel provides work for single-chip microcomputer, crystal oscillator provides clock signal for VLSI (very large scale integrated circuit) and single-chip microcomputer.
The invention has the beneficial effects as follows:
1. adopt the present invention without storage, adopt the hardware computing again, only need the output statistics to give single-chip microcomputer, allow single-chip microcomputer make division arithmetic twice, can reduce the holding time of single-chip microcomputer, alleviate the pressure of single-chip microcomputer greatly, and can reach the purpose of real-time export target positional information.
2. the present invention adopts VLSI (very large scale integrated circuit), and is not only simple in structure, also strengthened reliability, and safeguards simple.
3. adopt the present invention can improve tracking velocity and anti-jamming capacity.
Description of drawings
Fig. 1 is a principle of the invention block diagram.
Fig. 2 is the one embodiment of the invention circuit theory diagrams.
Fig. 3 is the one embodiment of the invention program flow diagram.
Embodiment
The invention will be further described below in conjunction with drawings and Examples.
The present invention uses the VLSI (very large scale integrated circuit) of statistics program, without storage, directly the target binary signal is carried out statistical calculation, the statistics sum of final output row weighted sum, a weighted sum and two-value, read above three data by single-chip microcomputer, again with the statistics sum of two-value remove respectively position data that capable weighted sum obtains line direction, and the weighted sum position data that obtains field direction get final product.
As shown in Figure 1, it is core devices that the present invention adopts VLSI (very large scale integrated circuit) CPLD, is connected with input circuit by control bus 1, and is connected with single-chip microcomputer with control bus 3 by data bus 2, address.
As shown in Figure 2, be specially: line synchronizing signal fhin and field sync signal fvin be two-stage not gate D6F in the not gate shaping circuit respectively, D6E and D6C, the D6D shaping, U1 is connected with VLSI (very large scale integrated circuit), clock signal fz and binary signal rz are directly connected to VLSI (very large scale integrated circuit) U1, VLSI (very large scale integrated circuit) U1 links to each other with control end with the U3 data terminal respectively, the pa mouth of row field synchronization separation vessel U2 provides latch address for VLSI (very large scale integrated circuit) U1, storage space when row field synchronization separation vessel U2 provides work for single-chip microcomputer U3, crystal oscillator J1 provides clock signal for VLSI (very large scale integrated circuit) U1 and single-chip microcomputer U3.
As shown in Figure 3, barycenter statistics program idiographic flow is: first initialization, judge whether to begin counting then, and if being NO then return, judged result rejudges, if judged result is YES, then go counting, judged whether two-value again, when judged result is returned a row counting during for NO, when being YES, judged result then carries out a two-value counting and row statistics, judge whether that again statistics finishes, return a row counting during for NO, when judged result is YES, data are exported when judged result.
Principle of work is as follows:
VLSI (very large scale integrated circuit) U1 is by two-value counting, row statistics, a statistics, data outputting module is formed, field sync signal fvin is connected to the monostable input end of VLSI (very large scale integrated circuit) U1 through two-stage not gate shaping circuit, its monostable output connects the clear terminal of two-value counting, row statistics, three statistical modules of statistics, when the high impulse of monostable output certain width, two-value counting, row statistics, three statistical modules of statistics are carried out initialization.The inner window signal that produces of binary signal rz and VLSI (very large scale integrated circuit) U1 be connected to one of VLSI (very large scale integrated circuit) U1 inside with input end, connect row statistics, an Enable Pin of adding up with the output of door, the basis for estimation whether inner window signal that produces begins to count, when window signal is high level, begin counting.Be expert at, in the statistical module, constitute a totalizer by inner totalizer of VLSI (very large scale integrated circuit) U1 and register.In the row statistics, the input of totalizer is the count value of window internal clock signal fz; In the statistics of field, the input of totalizer is the count value of line synchronizing signal fhin in the window.When window signal was low level, row, a statistics finished, and statistics is latched into data outputting module.Single-chip microcomputer U3 reads three groups of data from the data outputting module of VLSI (very large scale integrated circuit) U1, through twice division arithmetic, just can obtain the positional information of target then and there, has guaranteed real-time.
The described not gate shaping circuit of present embodiment is made of the 74HC14 chip of band application schmitt trigger; Single-chip microcomputer U3 selects the higher 80c196kc family chip of speed; The max series CPLD chip that VLSI (very large scale integrated circuit) U1 adopts alteral company to produce, the psd301 family chip that row field synchronization separation vessel U2 adopts wsi company to produce, crystal oscillator J1 adopts the horizontal crystal oscillator of 12Mhz.
The experiment proved that, adopt the present invention can improve tracking velocity and anti-jamming capacity,, also strengthened reliability, and safeguard simple owing to used ultra-large integrated chip.
Claims (3)
1. fast mass center counting method, it is characterized in that: use the VLSI (very large scale integrated circuit) that has statistics program, without storage, directly the target binary signal is carried out statistical calculation, the statistics sum of final output row weighted sum, a weighted sum and two-value, read above three data by single-chip microcomputer, again with the statistics sum of two-value remove respectively position data that capable weighted sum obtains line direction, and the weighted sum position data that obtains field direction get final product.
2. according to the described fast mass center counting method of claim 1, it is characterized in that: described statistics program idiographic flow is: first initialization, judge whether to begin counting then, if being NO then return, judged result rejudges, if judged result is YES, then go counting, judged whether two-value again, when judged result is returned a row counting during for NO, when being YES, judged result then carries out a two-value counting and row statistics, judge whether that again statistics finishes, return a row counting during for NO, when judged result is YES, data are exported when judged result.
3. a fast mass center statistic device is characterized in that: adopt VLSI (very large scale integrated circuit) (U1) for core devices, be connected with input circuit by control bus, and be connected with single-chip microcomputer with control bus by data bus, address; The two-stage not gate shaping in the not gate shaping circuit respectively of line synchronizing signal and field sync signal, (U1) is connected with VLSI (very large scale integrated circuit), clock signal and binary signal are directly connected to VLSI (very large scale integrated circuit) (U1), VLSI (very large scale integrated circuit) (U1) links to each other with control end with single-chip microcomputer (U3) data terminal respectively, row field synchronization separation vessel (U2) provides latch address for VLSI (very large scale integrated circuit) (U1), row field synchronization separation vessel (U2) is single-chip microcomputer (U3) storage space when work is provided, and crystal oscillator (J1) provides clock signal for VLSI (very large scale integrated circuit) (U1) and single-chip microcomputer (U3); VLSI (very large scale integrated circuit) (U1) is by two-value counting, row statistics, a statistics, data outputting module is formed, field sync signal fvin is connected to a monostable input end of VLSI (very large scale integrated circuit) (U1) through two-stage not gate shaping circuit, its monostable output connects the clear terminal of two-value counting, row statistics, three statistical modules of statistics, when the high impulse of monostable output certain width, two-value counting, row statistics, three statistical modules of statistics are carried out initialization; The inner window signal that produces of binary signal rz and VLSI (very large scale integrated circuit) (U1) be connected to VLSI (very large scale integrated circuit) (U1) inner with input end, connect row statistics, an Enable Pin of adding up with the output of door, the basis for estimation whether inner window signal that produces begins to count, when window signal is high level, begin counting; Be expert at, in the statistical module, constitute a totalizer by inner totalizer of VLSI (very large scale integrated circuit) (U1) and register; In the row statistics, the input of totalizer is the count value of window internal clock signal fz; In the statistics of field, the input of totalizer is the count value of line synchronizing signal fhin in the window; When window signal was low level, row, a statistics finished, and statistics is latched into data outputting module; Single-chip microcomputer (U3) reads three groups of data from the data outputting module of VLSI (very large scale integrated circuit) (U1), through twice division arithmetic, just obtains the positional information of target then and there, has guaranteed real-time.
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| Application Number | Priority Date | Filing Date | Title |
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| CNB031336108A CN100368985C (en) | 2003-07-29 | 2003-07-29 | Fast centroid statistical method and device |
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| CNB031336108A CN100368985C (en) | 2003-07-29 | 2003-07-29 | Fast centroid statistical method and device |
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| CN100368985C true CN100368985C (en) | 2008-02-13 |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2002075660A2 (en) * | 2001-03-21 | 2002-09-26 | Consiglio Nazionale Delle Ricerche | Method and apparatus for real time contour tracking of objects on video images sequences |
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Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2002075660A2 (en) * | 2001-03-21 | 2002-09-26 | Consiglio Nazionale Delle Ricerche | Method and apparatus for real time contour tracking of objects on video images sequences |
Non-Patent Citations (2)
| Title |
|---|
| 一种快速求图像目标质心的方法. 胡君.光学精密工程，第6卷第5期. 1998 * |
| 一种新的文本数字水印标记策略和检测方法. 黄华，齐春，李俊，朱伟芳.西安交通大学学报，第36卷第2期. 2002 * |
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