CN100368943C - Embedded type general servo controller - Google Patents
Embedded type general servo controller Download PDFInfo
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- CN100368943C CN100368943C CNB2004100112412A CN200410011241A CN100368943C CN 100368943 C CN100368943 C CN 100368943C CN B2004100112412 A CNB2004100112412 A CN B2004100112412A CN 200410011241 A CN200410011241 A CN 200410011241A CN 100368943 C CN100368943 C CN 100368943C
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Abstract
The present invention relates to an embedded type universal servo controller which belongs to the technical field of industrial automation control. The present invention comprises a controller, a watchdog, an A/D converter, a parallel communication port, a serial communication port, a programmable logic device and a driving circuit, wherein the data end of the controller is respectively connected with the A/D converter, the parallel communication port, the serial communication port and the data end of the programmable logic device; the data end, the address end and the control end of the programmable logic device are respectively connected with the controller, the A/D converter, the parallel communication port, the serial communication port and the data end, the address end and the control end of the programmable logic device. By utilizing a method of combination of a TMS320F2812 controller and a programmable device and utilizing highly efficient C language and hardware description language VHDL, the present invention achieves control logic and a control algorithm and can flexibly carry out servo control. The embedded type universal servo controller has the advantages of high speed, high efficiency, high integrated level and high reliability.
Description
Technical field
The invention belongs to technical field of industrial automatic control, relate to a kind of servo controller, specifically a kind of universal embedded servo controller.
Technical background:
In industrial automation control field, the structure that existing embedded servo controller adopts pc104 to combine with control card mostly.Because pc104 is the computing machine that adopts intel x86 series cpu, it is one and has demonstration, communication, storage, the peripheral hardware that network etc. are very many, being the computing machine of a multisystem multitask, is not special-purpose built-in industrial automation control system, thereby has shortcoming and problems such as the bulky integrated level of control system is not high, dumb, controls reaction speed slow, deadlock easily, system works instability, the expensive cost height of computer prices.
Summary of the invention:
For solving existing shortcoming of background technology and problem, the present invention adopts TMS320F2812 digital signal processor (dsp) as controller, the method of utilizing the outer special IC of itself integrated peripheral hardware and sheet, field programmable gate function to combine, and with efficient, succinct C language and Hardware Description Language VHDL, realize the realization of steering logic and control algolithm, purpose provides a kind of universal embedded servo controller.
The present invention includes controller 1, house dog 2, A/D converter 3, parallel communication mouth 4, serial communication interface 5, serial interface chip 6, programmable logic device (PLD) 7, the first driving circuits 8, the second driving circuits 9.The reset signal output terminal of house dog 2 links to each other with the reset signal input end of controller 1.The data line output terminal of A/D converter 3 links to each other with general digital io end with the data line input end of controller 1 respectively with the conversion and control input end.The data line I/O end of parallel communication mouth 4 links to each other with the data line I/O end of controller 1.The data line I/O end of serial communication interface 5 links to each other with controller 1 data line I/O end, and the data line I/O end of serial communication interface 5 links to each other with the data line I/O end of serial interface chip 6.The data line I/O end of programmable logic device (PLD) 7, address wire output terminal, read signal output terminal, write signal input end, chip selection signal input end, look-at-me output terminal, reset signal input end link to each other with data line I/O end, address wire input end, read signal input end, write signal output terminal, chip selection signal output terminal, look-at-me input end, the reset signal output terminal of controller 1 respectively.The wide ripple signal output part of the accent of programmable logic device (PLD) 7 links to each other with the wide ripple signal input part of the accent of first driving circuit 8.The wide ripple signal output part of the accent of controller 1 transfers wide ripple signal input part to link to each other with second driving circuit 9.The read signal of programmable logic device (PLD) 7, write signal, chip selection signal output terminal link to each other with read signal, write signal, the chip selection signal input end of A/D converter 3 and parallel communication mouth 4 respectively, and the read signal of programmable logic device (PLD) 7, write signal, chip selection signal, look-at-me output terminal link to each other with read signal, write signal, chip selection signal, the look-at-me input end of serial communication interface 5 respectively.
The data of the reception outside that will finish according to controller 1 are carried out computing to data, and output is transferred the task of wide ripple and programmed, and program is deposited in the controller 1.
Logic control and transfer wide ripple output protection task to program between the controller 1 that will finish according to programmable logic device (PLD) 7 and the peripheral hardware, and program is deposited in the programmable logic device (PLD) 7.
Finish the data that receive the outside according to the program of establishment in advance, and data carried out computing output transfer the controller 1 of wide ripple to comprise:
Judge whether digital sample interrupt response sign equals 1 device;
According to delivery time that be provided with and each subsystem communication, send byte number, receive that byte number information is finished and each subsystem between data information exchange, finish the device that classical pid control algolithm realizes simultaneously;
Export the device of transferring wide ripple signal according to the data computation result;
Form the device of each subsystem accepting state sign;
Finish logic control between controller 1 and the peripheral hardware and transfer the programmable logic device (PLD) 7 of wide ripple output protection to comprise according to the program of establishment in advance:
Be used to receive the look-at-me of serial ports, and send the device of dsp look-at-me according to the look-at-me of serial ports;
Be used to receive the go forward side by side code translator of row decoding of the read-write control signal of dsp and address signal;
Be used for sending the device of the control signal of each subsystem according to the result of decoding;
Be used to realize the parallel interface holding circuit of parallel interface signal protection;
Be used to realize the serial line interface holding circuit of serial line interface signal protection;
Be used to realize transferring the house dog protection of wide ripple signal, the device of wide ripple signal is transferred in output.
The course of work of the present invention: house dog 2 provides reset signal for controller 1, programmable logic device (PLD) 7, and assurance controller 1 and programmable logic device (PLD) 7 are worked under stable status.A/D converter 3 will be digital signal from four tunnel analog signal conversion of external unit; and give controller 1 with digital signal transfers; parallel communication mouth 4 receives external status signals and parallel data; and with the system status signal and the parallel data output of controller 1 output, the parallel holding circuit of the parallel data of parallel communication mouth 4 outputs in programmable logic device (PLD) 7 realizes protection output.Serial communication interface is realized going here and there and data-switching and also string data conversion, finishes the serial data communication of controller 1 and outside other system.Serial line interface holding circuit in the programmable logic device (PLD) 7 realizes the input and output protection of serial data.The CAN bus interface of controller 1 realizes the data communication of controller 1 and outside industrial-controlled general line.Controller 1 is total system " brain ", finishes to receive outside data, carries out data computation and handles, and according to the result of computing, wide ripple control servomotor is transferred in output.The photoelectric encoder interface of controller 1 receives the position feed back signal of exterior light photoelectric coder, and according to the wide ripple signal of accent of position feed back signal adjustment output, to reduce the error of external unit position.The wide ripple signal of accent of control motor is by the wide ripple output interface output of the accent of controller 1.Control signal via controller 1 calculation process output control motor by serial communication interface 5 input controllers 1 is transferred wide ripple signal.The control motor of controller 1 output transfers wide ripple signal also can protect output through logic control, first driving circuit 8 of programmable logic device (PLD) 7 through the directly output of second driving circuit, 9 bufferings.Programmable logic device (PLD) 7 is finished the logic control between controller 1 and peripheral hardware A/D converter 3, serial communication interface 5, the parallel communication mouth 4 and is transferred the effect of wide ripple signal output protection in system.
The present invention utilizes the TMS320F2812 digital signal processor as controller, the method of utilizing the outer special IC of itself integrated peripheral hardware and sheet, field programmable gate function to combine, and with C language and Hardware Description Language VHDL efficiently, realize the realization of steering logic and control algolithm, can carry out servocontrol very flexibly, servo-control system is had at a high speed, efficient, high integration, high reliability.
Description of drawings
Fig. 1 is a structural representation of the present invention, also is the specification digest accompanying drawing.1 is controller among the figure, and the G in the controller 1 is PWM1～PWM12 interface, and I is XR/W, XWE, XNMI-XINT
13, the RESET interface, H is outside industrial-controlled general line interface, J is the photoelectric encoder interface, 2 house dogs, 3 is A/D converter, the A in the A/D converter 3 is BUSY, FRSTDATA and CONVST interface, B is VIN1A～VIN4A and VIN1B～VIN4B interface, F is WR, RD and CS interface, and 4 parallel communication mouths, the E in the parallel communication mouth 4 are PA
0～PA
7(or PB
0～PB
7, PC
0～PC
7) interface, F is WR, RD and CS interface, 5 serial communication interfaces, C
1Be TXA～TXD interface, C
2Be RXA～RXD interface, F is WR, RD and CS interface, 6 serial interface chips, 7 programmable logic device (PLD), D is a data line interface, and A is the address wire interface, and G is read signal output terminal, write signal input end, chip selection signal input end, look-at-me output terminal, reset signal input end, 8 first driving circuits, 9 second driving circuits.
Fig. 2 is the process flow diagram of controller 1 preprogramming of the present invention.
Fig. 3 is the process flow diagram of programmable logic device (PLD) 7 preprogrammings of the present invention.
Embodiment
The present invention includes controller 1, house dog 2, A/D converter 3, parallel communication mouth 4, parallel interface holding circuit, serial communication interface 5, serial interface chip 6, serial line interface holding circuit, programmable logic device (PLD) 7, the first driving circuits 8, the second driving circuits 9.As shown in Figure 1, it is AD7864 that A/D converter 3 adopts model, it is C8255A that parallel communication mouth 4 adopts model, it is ST16C554 that serial communication interface 5 adopts model, and it is EPM3064A100 that programmable logic device (PLD) 7 adopts model, and it is MAX706T that house dog 2 is adopted model, first driving circuit 8 comprises 3 driving interface, second driving circuit 9 comprises two driving interface, and the model of driving interface is SN74ALS244A, and it is two chip blocks of SN75174, SN75175 that serial interface chip 6 adopts model.
The program of working out in advance in the controller 1 comprises the following steps:
A. begin;
B. to controller 1 serial port, system parameter is set, system status parameters is carried out the initialization setting;
C. judge whether digital sample interrupt response sign equals 1, wait for interruption if be not equal to 1; Enter next step if equal 1;
D. according to delivery time that be provided with and each subsystem communication, send byte number, receive that byte number information is finished and each subsystem between data information exchange, finish the realization of classical pid control algolithm simultaneously;
E. export according to the data computation result and transfer wide ripple signal;
F. form each subsystem accepting state sign;
G. return the c step.
The vhdl program flow diagram that programmable logic device (PLD) 7 is worked out in advance is as follows:
A; Reset, make programmable logic device (PLD) 7 each logical block modules in running order;
B: connect the look-at-me of serial ports, send the look-at-me of dsp then according to the look-at-me of serial ports, the read-write control signal and the address signal that receive dsp are deciphered, and send the control signal of each subsystem according to the result of decoding;
C: house dog 2 protections that realize the protection of parallel interface signal, serial line interface signal and transfer wide ripple signal, wide ripple signal is transferred in output.
Claims (3)
1. a universal embedded servo controller is characterized in that comprising controller (1), house dog (2), A/D converter (3), parallel communication mouth (4), serial communication interface (5), serial interface chip (6), programmable logic device (PLD) (7), first driving circuit (8), second driving circuit (9); The reset signal output terminal of house dog (2) links to each other with the reset signal input end of controller (1); The data line output terminal of A/D converter (3) links to each other with general digital io end with the data line input end of controller (1) respectively with the conversion and control input end; The data line I/O end of parallel communication mouth (4) links to each other with the data line I/O end of controller (1); The data line I/O end of serial communication interface (5) links to each other with controller (1) data line I/O end, and the data line I/O end of serial communication interface (5) links to each other with the data line I/O end of serial interface chip (6); The data line I/O end of programmable logic device (PLD) (7), address wire output terminal, read signal output terminal, write signal input end, chip selection signal input end, look-at-me output terminal, reset signal input end link to each other with data line I/O end, address wire input end, read signal input end, write signal output terminal, chip selection signal output terminal, look-at-me input end, the reset signal output terminal of controller (1) respectively; The wide ripple signal output part of the accent of programmable logic device (PLD) (7) links to each other with the wide ripple signal input part of the accent of first driving circuit (8); The wide ripple signal output part of the accent of controller (1) transfers wide ripple signal input part to link to each other with second driving circuit (9); The read signal of programmable logic device (PLD) (7), write signal, chip selection signal output terminal link to each other with A/D converter (3), the read signal of parallel communication mouth (4), write signal, chip selection signal input end respectively, and the read signal of programmable logic device (PLD) (7), write signal, chip selection signal, look-at-me output terminal link to each other with read signal, write signal, chip selection signal, the look-at-me input end of serial communication interface (5) respectively.
2. according to the described universal embedded servo controller of claim 1, it is characterized in that it is the digital signal processor of TMS320F2812 that controller (1) adopts model, it is AD7864 that A/D converter (3) adopts model, it is C8255A that parallel communication mouth (4) adopts model, it is ST16C554 that serial communication interface (5) adopts model, it is EPM3064A100 that programmable logic device (PLD) (7) adopts model, it is MAX706T that house dog (2) is adopted model, first driving circuit (8) comprises 3 driving interface, second driving circuit (9) comprises two driving interface, the model of driving interface is SN74ALS244A, and it is SN75174 that serial interface chip (6) adopts model, two chip blocks of SN75175.
3. according to the described universal embedded servo controller of claim 1, it is characterized in that finishing the data that receive the outside, and data carried out computing output transfer the controller (1) of wide ripple to comprise according to the program of establishment in advance:
Judge whether digital sample interrupt response sign equals 1 device;
According to delivery time that be provided with and each subsystem communication, send byte number, receive that byte number information is finished and each subsystem between data information exchange, finish the device that classical pid control algolithm realizes simultaneously;
Export the device of transferring wide ripple signal according to the data computation result;
Form the device of each subsystem accepting state sign;
Finish logic control between controller (1) and the peripheral hardware and transfer the programmable logic device (PLD) (7) of wide ripple output protection to comprise according to the program of establishment in advance:
Be used to receive the look-at-me of serial ports, and send the device of dsp look-at-me according to the look-at-me of serial ports;
Be used to receive the go forward side by side code translator of row decoding of the read-write control signal of dsp and address signal;
Be used for sending the device of the control signal of each subsystem according to the result of decoding;
Be used to realize the parallel interface holding circuit of parallel interface signal protection;
Be used to realize the serial line interface holding circuit of interface signal protection;
Be used to realize transferring the house dog protection of wide ripple signal, the device of wide ripple signal is transferred in output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100112412A CN100368943C (en) | 2004-11-19 | 2004-11-19 | Embedded type general servo controller |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100112412A CN100368943C (en) | 2004-11-19 | 2004-11-19 | Embedded type general servo controller |
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| CN1728018A CN1728018A (en) | 2006-02-01 |
| CN100368943C true CN100368943C (en) | 2008-02-13 |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101860296A (en) * | 2010-04-29 | 2010-10-13 | 北京航天控制仪器研究所 | Servo motion control device based on floating-point DSP |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61103205A (en) * | 1984-10-25 | 1986-05-21 | Mitsubishi Electric Corp | Servo controller |
| JPS6243702A (en) * | 1985-08-21 | 1987-02-25 | Hitachi Seiko Ltd | Servo controller |
| JPH08237994A (en) * | 1995-02-28 | 1996-09-13 | Mitsubishi Heavy Ind Ltd | Servo controller |
| JPH10254814A (en) * | 1997-03-11 | 1998-09-25 | Canon Inc | Peripheral controller |
| US6237479B1 (en) * | 1997-03-31 | 2001-05-29 | Komatsu Ltd. | Servo press controller |
| CN1348121A (en) * | 2000-10-12 | 2002-05-08 | 德维森实业(深圳)有限公司 | Soft logic controller (PPC) based on embedded real-time operation system |
-
2004
- 2004-11-19 CN CNB2004100112412A patent/CN100368943C/en not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61103205A (en) * | 1984-10-25 | 1986-05-21 | Mitsubishi Electric Corp | Servo controller |
| JPS6243702A (en) * | 1985-08-21 | 1987-02-25 | Hitachi Seiko Ltd | Servo controller |
| JPH08237994A (en) * | 1995-02-28 | 1996-09-13 | Mitsubishi Heavy Ind Ltd | Servo controller |
| JPH10254814A (en) * | 1997-03-11 | 1998-09-25 | Canon Inc | Peripheral controller |
| US6237479B1 (en) * | 1997-03-31 | 2001-05-29 | Komatsu Ltd. | Servo press controller |
| CN1348121A (en) * | 2000-10-12 | 2002-05-08 | 德维森实业(深圳)有限公司 | Soft logic controller (PPC) based on embedded real-time operation system |
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