Adaptive brightness logic control waveform generating method for AC plasma display
Technical Field
The invention relates to logic control in a gas discharge technology, in particular to a method for generating a logic control waveform of an alternating current plasma display with static image detection and self-adaptive brightness control functions.
Background
An alternating current Plasma Display (AC Plasma Display Panel) realizes image Display by using gas discharge, and has great competitiveness in the field of large-screen flat Panel Display. At present, the AC PDP generally uses a multi-subfield technique to realize multi-gray scale display of an image, that is, a frame of an image is divided into a plurality of subfields to be displayed, different subfields have different weights, and subfields with different weights correspond to different luminance weights (corresponding to the number of times of a sustain discharge pulse in circuit implementation).
In a display device that implements multiple gray levels using the sub-field technique, image distortion called Dynamic False Contour (Dynamic False Contour) occurs. The reasons for the dynamic false contour are caused by the sub-field technology and the negative effect of the integration effect of human eyes.
Various methods have been proposed to reduce the effect of dynamic false contours on image display, including adaptive brightness control methods, division-by-weight sub-field methods, adjustment of sub-field display order methods, compensation pulse methods, error diffusion methods, etc. The different methods have their advantages and disadvantages. The self-adaptive brightness control method adjusts the number of sub-fields and the number of sub-field pulses according to the brightness level of the image, and has obvious advantages in reducing dynamic false contours and increasing image display contrast.
Based on the sub-field separation display technology, the basic principle of the self-adaptive brightness control is as follows: counting the brightness levels of a plurality of previous frame images, and grading the brightness levels; when the average brightness level of the statistical picture is lower, the number of sub-fields of the current frame is reduced, and the total number of luminous pulses can be increased; at this time, since the average luminance level is low, the dynamic false contour phenomenon is not obvious, and the contrast of the image can be enhanced by increasing the total number of the light-emitting pulses. On the contrary, when the average brightness level of the statistical picture is higher, the number of the sub-fields of the current frame is increased; the number of the sub-fields is increased, and because the time of the initial period, the addressing period and the erasing period in each sub-field is not changed, the total time of the maintaining period is inevitably reduced, the total maintaining pulse number is further reduced, and the image brightness level of the current frame is reduced. Meanwhile, the increase of the number of the sub-fields enables the weight of each sub-field under the same gray scale level to be uniformly distributed, so that the dynamic false contour phenomenon is effectively inhibited fundamentally.
In the field of AC PDP display devices, the adaptive brightness control method is mainly implemented by generating corresponding logic control waveforms. The traditional self-adaptive brightness control method divides the brightness level of the image into a plurality of grades, each grade corresponds to a sub-field mode, and the logic control waveform data of each sub-field mode is stored in a memory; the sub-field mode of the current frame image is determined by the statistical result of the brightness level of the previous frames of images, and then a corresponding waveform data memory is selected to obtain a corresponding logic control waveform. Thus, the multiple memories inevitably occupy a lot of logic resources, and it is also very complicated to design or modify the waveform.
Meanwhile, in the conventional adaptive brightness control method, the highest bit of the waveform data (binary number in this case) in the waveform data memory is set as a waveform state delay flag to determine whether the waveform data is a waveform state or a delay of the waveform state. Thus, some corresponding modules must be added to the waveform address generation module to determine and process the waveform data. This is also not advantageous for designing and modifying the logic control waveform.
In addition, in the traditional adaptive brightness control method, the waveform state data of the preparation period, the addressing period, the maintaining period and the erasing period in the sub-field are continuously stored, and no interval exists in the middle; in the design, if one or more logic control waveform state data are added or subtracted, the sequence numbers of all the following waveform state data need to be adjusted. This is very disadvantageous for fast design and adjustment of the logic control waveform.
In addition, the conventional adaptive brightness control method does not have a still image detection function, and if the displayed image is a still image which lasts for a long time, the phosphor at a higher brightness (for example, a white area) is rapidly aged or even damaged due to continuous lighting for a long time, which is very disadvantageous to the life of the AC PDP.
Disclosure of Invention
The invention aims to provide an AC PDP self-adaptive brightness logic control waveform generation method, namely, a sub-field display mode (comprising the number of sub-fields and the number of maintaining pulses) of the next frame of image is dynamically adjusted according to the brightness level of a plurality of previous frames of images, a logic control waveform is generated by looking up a table and controlling time delay, and a static image detection function is added, so that the AC PDP self-adaptive brightness logic control waveform generation method can be conveniently used as an embedded system to be directly applied to an AC PDP control system, and an image display control function for inhibiting a dynamic false contour phenomenon and enhancing the image contrast and a protection function for a display screen are realized.
In order to realize the purpose, the invention adopts the technical scheme that:
the invention relates to a method for generating AC PDP self-adaptive brightness logic control waveform, which introduces a static image detection module 100, an image brightness statistic module 200 and a drive control signal generation module 300;
the static image detection module 100 analyzes a plurality of frames of images, judges whether the displayed image is a static image, and sends the judgment result to the image brightness statistic module 200; the image brightness statistic module 200 first determines the result from the static image detection module 100, and if the result is a static image, the image brightness level code is gradually changed to a smaller value and sent to the driving control signal generation module 300; if the image is not a static image, counting the brightness level of each frame of image, calculating the brightness level code of the image, and sending the code to the driving control signal generation module 300; the driving control signal generating module 300 generates a corresponding control signal according to the luminance level coding of the image.
The static image detection module 100 performs statistics on image data of a plurality of sub-regions in a frame of image once per second, compares the coefficient with a predetermined value by calculating a correlation coefficient of statistical results of adjacent times, and indicates that the current image is not a static image if the coefficient is greater than the predetermined value, and indicates that the current image is a static image if the coefficient is less than the predetermined value.
The image brightness statistic module 200 first determines the detection result sent by the static image detection module 100, and if the current image is a static image, adds 1 to the current brightness level code to reduce the number of sustain pulses, thereby reducing the display brightness of the image, so as to protect the display screen when the static image is displayed; if the current image is not a static image, normal adaptive brightness control is performed, that is, several frames of image data are counted, the average brightness level is calculated, and a code corresponding to the brightness level is given, and the code is output to the driving control signal generation module 300.
The driving control signal generating module 300 determines the number of subfields according to the luminance level code sent from the image luminance counting module 200, and reads the sustain pulse number of the current subfield from the subfield sustain pulse number storage 330 according to the number of subfields and the sequence number of the current subfield; the logic control waveform address generating module 310 generates the searching addresses of the waveform state data memory 340 and the subfield waveform state delay memory 350 according to the logic sequence; the data read out from the waveform state data memory 340 is output data, that is, combination data of the respective control signals; the data read from the subfield waveform state delay memory 350 is sent to the waveform state delay expansion judging module 320, the waveform state delay expansion judging module 320 counts the data by subtraction, when the count value is zero, the flag of allowing address change is sent to the logic control waveform address generating module 310, and then the logic control waveform address generating module 310 determines the search addresses of the waveform state data memory 340 and the subfield waveform state delay memory 350 at the next moment; the logic control waveform state data of the preparation period, the address period, the sustain period and the erase period in one subfield are stored in a segmented manner, wherein the logic control waveform state data are stored in the waveform state data memory 340.
Storing the logic control waveform states of a preparation period, an addressing period, a maintaining period and an erasing period in a sub-field in a segmented mode respectively; and determining the number of sub-fields and the number of sub-field sustaining pulses of the current frame of image signal according to the brightness statistical characteristics of a plurality of frames of image signals, and generating corresponding logic control waveforms through a lookup table.
The method can be realized by adopting a middle-low end FPGA chip, and can be realized only by a corresponding VHDL language program and a corresponding image data processing program.
The invention uses very little logic resource to realize the more complex image self-adaptive brightness control function and static image protection function, and adopts a sectional and parameterized waveform state storage structure, so that the control waveform design is flexible and simple. The method has positive significance for shortening the development period of AC PDP control waveform design and effectively reducing development cost.
Drawings
FIG. 1 is a relational block diagram of constituent modules of the present invention;
FIG. 2 is a schematic diagram of a detection area of a still image detection module;
FIG. 3 is a block diagram of the internal structure of the image brightness statistic module;
FIG. 4 is a block diagram of a counting module in the image brightness statistic module;
fig. 5 is a block diagram of a structure of a driving control signal generating module;
FIG. 6 is a schematic diagram of a data storage structure in a sub-field waveform status data memory, wherein the abscissa represents time and the ordinate represents the address of the memory;
the present invention will be described in further detail with reference to the accompanying drawings.
Detailed Description
Referring to fig. 1 and 5, relationships between modules are illustrated. The static image detection module 100 analyzes a plurality of frames of images, judges whether the displayed image is a static image, and sends the judgment result to the image brightness statistic module 200; the image brightness statistic module 200 first determines the result from the static image detection module 100, and if the result is a static image, the image brightness level code is gradually changed to a smaller value and sent to the driving control signal generation module 300; if the image is not a static image, counting the brightness level of each frame of image, calculating the brightness level code of the image, and sending the code to the driving control signal generation module 300; the driving control signal generating module 300 generates a corresponding control signal according to the luminance level coding of the image.
As shown in fig. 2, M × N square sub-regions are extracted from one frame of image, and the image data in these sub-regions is used as a detection sample region of the still image detection module 100. The still image detection module 100 does this every t seconds (e.g., 1 second)And carrying out primary statistics on the image data of the M multiplied by N sub-regions respectively, storing the corresponding M multiplied by N statistical values in a group of registers, and setting two groups of registers to store the statistical results of two adjacent times. Suppose that the two adjacent statistics are { a } 1 ,a 2 ,…,a m And { b }and 1 ,b 2 ,…,b m (where M = M × N), its correlation coefficient is calculated for two statistics:
comparing the correlation coefficient with a preset value r, if y is more than r, indicating that the image is not static but is changed, and outputting a result '0'; if y < r, it means that the two frames of images are relatively still, i.e. the current image is a still image, then the result '1' is output.
The image brightness statistic module 200 reads the result sent by the still image detection module 100 every t seconds (e.g. 1 second), and if n '1's are read continuously, that means the current image is a still image, at this time, the brightness level code is gradually increased to a predetermined value (e.g. adding '1' every t seconds), and the display enters into the brightness protection mode; when the result sent from the static image detection module 100 is read as '0', indicating that the image is moving, the normal adaptive brightness control mode is entered, i.e. the brightness levels of a plurality of frames of images are counted, the brightness level code of the image is calculated, and the calculated brightness level code is sent to the logic control waveform address generation module 310 in the driving control signal generation module 300.
A logic control waveform address generating module 310, which is connected with the subfield waveform state data memory, sets the start address and end address mark signals of the preparation period, the addressing period, the maintaining period and the erasing period respectively, and generates the control signal waveform of each stage according to the marks. The logic control waveform address generating module B reads the data in the subfield sustain pulse number memory according to the image brightness level coding signal, thereby generating the periodic pulse of the sustain period. Meanwhile, the module determines whether to convert the waveform to the next waveform state according to the output of the waveform state delay expansion judging module.
A subfield sustain pulse number memory 330 for storing different sustain pulse numbers in various subfield modes corresponding to the encoding of the luminance level of the image.
A sub-field waveform state data memory 340 stores the various states of the logic control waveform, the output of which is also the output of the present system. The table is stored in different physical address fields according to the waveform states of four stages, namely a preparation period, an addressing period, a maintenance period and an erasing period, and a certain space is reserved among the fields for use when the waveform state is modified in the future.
A waveform state delay memory 350 for storing delay data of each different waveform state in one-to-one correspondence with data in the subfield waveform state data memory.
A waveform state delay spread judgment module 320, which generates a waveform state delay spread judgment signal according to the output of the waveform state delay memory.
Referring to fig. 3, the principle of the image brightness statistic module 200 is illustrated. The image processing device comprises an image counting module Counter, four 8-bit shift registers Dff and an adder. The counting module Counter counts all the sub-pixels in each frame of image signal according to bits (generally, the higher two bits can be counted), and performs weighted summation operation to output 8-bit counting results; the four shift registers Dff are cascaded and shifted at the falling edge of the field synchronizing signal; the ADDer addr performs arithmetic mean operation on the outputs of the four Dff to obtain a statistical result APL; the Control module Control detects the result Flag sent by the static image detection module, judges whether continuous '1' appears, if so, the image is a static image, and then gradually increases the current APL value to a preset value and outputs the preset value; if no consecutive '1's occur, the APL is output, i.e., the image brightness level coding APL _ out.
Referring to fig. 4, the principle of the image Counter module Counter is explained. In the figure, R7]、G[7..0]、 B[7..0]Representing the 8-bit binary numbers of the three primary colors red, green and blue, respectively, that make up the image, which numbers may represent the gray scale values of the three primary colors red, green and blue. While for an 8-bit binary number, the highest two bits can represent 75% of its gray value, so for R7]、G[7..0]、B[7..0]The high two bits are counted, so that the brightness level of the image can be basically represented, and the structure is simple. Assume that the resolution of the image is m * The luminance of the N, 1 frame image is divided into L luminance levels, and the counter CountH and the counter CountL are respectively an addition counter of N system and 2N system, where N = m * n/L; respectively to R < 7..0]、G[7..0]、 B[7..0]The carry terminal c is used as the counting input of the counter CountS in the following. When the counter CountH counts to N, its output carry terminal c changes from '0' to '1'; detecting a carry end c of CountH by the counter CountS at the rising edge of the clock, counting when c is detected to be '1', and not counting if not; due to different weights, countH is an N-ary counter, and CountL is a 2N-ary counter; the ADDer addr sums and outputs the counting results of the 6 counters CountS, and the luminance level of the statistical image is obtained.
Referring to fig. 5, the principle of the driving control signal generating module is explained. In the driving control signal generating module 300, the logic control waveform address generating module 310 determines the number of subfields according to the image brightness level code sent from the image brightness statistics module 200, and reads the sustain pulse number of the current subfield from the subfield sustain pulse number memory 330 according to the number of subfields and the sequence number of the current subfield; the logic control waveform address generating module 310 generates the search addresses of the waveform state data memory 340 and the sub-field waveform state delay memory 350 according to a certain logic sequence; the data read out from the waveform state data memory 340 is output data, that is, combination data of the respective control signals; the data read from the subfield waveform state delay memory 350 is sent to the waveform state delay extension judging module 320, the waveform state delay extension judging module 320 counts the data in a subtraction manner, when the count value is zero, the flag of the allowed address change is sent to the logic control waveform address generating module 310, and then the logic control waveform address generating module 310 determines the address to be searched of the waveform state data memory 340 and the subfield waveform state delay memory 350 at the next moment.
Referring to fig. 6, the principle of the logic control waveform address generation module is illustrated. First, the driving waveform of each subfield is divided into four periods, a setup period, an address period, a sustain period, and an erase period, respectively. The control waveform data for each period is stored in a continuous storage space in the waveform state data memory 340, and the addresses of the periods are neither overlapping nor adjacent, with a reserved storage space therebetween, so as to facilitate the addition or subtraction of the control waveform state in one of the waveform periods and the modification of the waveform data for the other waveform periods. The ordinate in fig. 6 is the value of an address counter in the logic control waveform address generation module, which starts counting from the setup period start address of each subfield, and one until the setup period end address; when the value of the address counter is equal to the end address of the preparation period, assigning the start address of the addressing period to the address counter, and then counting the address counter from the address until the end address of the addressing period; when the value of the address counter is equal to the address of the end of the addressing period, the address counter is given the address counter of the start address of the sustain period and counts the sub-field counter, and then the address counter continues counting from the address until the address of the start address of the periodic pulse. Since the intermediate sustain pulse has periodicity in the sustain period, it is sufficient that the control waveform data generating the periodic pulse is stored for only one period. The address counter starts address counting from the periodic pulse, and when the address is equal to the end address of the periodic pulse, the address counter counts the maintaining pulse counter; at this time, if the value of the sustain pulse counter is equal to the current subfield sustain pulse number read from the subfield sustain pulse number memory 330 at the beginning of a subfield, the address counter continues counting until the sustain period end address, otherwise, the address counter jumps to the periodic pulse start address to recount. When the value of the address counter is equal to the address of the end of the maintenance period, the address counter jumps to the address of the start of the erasing period to count until the address of the end of the erasing period. When the value of the address counter is equal to the end address of the erasing period, if the value of the sub-field counter is equal to the number of sub-fields of the field sent by the image brightness counting module 200, the address counter keeps the current value, otherwise, the address counter jumps back to the start address of the preparation period, and the generation of the control waveform of the next sub-field is continued.
The operation principle of the whole system will be explained below with the logic control waveform address generating module 310 (address generating module for short) as the core. The static image detection module 100 detects whether the current image is relatively static, and sends the detection result to the image brightness statistic module 200; the image brightness statistic module 200 counts the brightness levels of the previous several field images, and sends the brightness codes to the logic control waveform address generation module 310 for controlling the display mode of the current field, including the number of sub-fields and the number of sustain pulses; the address generating module starts to work at the rising edge of the field synchronizing signal, generates an initial address, namely a preparation period starting address, and receives the brightness code sent by the image brightness counting module 200; then sequentially generating control waveform addresses of a preparation period; jumping the address to the start address of the addressing period when the preparation period is finished, and then sequentially generating control waveform addresses of the addressing period; before the addressing period is finished, the address generation module reads the number of the sustaining pulses of the sub-field from the sub-field sustaining pulse number memory according to the statistical result of the image brightness statistical module 200, and the number is used as the initial counting value of the sustaining pulses in the sustaining period; when the addressing period is finished, the address generating module jumps the address to the starting address of the maintenance period; the maintaining period is characterized in that an irregular wide pulse is respectively arranged at the front and the back, and a plurality of pulses in the middle are periodic pulses, so that the waveform is divided into three sections for storage; also, after the sustain period ends, a control waveform address for the erase period is generated. The control waveform data is output from the subfield waveform state data memory, wherein the delay length of each waveform state is represented by a corresponding value in the waveform state delay memory. The waveform state delay expansion judging module counts the value in a subtraction mode, when the count is 0, the output delay ending judging signal ext _ end is 1, and the address generating module allows the generation of the next control waveform address only when the signal is 1. Thus, by the same control method, an ideal AC PDP logic control waveform having an adaptive brightness control function can be generated as long as the data in the memories 330, 340, 350 is adjusted.