CN100362452C - User operation blocking device and method - Google Patents
User operation blocking device and method Download PDFInfo
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- CN100362452C CN100362452C CNB2005100348186A CN200510034818A CN100362452C CN 100362452 C CN100362452 C CN 100362452C CN B2005100348186 A CNB2005100348186 A CN B2005100348186A CN 200510034818 A CN200510034818 A CN 200510034818A CN 100362452 C CN100362452 C CN 100362452C
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Abstract
The present invention provides a blockage device operated by users, which comprises a detection unit, a logic control circuit and a switch element, wherein the detection unit outputs a voltage indication signal according to the size of voltage output by a power supply system and a basic indication signal output by system core. The logic control circuit outputs a switch signal according to an external power supply signal output by the power supply system, a system model signal output by the system core and a voltage indication signal. The switch element decides whether the system core and an input device are switched on or are not switched on according to the switch signal.
Description
[Ji Intraoperative field]
The invention relates to a kind of user's operating blocking-up device and method, and particularly relevant for a kind of when the undertension user's operating blocking-up device and the method for protection system.
[Bei Jing Ji Intraoperative]
In now general electronic installation, its central processing unit or microprocessor are understood command system usually and are entered park mode to save electric power when detecting the brownout of power supply or battery.In addition, the device that has entered park mode also can face undertension after long standby.
When being in park mode and power source voltage, system crosses when low, the user is via any action of button, switch and plug-in card or the like during waken system, because it is low that system voltage has passed through, might be when system start-up or after starting soon, the incident that generation systems fault or data are lost.
In order to solve the above problems; previous method is to have added one deck protective device in system; promptly be utilize another independently microprocessor detect the operation that power source voltage or dump energy determine whether blocking the user via voltameter modes such as (gas gauge); allow system not be waken up, the incident that the system that makes is unlikely to break down or data are lost.
But utilize another independently microprocessor and voltameter, not only circuit is comparatively complicated, and the cost that is spent is higher, and power consumption is also very high, so must continuation be improved.
[summary of the invention]
Purpose of the present invention is providing a kind of user's operating blocking-up device exactly; replacing previous independently microprocessor and voltameter, and reach the identical function of protection system and data, not only can more save cost; more can save the power consumption of circuit, circuit design is also more simplified.
A further object of the present invention provides a kind of user and operates blocking-up method, and replacing prior art, its advantage is for more to save cost than prior art, and can reach the identical function of protection system and data.
The present invention proposes a kind of user's operating blocking-up device, comprising detecting unit, logic control circuit and on-off element.
The basic indicator signal that the voltage swing that detecting unit is exported according to power-supply system and the system core are exported, decision output voltage indicator signal.And detecting voltage device, first phase inverter and the first logic lock have more been comprised in the detecting unit.
The voltage swing exported according to power-supply system of detecting voltage device wherein, and output voltage detection signal to the first phase inverter anti-phase in addition after, export a reverse voltage detection signal, and via the first logic lock reverse voltage detection signal that receives is carried out the logical OR computing with basic indicator signal again, and the output voltage indicator signal is to logic control circuit.
The external power source signal that logic control circuit reception power-supply system is exported, system model signal and the voltage instruction signal that the system core is exported are exported a switching signal.And more comprise second phase inverter in the logic control circuit, postpone the flip-flop and the second logic lock.
Its second phase inverter with the external power source signal that received and in addition anti-phase after, export an anti-phase external power source signal to postponing flip-flop, receive anti-phase external power source signal and voltage instruction signal and postpone flip-flop, and export a reference signal, at last reference signal and the system model signal that is received carried out the logical OR computing, and export a switching signal to on-off element by the second logic lock.
Decide the whether conducting of the system core and input media via on-off element according to switching signal again.
The present invention also proposes a kind of user and operates blocking-up method, the voltage swing that its step is exported according to power-supply system, produce the detecting voltage signal, and with the detecting voltage signal anti-phase in addition after, the result who produces a reverse voltage detection signal and the basic indicator signal that reverse voltage detection signal and the system core are exported is carried out the logical OR computing is as this voltage instruction signal.
Afterwards the external power source signal of exporting according to power-supply system again and in addition anti-phase after, produce an anti-phase external power source signal, then again according to anti-phase external power source signal and voltage instruction signal, produce a reference signal.
Wherein when anti-phase external power source signal was in logic low potential, then reference signal was in logic high potential, and when voltage instruction signal transferred logic high potential to by logic low potential, then reference signal was in logic low potential.
The system model signal that reference signal and the system core are exported carries out the logical OR computing at last, and produces switching signal, and decides the whether conducting of the system core and input media by switching signal.
Therefore the present invention compares with prior art because of adopting separate microprocessor and the voltameter that above-mentioned apparatus and method need not be traditional, can be more simple on circuit design, and save cost, more can save required electric weight.
For making purpose of the present invention, structural attitude and function thereof are had further understanding, conjunction with figs. is described in detail as follows now:
[description of drawings]
Fig. 1 is the circuit block diagram according to a kind of user's operating blocking-up device of a preferred embodiment of the present invention.
Fig. 2 is for operating the process flow diagram of blocking-up method according to a kind of user of a preferred embodiment of the present invention.
[embodiment]
Please refer to Fig. 1, it illustrates the circuit block diagram according to a kind of user's operating blocking-up device of a preferred embodiment of the present invention.The circuit of this user's operating blocking-up device comprises detecting unit 106, logic control circuit 108 and on-off element 110.
The size of the voltage 130 that detecting unit 106 is exported according to power-supply system 102 and the basic indicator signal 132 that the system core 104 is exported, through after the inter-process, output voltage indicator signal 134.And detecting voltage device 114, first phase inverter (inverter) 116 and the first logic lock (logic gate) 118 have more been comprised in the detecting unit 106.The first logic lock 118 is or door (OR gate) in the present embodiment, but the present invention is not limited to or door.
The voltage instruction signal 134 that the external power source signal 136 that 108 receptions of logic control circuit power-supply system 102 is exported, the system model signal 138 that the system core 104 is exported and detecting unit 106 are exported is exported a switching signal 140 then.And more comprise second phase inverter 120 in the logic control circuit 108, postpone flip-flop (D flip-flop) the 122 and second logic lock 124.The second logic lock 124 is or door in the present embodiment, but the present invention is not limited to or door.
On-off element 110 decides whether conducting of the system core 104 and input media 112 according to switching signal 140.In the present embodiment, on-off element 110 is a N passage metal-oxide-semiconductor field effect t (N-MOSFET), but the present invention is not limited to N passage metal-oxide-semiconductor field effect t.Wherein when switching signal 140 is logic high potential, on-off element 110 can the conducting system cores 104 and input medias 112, and when switching signal 140 be logic low potential, on-off element 110 can turn-off the system cores 104 and input medias 112.In addition, input media 112 is button, switch, card slot (card slots) or cable joint (cableconnecters) in the present embodiment, but the present invention is not limited to the input media of above kind.
The size of the voltage 130 that the detecting voltage device 114 in the above-mentioned detecting unit 106 is exported according to power-supply system 102, and output voltage detection signal 142 to first phase inverters 116.In the present embodiment, when voltage 130 during more than or equal to first predeterminated voltage, the detecting voltage signal 142 of detecting voltage device 114 meeting output logic noble potentials, when voltage 130 during less than first predeterminated voltage, the detecting voltage signal 142 of detecting voltage device 114 meeting output logic electronegative potentials, and first predeterminated voltage is 3.4 volts.And first phase inverter 116 can be with detecting voltage signal 142 in addition anti-phase after, export a reverse voltage detection signal 144, and via the first logic lock 118 reverse voltage detection signal 144 that is received and the basic indicator signal 132 that the system core 104 is exported are carried out the logical OR computing again, and output voltage indicator signal 134 is to logic control circuit 108.In the present embodiment, basic indicator signal 132 is in logic low potential during more than or equal to second predeterminated voltage at voltage 130, be in logic high potential at voltage 130 during less than second predeterminated voltage, and second predeterminated voltage is 3.3 volts.
Second phase inverter 120 in the logic control circuit 108 will receive the external power source signal 136 of power-supply system 102, and with external power source signal 136 in addition anti-phase after, export an anti-phase external power source signal 146 to postponing flip-flop 122.Postpone flip-flop 122 and receive anti-phase external power source signal 146, receive the voltage instruction signal 134 that detecting unit 106 is exported with the CK input end that receives clock signal with the PRESET input end, and in reference signal 148 of Q output terminal output.At last the system model signal of the reference signal 148 that received and the system core 104 being exported by the second logic lock 124 138 carries out the logical OR computing, and exports a switching signal 140 to on-off element 110.
The detail operations of present embodiment is described with various situations below.At first, when external power source is supplied, external power source signal 136 can be in logic high potential, make the PRESET termination that postpones flip-flop 122 receive logic high potential, therefore postpone the reference signal 148 that the Q output terminal of flip-flop 122 can the output logic noble potential, make the switching signal 140 of the second logic lock, 124 output logic noble potentials.On-off element 110 is understood the conducting system cores 104 and input medias 112 at this moment, and the user that the system core 104 can be received from input media 112 operates.
If system does not connect external power source, external power source signal 136 can enter logic low potential.The voltage of system is the battery supplied by inside at this moment, therefore can be along with the time reduces gradually.
Whether no matter external power source arranged, need only system voltage more than the 3rd predeterminated voltage (in the present embodiment being 3.2 volts), system just can enter normal mode (run mode).When normal mode, system model signal 138 can be in logic high potential, therefore the switching signal 140 of the second logic lock, 124 meeting output logic noble potentials makes the on-off element 110 conducting system cores 104 and input medias 112, makes the system core 104 can receive user's operation.
When normal mode, if system voltage drops to below the 3rd predeterminated voltage, the system core 104 built-in electricity-saving mechanisms (power preservation scheme) will allow system enter park mode (suspension mode) automatically.After entering park mode, system model signal 138 can and then enter logic low potential.By the explanation of back as can be known, this moment, on-off element 110 turn-offed because system voltage is low excessively, removed disconnected external power source, get out of the way to close element 110 and recover conductings, otherwise user's operation can not waken system.So just reached the purpose of protection system when undertension.
Except system enters the park mode automatically, also can order to make system to enter park mode by the user.Before system entered park mode, if after system voltage more than first predeterminated voltage (is 3.4 volts at present embodiment), entered park mode, on-off element 110 can not turn-off, the system core 104 can also receive that the user operates.
Yet, before entering park mode, if system voltage is from more than first predeterminated voltage, drop to below first predeterminated voltage, the detecting voltage signal 142 of detecting voltage device 114 outputs can enter logic low potential from logic high potential, through first phase inverter 116,, make the CK termination that postpones flip-flop 122 receive one by low and high pulse again through the first logic lock 118.Owing to postpone flip-flop 122 is that forward triggers (positive edge-triggered), and above-mentioned pulse meeting makes delay flip-flop 122 that the logic low potential of D input end is loaded into the Q output terminal, the reference signal 148 of output logic electronegative potential.If at this time the user orders to enter park mode, system model signal 138 can enter logic low potential.So far two of the second logic lock 124 input ends all are logic low potential, so switching signal 140 also is a logic low potential, make on-off element 110 turn-off, and operate isolated with the user system core 104.
In above-mentioned situation, if system enters before the park mode, system voltage is further from more than second predeterminated voltage (is 3.3 volts at present embodiment), drop to below second predeterminated voltage, basic indicator signal 132 can be gone up logic high potential from logic low potential, and holds one by low and high pulse for the CK that postpones flip-flop 122 through the first logic lock 118.As top explanation,, also can get out of the way and close element 110 shutoffs if enter park mode this moment.
When system is in park mode,,, also can reduce gradually in time even it is enough just to have begun system voltage if there is not external power source.At this time, as long as system voltage is higher than first predeterminated voltage and second predeterminated voltage, the CK end that postpones flip-flop 122 is confiscated pulse, and on-off element 110 just can not turn-off, and the user is random waken system just.But, as top explanation, in case system voltage drops to first predeterminated voltage or below second predeterminated voltage, because system model signal 138 has been in logic low potential, postpone the received pulse of CK end of flip-flop 122, will cause on-off element 110 to turn-off, the system core 104 can not waken up by user's operation.
No matter above-mentioned any situation, when on-off element 110 after park mode turn-offs, have only the connection external power source, just can make on-off element 110 recover conductings.As top explanation, connect after the external power source, external power source signal 136 can be gone up logic high potential from logic low potential, and through second phase inverter 120, delay flip-flop 122 and the second logic lock 124, make switching signal 140 go up logic high potential, also make on-off element 110 conductings.
Please refer to Fig. 2, it illustrates the process flow diagram of operating blocking-up method according to a kind of user of a preferred embodiment of the present invention.Its method at first voltage swing exported according to power-supply system of step s202 produces the detecting voltage signal through behind the device for detecting voltage, then s204 is in addition anti-phase and produce an anti-phase detecting voltage signal with the detecting voltage signal again, s206 carries out the logical OR computing with the basic indicator signal of anti-phase detecting voltage Signals ﹠ Systems core more afterwards, and then s208 produces voltage instruction signal.
In addition, s210 with the external power source signal anti-phase in addition after, and produce an anti-phase external power source signal, then s212 produces a reference signal according to anti-phase external power source signal and voltage instruction signal, s214 carries out the logical OR computing by the system model signal of the reference signal and the system core more afterwards, and then s216 produces switching signal of output, and last s218 decides the whether conducting of the system core and input media according to switching signal again.
Comprehensive the above, the present invention is because adopting the little processing of independence that above-mentioned apparatus and method need not be traditional Device and voltameter (gas gauge) are therefore compared with prior art, can be more simple on circuit design, And the saving cost, more can save the power consumption of circuit.
Claims (19)
1. user's operating blocking-up device is characterized in that this device comprises:
One detecting unit, the voltage swing of exporting according to a power-supply system, and the basic indicator signal exported of a system core are exported a voltage instruction signal;
One logic control circuit, a system model signal and this voltage instruction signal that an external power source signal, this system core of exporting according to this power-supply system exported are exported a switching signal; And
Whether one on-off element according to this switching signal, determines this system core of conducting and an input media.
2. user's operating blocking-up device as claimed in claim 1 is characterized in that: this detecting unit more comprises:
One detecting voltage device according to the voltage swing that this power-supply system is exported, is exported a detecting voltage signal;
One first phase inverter receives this detecting voltage signal, anti-phase in addition after, export a reverse voltage detection signal; And
One first logic lock according to this reverse voltage detection signal and this basic indicator signal, is exported this voltage instruction signal.
3. user's operating blocking-up device as claimed in claim 2, it is characterized in that: the voltage that this detecting voltage signal is exported in this power-supply system is in logic high potential during more than or equal to one first predeterminated voltage, and the voltage of exporting in this power-supply system is in logic low potential during less than this first predeterminated voltage.
4. user's operating blocking-up device as claimed in claim 3 is characterized in that: this first predeterminated voltage is 3.4 volts.
5. user's operating blocking-up device as claimed in claim 2 is characterized in that: this first logic lock is one or door, and this voltage instruction signal result of carrying out the logical OR computing for this reverse voltage detection signal and this basic indicator signal.
6. user's operating blocking-up device as claimed in claim 1, it is characterized in that: the voltage that this basic indicator signal is exported in this power-supply system is the output logic electronegative potential during more than or equal to one second predeterminated voltage, and the voltage of exporting in this power-supply system output logic noble potential during less than this second predeterminated voltage.
7. user's operating blocking-up device as claimed in claim 6 is characterized in that: this second predeterminated voltage is 3.3 volts.
8. user's operating blocking-up device as claimed in claim 1 is characterized in that: this logic control circuit more comprises:
One second phase inverter receives this external power source signal, anti-phase in addition after, export an anti-phase external power source signal;
One postpones flip-flop, according to this anti-phase external power source signal and this voltage instruction signal, export a reference signal, wherein when this anti-phase external power source signal is in logic low potential, this reference signal is in logic high potential, when this voltage instruction signal transferred logic high potential to by logic low potential, this reference signal was in logic low potential; And
One second logic lock according to this reference signal and this system model signal, is exported this switching signal.
9. user's operating blocking-up device as claimed in claim 8 is characterized in that: this second logic lock is one or door, and this switching signal result of carrying out the logical OR computing for this reference signal and this system model signal.
10. user's operating blocking-up device as claimed in claim 1, it is characterized in that: this system model signal system under this system core is in logic high potential when being in execution pattern, and the system under this system core is in logic low potential when being in park mode.
11. user's operating blocking-up device as claimed in claim 1, it is characterized in that: this system core of conducting and this input media when this on-off element is in logic high potential in this switching signal, and when this switching signal is in logic low potential, turn-off this system core and this input media.
12. user's operating blocking-up device as claimed in claim 1 is characterized in that: this on-off element is a N channel metal-oxide half field effect transistor.
13. a user operates blocking-up method, it is characterized in that this method comprises the following steps:
The voltage swing of exporting according to a power-supply system, and the basic indicator signal exported of a system core produce a voltage instruction signal; And
Whether a system model signal and this voltage instruction signal that an external power source signal, this system core of exporting according to this power-supply system exported determine this system core of conducting and an input media.
14. user as claimed in claim 13 operates blocking-up method, it is characterized in that: produce the step of this voltage instruction signal, more comprise the following steps:
According to the voltage swing that this power-supply system is exported, produce a detecting voltage signal;
With this detecting voltage signal anti-phase in addition after, produce a reverse voltage detection signal; And
The result who carries out the logical OR computing with this reverse voltage detection signal and this basic indicator signal is as this voltage instruction signal.
15. user as claimed in claim 14 operates blocking-up method, it is characterized in that: the voltage that this detecting voltage signal is exported in this power-supply system is in logic high potential during more than or equal to one first predeterminated voltage, and the voltage of exporting in this power-supply system is in logic low potential during less than this first predeterminated voltage.
16. user as claimed in claim 13 operates blocking-up method, it is characterized in that: the voltage that this basic indicator signal is exported in this power-supply system is the output logic electronegative potential during more than or equal to one second predeterminated voltage, and the voltage of exporting in this power-supply system output logic noble potential during less than this second predeterminated voltage.
17. user as claimed in claim 13 operates blocking-up method, it is characterized in that: whether determine more to comprise the following steps: the step of this system core of conducting and this input media
With this external power source signal anti-phase in addition after, produce an anti-phase external power source signal;
According to this anti-phase external power source signal and this voltage instruction signal, produce a reference signal, wherein when this anti-phase external power source signal is in logic low potential, this reference signal is in logic high potential, when this voltage instruction signal transferred logic high potential to by logic low potential, this reference signal was in logic low potential;
This reference signal and this system model signal are carried out the logical OR computing, produce a switching signal; And
According to this switching signal, whether determine this system core of conducting and this input media.
18. user as claimed in claim 17 operates blocking-up method, it is characterized in that: whether determine more to comprise the following steps: the step of this system core of conducting and this input media according to this switching signal
Be in logic high potential as if this switching signal, then this system core of conducting and this input media; And
If this switching signal is in logic low potential, then turn-off this system core and this input media.
19. user as claimed in claim 13 operates blocking-up method, it is characterized in that: this system model signal system under this system core is in logic high potential when being in execution pattern, and the system under this system core is in logic low potential when being in park mode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100348186A CN100362452C (en) | 2005-05-27 | 2005-05-27 | User operation blocking device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100348186A CN100362452C (en) | 2005-05-27 | 2005-05-27 | User operation blocking device and method |
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| Publication Number | Publication Date |
|---|---|
| CN1869875A CN1869875A (en) | 2006-11-29 |
| CN100362452C true CN100362452C (en) | 2008-01-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB2005100348186A Expired - Fee Related CN100362452C (en) | 2005-05-27 | 2005-05-27 | User operation blocking device and method |
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| CN (1) | CN100362452C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103972858A (en) * | 2013-01-30 | 2014-08-06 | 昆达电脑科技(昆山)有限公司 | Overcurrent protection device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5539910A (en) * | 1993-05-03 | 1996-07-23 | Siemens Aktiengesellschaft | Circuit configuration for monitoring the supply voltage of a processor unit |
| CN1357809A (en) * | 2000-12-05 | 2002-07-10 | 神达电脑股份有限公司 | Power source unit unblocking method |
| WO2004044719A2 (en) * | 2002-11-12 | 2004-05-27 | Freescale Semiconductor, Inc. | Low voltage detection system |
-
2005
- 2005-05-27 CN CNB2005100348186A patent/CN100362452C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5539910A (en) * | 1993-05-03 | 1996-07-23 | Siemens Aktiengesellschaft | Circuit configuration for monitoring the supply voltage of a processor unit |
| CN1357809A (en) * | 2000-12-05 | 2002-07-10 | 神达电脑股份有限公司 | Power source unit unblocking method |
| WO2004044719A2 (en) * | 2002-11-12 | 2004-05-27 | Freescale Semiconductor, Inc. | Low voltage detection system |
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|---|---|
| CN1869875A (en) | 2006-11-29 |
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