CH710661B1 - DC / DC converter and method for controlling a soft-switching DC / DC converter. - Google Patents

Abstract

A DC / DC converter according to the invention in the form of a step-down converter, step-up converter or inverter has a converter inductance (L) and an inductance short-circuit switch (Q3, Q4, D3, D4) which is connected in parallel to the converter inductance (L). The inductance short-circuit switch (Q3, Q4, D3, D4) can be controlled separately according to current directions. In a method according to the invention for operating the DC / DC converter, a time interval during which the inductance short-circuiting switch (Q3, Q4, D3, D4) is switched on is varied by a period duration or a switching frequency with which the DC / DC converter operates is going to keep, at least approximately constant. The switching operations are controlled in such a way that soft switching processes ("soft switching") result for all switching elements (Q1, Q2, Q3, Q4).

Description

description

Background Art The volume of construction of DC / DC converters, such as e.g. Buck converters, is significantly affected by the passive components, i. by the output inductance and the output capacitance. The task of the output filter is the low-pass filtering of the voltage generated by the switching stage of the converter; Accordingly, the bending frequency of the filter can be increased at higher switching frequency and thus the size of the filter elements can be reduced. However, the increase of the switching frequency is set by the frequency-increasing switching losses a limit. At high clock frequencies, therefore, soft-switching converters are preferably used which avoid the simultaneous occurrence of current and voltage of a switching element, i. Before switching on, reduce the voltage across the switch to zero (zero voltage turn-on) or, when switching off, use the parasitic capacitance of the switching elements as switch-off discharge capacitance so that the voltage rise across the switch is delayed and the current in the switching element is already interrupted before the voltage significant values achieved (zero voltage turn-off). Overall, this operation, characterized by negligible switching losses, is referred to as Zero Voltage Switching (ZVS).

Advantageously, ZVS is achieved by appropriate control of the basic converter structure, i. without auxiliary switch, reached. Such an operation is e.g. in Swiss patent application CH 0 480/10 and Swiss patent CH 701 856 (application number CH 1 451/09), and is characterized by a triangular waveform of the current in the buck converter inductance, the current being at the end of each switching period, i. at the end of the turn-off interval of the buck converter switch, having a slightly negative current. The adjustment of this current is made possible by an antiparallel to the free-wheeling diode switch (freewheeling switch), which is also turned on in the conducting interval of the diode, thus allowing a current control with low forward voltage drop or a reduction of the conduction losses (synchronous rectification). After switching off, the parasitic capacitance of the freewheeling switch or freewheeling diode is charged by the negative current, or the parasitic capacitance of the step-down switch (eg, a power MOSFET) is discharged and finally voltage zero at the step-down switch is reached, whereby the parasitic internal diode of the power -MOSFETs becomes conductive and the voltage is clamped to zero, whereby the buck converter switch or the power MOSFET at zero voltage, ie without losses, can be turned on and the current in the buck converter inductance increases again.

However, occurs by the triangular shape of the current in the buck converter inductance on a relatively high variation of the switching frequency over the operating range, since although the steepness of the rising and falling edge of the current are defined by the difference of input and output voltage or by the output voltage however, the peak value of the current is approximately equal to twice the output current average, thus resulting in a switching frequency variation determined directly by the output power. In particular, small current peak values occur at a low output power and thus very high switching frequencies due to the fixed current gradients. On the other hand, the switching frequency drops to low values at high powers.

To reduce the switching frequency variation is known to arrange a short-circuit switch on the buck converter inductance, which allows to maintain the slightly negative Umladestrom at the end of the turn-off for a longer period of time and thus to limit the increase of the switching frequency at low output powers. The switch, which is also referred to as a clamp switch or inductance short-circuit switch, is switched on simultaneously with the disconnection of the freewheeling switch and thus charges the parasitic capacitance of the freewheeling switch and the freewheeling diode hard to the output voltage, or hard discharges the parasitic capacitance of the clamp switch. The negative current of the output inductance then circulates through the clamp switch, across the inductance voltage is zero. This clamp interval stops when the clamp switch is turned off. The still negative current then charges the capacity of the freewheeling switch and freewheeling diode and the clamp switch or discharges the capacity of the buck converter switch in the form of a vibration until zero voltage across the buck converter switch occurs and the switch, as described above, turns on again at zero voltage can be. Overall, by increasing the length of the clamp interval, the switching frequency can be reduced, thus ensuring a lower switching frequency even at low output powers. However, the peak value of the current in the inductance increases since the local mean value of the current in the step-down inductance must be equal to the output current. It should be noted that the clamp switch here only has to be suitable for negative current flow, which is not mentioned in the literature.

Due to the free-wheeling switch, the step-down converter described above can also be used with inverse power flow direction, i. be operated with a negative average current in the inductance. It then change freewheel and buck converter switch their function, and there is a total boost converter operation, since now indeed power is supplied from the low output voltage to the higher input voltage. Overall, therefore, there is a bidirectional DC / DC converter. The clamp switch must accordingly carry currents in both directions and block voltages in both directions, i. it is a four-quadrant switch provided. When this switch is driven in the form described above, i. both transistors are turned on at the same time as the freewheeling switch, as mentioned above, an immediate discharge of the parasitic capacitance of the clamp switch and a sudden discharge of the parasitic capacitance of the buck converter switch from the full input voltage to the difference of input and output voltage and a sudden charge the output capacitance of the freewheel scarf age on the output voltage. As a result, switch losses are caused and thus limits the aforementioned switching frequency increase total, or causes electromagnetic interference.

The object of the invention is therefore to provide a DC / DC converter and a method for its control, so that soft switching is possible for deep or Hochsetzstellerbetrieb.

The DC / DC converter may be implemented in the form of a buck converter, boost converter or inverter converter and has a Wandlerinduktivität, and a Induktivitätskurzschlussschalter, which is connected in parallel to the Wandlerinduktivität, and which is separately controllable according to current directions.

"Separated according to current directions" means, for example, that are present as part of the Induktivitätskurzschlussschalters switch with which can be selectively and independently controlled whether a current can flow through the switch in one direction or in the opposite direction.

In the method of operation of the DC / DC converter, a time interval during which the inductance shorting switch (Q3, Q4, D3, D4) is turned on is varied to one period or one switching frequency at which the DC / DC converter is operated to keep at least approximately constant or a predetermined, eg adjust time-dependent setpoint course. The switching operations are controlled in such a way that soft switching processes result in each case ("soft switching").

It can be determined and specified a sequence of switching operations, wherein in the execution of the method due to measurements of the current through the Wandlerinduktivität, in particular of zero crossings thereof, the switching times determined respectively the switching operations can be triggered.

In embodiments of the invention, the following aspects are realized: The clamp switch or inductance short-circuiting switch is realized by a four-quadrant switch, which is separately controllable according to current directions (Monolithic Bidirectional Switch with 2 gates, Antiseries of two unidirectional switches with anitparallelen freewheeling diodes, anti-parallel connection of semiconductors with reverse blocking characteristics, eg reverse blocking IGBTs). • The inductance short-circuit switch can be used for bidirectional Buck (buck), boost (boost), and inverse converter (buck-boost converter). In each of these variants, the input terminal / output terminal and the reference voltage rail are respectively impressed to one another, e.g. capacitor-based voltages. In buck converter operation, the input voltage is applied between the input terminal and the reference voltage rail and the output voltage occurs between the output terminal and the reference voltage rail. If the power flow direction of the buck converter reverses, i. If power is fed back from the output of the step-down converter to the input, this is in the sense of the voltage translation of step-up converter operation. Similarly, a boost converter with power flow contrary to the voltage translation direction can be seen as a buck converter. For inverse conversion operation, the input voltage between the buck converter input terminal (positive pole) and buck converter output terminal (negative pole) is applied and the output voltage between the reference voltage rail (negative pole) and output terminal of the buck converter (positive pole) tapped, the output terminal provides the input and output circuit of the Inverswandlers common circuit point. Accordingly, typically between input and output terminal and reference voltage rail and output terminal support capacitors are arranged. • For unidirectional switching, a simplified inductance short circuit switch made up of the series connection of a diode and a switch is sufficient. Also in this case, the inductance short-circuit switch can be controlled separately according to current directions. • The circuit is modified to an AC / DC converter (eg for PFC, Power Factor Correction) or to an AC / AC converter. Even in these cases, an inductance shorting switch can be used. It can be operated in particular at full load only in the vicinity of the zero crossings with widening the activation interval with decreasing load. • Operation of the inductance short-circuit switch for DC / DC converters only in the partial load range, or for DC / DC converters with time-varying input and / or output voltage only in those areas where the switching frequency would reach inadmissibly high values. • Choice of the width of a rest interval with a negative auxiliary current through the inductance short circuit switch such that over a certain load range or an input and output voltage range only a relatively low switching frequency variation occurs, respectively, a total period of repeated switching operations remains as equal as possible. • One of the two switches of the inductance short-circuit switch can remain switched on for synchronous rectification of the inductance short-circuit switch. Alternatively, the switching can be omitted in order to simplify the control, or can account for only unidirectional power flow of the two switches of the inductance short-circuit switch. In this case, then the antiparallel diode to the other of the two switches can be omitted.

In the following, the subject invention with reference to preferred embodiments, which are illustrated in the accompanying drawings, explained in more detail. Show it:

Fig. 1 shows an embodiment of a circuit according to the invention;

2 signal waveforms according to a control method for operating the circuit; and FIG. 3 shows waveforms according to a modified control method.

The operations and principles described below with reference to a buck converter are equally applicable to other DC / DC converter such as boost converter and inverter converter as well as AC / DC converter or AC / AC converter with Induktivitätskurzschlussaltern. In some cases, the same sequences of switching operations can be realized, in other cases, analogous considerations lead to other sequences in a manner immediately apparent to the person skilled in the art.

The circuit structure of a bidirectional DC / DC converter with buck converter characteristic is shown in FIG. For the further description, a power flow direction from the input with voltage Upn = U1 to the output with voltage Upn = U2 <LH is assumed and the system is accordingly called a step-down converter. For reverse power flow direction (which may occur due to the bidirectionality of the converter), i. in the case of regenerative power supply or power supply from the buck converter output pn to the buck converter input pn, boost converter operation is actually present with regard to the voltage transformation and power flow direction. In the interest of a simpler description, however, this is not discussed in more detail, but is always spoken only by a step-down converter with an inverse power flow direction or by energy recovery of the step-down converter if step-up converter operation is present.

The circuit has an input capacitance C1, a first and a second switch Q1, Q2 of the actuator, with a first and a second freewheeling diode D1, D2, a Wandlerinduktivität L, also called Tiefsetzstellerinduktivität in this case, and an output capacitance C2. The buck converter inductance L is connected to a node x between the first and second switches Q1, Q2.

The first switch Q1 is connected between the node x and an input terminal p. The second switch Q2 is connected between the node x and a reference voltage rail n. Between the input terminal p and the reference voltage rail n, the input capacitance C1 is connected. Instead of the input capacitance C1, another element which acts as a voltage source may also be present. The transducer inductance L is connected between the node x and an output terminal p. Between the output terminal p and the reference voltage rail n, the output capacitance C2 is connected.

It is arranged over the buck converter inductance L Induktivungskurzschlussschalter, also called short-circuit switch, designed as antiserienschalter a third and fourth switch Q3, Q4 with common emitter or common collector and with antiparallel (possibly parasitic) freewheeling diodes D3 and D4. The converter function will be described below with reference to FIG. 2, which shows the time course of the current iL through the buck converter inductance L, the output current iout, the voltage uQ2 across the buck converter freewheeling diode D2 or the directly antiparallel buck converter freewheeling switch Q2 (which may have D2 as a parasitic element) and the drive signals of the switches Q1, Q2, Q3 and Q4, explained. Each of the switching elements Q1-Q4 has a parallel parasitic capacitance Cp1-Cp4 (not shown in FIG. 1), also called output capacitance, which may optionally be increased by an external capacitance and to achieve zero voltage switching or generally a soft one Switching ("softswitching") is used, ie when switching off a current-carrying switch takes over the power. By appropriate operation of the entire circuit is then to ensure that the before switching on a switch associated capacity is discharged to avoid switch-on. The control of the buck converter described here ensures this operation for all switches Q1-Q4.

Bzgl. the following agreement is made for the designations used below: the value of the voltage uy assigned to a time tx is briefly referred to as uytx; Example: uQ2 in H: uQ2t1. The same applies to the electricity. Forward voltages of diodes and power transistors are neglected. Hatching a control signal means that the associated transistor can advantageously remain turned on in this time interval for a reduction in the complexity of the control, but this is not absolutely necessary for the fulfillment of the basic circuit function. In general, the control shown by solid lines of the control signals in the figures is chosen so that in the sense of minimizing the conduction losses in the conducting interval of a diode always the antiparallel transistor is turned on as early as possible, the switching not directly with the Leitendwerden the diode, but slightly delayed, since a detection of the conduction of the diode, which then triggers the switching of the switch, would have a certain signal propagation time or would be provided with timely fixed control safety times.

Time t0: The current iL increases due to the lying at L positive voltage uL = U1 - U2 starting: from iLtO = 0 linearly; Q1 was energized at the latest immediately before the zero crossing of the current iL, since the current then flows through the antiparallel diode D1 of Q1 (Q1 may have D1 as a parasitic element). Transistor Q3 is turned on, i. we have uQ3 = 0; the positive voltage uL across L thus reversely over D4 (Q4 is off), i. Cp4 is loaded on U1 - U2.

At time t1: Q1 is de-energized, with t1 is chosen so compared to tO that on the one hand the desired power transfer takes place over the entire clock period t0 ... t14 and on the other hand enough power in L is available to ultimately a de-energized switching of Allow Q2 at a later time t6); the current impressed by L then charges the parasitic capacitance Cp1 of Q1 (or D1), discharges Cp2 of Q2 (or D2) and also Cp4 of Q4 (Q3 is turned on at the latest and allows the flow of this discharge current) in the form of a Vibration, ie uL is reduced starting from U1 - U2. The portion of iL not needed for the reloading of Cp4 continues to appear as the output current iout.

Time t2: the voltage uCp4 across the parasitic capacitance Cp4 of Q4 reaches zero, making D4 conductive; the entire current iL now passes through Q3 and D4. Accordingly, the charging of Cp1 and discharge of Cp2 ends, the node x remains at the voltage uxn = U2.

Time t3: uD4 = uQ4 = O, Q4 can be turned off without voltage; the low on-resistance of Q4 comes to lie parallel to D4 and the conduction losses decrease; it is further uL = 0 or uxn = U2.

Time t4: Q3 is de-energized (typically the time interval t3 ... t4 is kept so short that Q4 can be switched on safely de-energized), the current flowing through Q3 now flows through Cp3 and loads Cp3 in the reverse direction of D3 in which a voltage Upx> 0 occurs between p and the circuit point x, or the circuit point x decreases in voltage relative to the reference voltage rail n; Thus, a part of iL will now take over the further charging of Cp1 and further discharge of Cp2 (compare time interval t1 ... t2) and again a corresponding output current iout occurs.

Time t5: The voltage uQ2 across the second switch Q2 reaches the value zero, D4 becomes conductive and takes over the current iL; Cp3 is charged to U2, Cp1 to U1, the entire current of inductor L appears as output current, iLt5 = iout. iL has a negative slope or is degraded against U2.

Time t6: uD2 = O, Q2 can be switched on without voltage, whereby the conduction losses decrease compared to an exclusive conduction of D2.

Time t7: iL reaches the value zero, at the latest now Q2 must be turned on to allow a sign reversal of iL.

Time t8: iL <0, Q2 is de-energized (the time t8 is chosen so that iLt8 is sufficient to subsequently the parasitic capacitances on or to unload, so that in Q13 Q1 can be turned on without power), Q4 will be switched on at the latest now. The negative current iLt8 now flows through Cp2 and charges the capacitance in the reverse direction of D2 in the form of a vibration. Accordingly, Cp1 and Cp3 must be discharged, i. a part of the current iL is passed through Q4 and Cp3, the remainder appears as output current iout.

Time t9: Cp3 is completely discharged, D3 becomes conductive, the entire current iL now flows over Q4 and D3, so uL = 0 and uxn = upx, i. E. the node x remains at the output voltage level, charging of Cp2 and discharge of Q1 stops.

Time t10: uD3 = 0, Q3 can thus be turned off to reduce the conduction losses. The current iL <0 now circles over Q4 and Q3, there is no power transfer to U2. The interval between t10 and the following time t11 may be referred to as a rest interval. In this interval, a current flows through the inductance short-circuit switch, which can be called an auxiliary current.

Time t11: Q4 is turned off. Advantageously, the length of the interval t10 ... t11 is chosen such that the length of the entire pulse period, i. the time difference t14 - tO does not fall below a defined value, or the switching frequency fs = 1 / (t14 - t0) of the system remains limited to a defined value. By turning off Q4, iL <0 will now charge Cp4 in the reverse direction of D4, while Q3 can remain on or off, since D3 is available for the current flow. With the charge of Cp4, uL> 0, i. Node x is raised in potential, i. Cp2 must be loaded and discharged Cp1 using a part of iL which also appears as output current iout. The transhipment of the capacity takes place again in the form of a vibration.

Time t12: The voltage across D1 becomes zero, D1 starts to conduct and clamps the node x against the positive input voltage terminal p. iL thus shows a constant positive slope defined by U1 - U2. Time t13: Q1 can be turned off and reduces the power losses.

Time t14: iL reaches the value zero coming from negative values, this corresponds to the initially considered state in t0, one pulse period has expired.

In summary, a control of the circuit realizes an adjustment of the power supply by varying the time t1-t0; and • by varying the time t7 -16 a setting of the negative auxiliary current value to ensure zero voltage switching.

In a unidirectional power flow of one of the switches of the Induktivitätskurzschlussschalter is only turned on to avoid losses in its anti-parallel diode. The switch may then be left off or omitted, simplifying the control but allowing for losses in the diode. In the example of FIG. 1, in the case of a power flow from the input pn to the output pn, the fourth switch Q4 and the third diode D3 can be omitted. In the power flow from the output pn to the input pn, the third switch D3 and the fourth diode D4 can be omitted. For the output voltage U2> U1 / 2, the above-described control can be simplified. This modified control method will be briefly described below with reference to FIG.

Time tOa: as above time fia: Q1 is turned off and Q3, if turned on, also turned off, since then the voltage uL will assume negative values and accordingly record D3 blocking voltage. Cp1 is charged, Cp2 is discharged, as well as the junction capacitance Cp4 lying in t1a at an LH - U2 is discharged, with Cp3 being charged accordingly. If uL = 0 is reached, both Cp3 and Cp4 are charged in opposite directions, the reloading oscillation continues and since U2> U1 / 2 applies, finally a magnitude larger voltage must build up over D3 or Cp3 than in t1a at D4 or Cp4 was, with which uD4 safely reached the value zero or D4 becomes conductive and finally in t2a the full voltage U2 is at D3 or Cp3.

Time t2a: uCp2 or uQ2 reaches the value zero, D2 becomes conductive.

Time t3a: Q2 can be switched on without voltage, reducing the conduction losses, iL is reduced to U2; Furthermore, Q4 can be switched on without voltage, as there is no voltage at D4 (see above).

Time t4a: iL becomes zero, at the latest now Q2 must be switched on to allow a current reversal.

Time t5a: Q2 is turned off and at the latest now Q4 must be turned on. The negative current iL now loads Cp2, discharges Cp1 and also Cp3 via Q4.

Time t6a: Cp3 is discharged, uD3 becomes zero, D3 becomes conductive, whereby iL flows over Q4 and D3 and the node x remains at uxn = U2.

Time t7a: Q3 can be turned off, reducing the conduction losses.

Time t8a: turning off Q4, iL <0 now loads Cp4 in the reverse direction from D4 via D3 and Q3, Q3 could be turned off because D3 is available for current routing. The node x is potential-boosted, Cp2 further charged in the form of a vibration, Cp1 further discharged, for which a part of iL is needed, which also occurs as output current iout.

Time t9a: uD1 becomes zero, D1 becomes conductive, the negative current iL degrades against the input voltage U1. Cp4 is at a voltage U1 - U2 At time t10a: Q1 can be turned off, reducing the conduction losses.

Time H1 a: iL becomes zero, Q1 must be switched on at the latest now to allow a build-up from iL to positive values.

Claims (10)

• by varying the time t1 - tO a setting of the power delivery; and • by varying the time t7 -16 a setting of the negative auxiliary current value to ensure zero voltage switching. In a unidirectional power flow of one of the switches of the Induktivitätskurzschlussschalter is only turned on to avoid losses in its anti-parallel diode. The switch may then be left off or omitted, simplifying the control but allowing for losses in the diode. In the example of FIG. 1, in the case of a power flow from the input pn to the output pn, the fourth switch Q4 and the third diode D3 can be omitted. In the power flow from the output pn to the input pn, the third switch D3 and the fourth diode D4 can be omitted. For the output voltage U2> U1 / 2, the above-described control can be simplified. This modified control method will be described below with reference to FIG. 3 briefly described. Time tOa: as above time fia: Q1 is turned off and Q3, if turned on, also turned off, since then the voltage uL will assume negative values and accordingly record D3 blocking voltage. Cp1 is charged, Cp2 is discharged, as well as the junction capacitance Cp4 lying in t1a at an LH - U2 is discharged, with Cp3 being charged accordingly. If uL = 0 is reached, both Cp3 and Cp4 are charged in opposite directions, the reloading oscillation continues and since U2> U1 / 2 applies, finally a magnitude larger voltage must build up over D3 or Cp3 than in t1a at D4 or Cp4 was, with which uD4 safely reached the value zero or D4 becomes conductive and finally in t2a the full voltage U2 is at D3 or Cp3. Time t2a: uCp2 or uQ2 reaches the value zero, D2 becomes conductive. Time t3a: Q2 can be switched on without voltage, reducing the conduction losses, iL is reduced to U2; Furthermore, Q4 can be switched on without voltage, as there is no voltage at D4 (see above). Time t4a: iL becomes zero, at the latest now Q2 must be switched on to allow a current reversal. Time t5a: Q2 is turned off and at the latest now Q4 must be turned on. The negative current iL now loads Cp2, discharges Cp1 and also Cp3 via Q4. Time t6a: Cp3 is discharged, uD3 becomes zero, D3 becomes conductive, whereby iL flows over Q4 and D3 and the node X remains at uxn = U2. Time t7a: Q3 can be turned off, reducing the conduction losses. Time t8a: turning off Q4, iL <0 now loads Cp4 in the reverse direction from D4 via D3 and Q3, Q3 could be turned off because D3 is available for current routing. The node x is potential-boosted, Cp2 further charged in the form of a vibration, Cp1 further discharged, for which a part of iL is needed, which also occurs as output current iout. Time t9a: uD1 becomes zero, D1 becomes conductive, the negative current iL degrades against the input voltage U1. Cp4 is at a voltage U1 - U2 At time t10a: Q1 can be turned off, reducing the conduction losses. Time t11 a: iL becomes zero, Q1 must be switched on at the latest now to allow a build-up from iL to positive values. • a transformer inductance (L) connected between the node (x) and an output terminal; An inductance short-circuiting switch (Q3, Q4, D3, D4) which is connected in parallel to the converter inductance (L) and is designed as an anti-series switch of a third and fourth switch (Q3, Q4) with antiparallel freewheeling diodes (D3) and (D4). 5. A method for operating the DC / DC converter, according to claim 4, wherein during operation of the DC / DC converter, a current, referred to below as the converter current iL, flows through the converter inductance (L), and wherein for realizing soft switching operations, starting from a start time tO in which the converter current is zero, and the first switch (Q1) is turned on or turned off, the third switch (Q3) is turned on or off, and the second switch (Q2) and the fourth switch ( Q4) are turned off, the steps described below are performed in this sequence: at a time t1, deenergizing the first switch (Q1); At a time t3, deenergizing the fourth switch (Q4); • at a time t4, de-energizing the third switch (Q3); • at a time t6, deenergizing the second switch (Q2); • at a time t8, de-energizing the second switch (Q2); 'At a time t10, deenergizing the third switch (Q3); • at a time t11, deenergizing the fourth switch (Q4); • at a time t13, deenergizing the first switch (Q1); and thus again the state is reached according to the start time tO. 6. The method according to claim 5, with the further steps • at the earliest at time t11, turning off the third switch (Q3); and • at the latest at time t1 of a following period, deenergizing the third switch (Q3). 7. The method according to claim 5 or 6, with the further steps • at the earliest at time t4, turning off the fourth switch (Q4); and • at the latest at time t8, deenergizing the fourth switch (Q4). 8. A method of operating the DC / DC converter according to claim 4, wherein during operation of the DC / DC converter, a current, referred to below as the converter current iL, flows through the converter inductance (L), and wherein for realizing soft switching operations, starting from a start time tOa in which the converter current is zero, and the first switch (Q1) is turned on or energized, the third switch (Q3) is turned on or off, and the second switch (Q2) and the fourth switch ( Q4) are turned off, the steps described below are performed in this sequence: • at a time t1a, deenergizing the first switch (Q1), and at the latest at this time t1 a deenergizing the third switch (Q3), if it is turned on; • at the earliest at a time t3a and at the latest at a time t4a, deenergizing the second switch (Q2); • at a time t5a, deenergizing the second switch (Q2) and at the latest at this time t5a de-energizing the fourth switch (Q4), if this is not already turned on; • at a time t7a, deenergizing the third switch (Q3); • at a time t8a, deenergizing the fourth switch (Q4); • at the earliest at a time t10a and at the latest at a time t11a deenergizing the first switch (Q1); • wherein at the time t11 a again the state corresponding to the starting time tO is reached. 9. The method according to claim 8, with the further steps • at the earliest at time t8a, turning off the third switch (Q3); and at the latest at time t1a of a following period, de-energizing the third switch (Q3). 10. The method according to claim 8 or 9, with the further step • at the earliest at the time t3a, de-energized switching on the fourth switch (Q4).