CH658755A5 - CIRCUIT BREAKER. - Google Patents

Description

The invention relates to a circuit breaker according to the preamble of claim 1.

Circuit breakers are used extensively in industrial and commercial areas to protect electrical conductors and devices connected to these conductors from damage caused by excessive currents. Circuit breakers were initially designed to interrupt the current flowing through them when they exceeded a certain level. Gradually, however, more differentiated time / current switch-off characteristics were required, so that a circuit breaker should open quickly in the event of a very high overload, but should interrupt with a delay when lower overcurrents are detected. The roughly approximate delay time was inversely proportional to the degree of overload. Circuit breakers were also required, which should cause an interruption in the detection of currents due to earth faults. With increasing complexity of electrical distribution systems, the control parts of circuit breakers of a system were connected to each other in order to enable selectivity and coordination possibilities in the shutdown sequences. In this way, the order in which the various circuit breakers are to interrupt in the case of specified fault conditions can be specified in the system design.

Solid state electronic control circuits for high performance low voltage circuit breakers were developed in the late 1960s. These control circuits were characterized by a number of functions, e.g. immediate and delayed shutdown, which used to be done by magnetic or thermal devices. The increased accuracy and flexibility of solid-state electronic controllers 5 has led to their widespread use, although the electronic control circuits have often been more expensive than the corresponding mechanical devices.

The earliest electronic control circuits included discrete components, such as Transistors, resistors and account capacitors. Newer circuits had integrated circuits that were more efficient at reduced costs.

As energy costs continue to rise, there is growing interest in more effectively controlling electrical energy consumption by creating 15 more sophisticated electrical distribution systems. There is therefore a need for a circuit breaker that has a com-. plexere analysis of the electrical conditions in the circuit to be protected and which allows an even better coordination with other switches. Of course, this should be done at the same or lower cost.

Accordingly, the present invention provides a circuit breaker with contacts for connection to a circuit to be protected and a disconnecting device for opening the contacts, which is characterized by the features of claim 25 1.

A previous embodiment of the invention is explained in more detail below with reference to the drawing. Show it:

1 is a perspective view of a circuit breaker designed according to the invention,

2 is a block diagram of the circuit breaker shown in FIG. 1;

3 shows a schematic illustration of a distribution system with circuit breakers according to FIGS. 1 and 2,

4 shows a graphical representation of a typical time / 35 current tripping characteristic curve on a logarithmic scale,

5 is a block diagram of the trip unit of the circuit breaker shown in FIGS. 1 and 2;

6A and 6B are partially schematic circuit diagrams of the trip unit shown in Fig. 5,

7 is a flowchart of the program stored in the memory of the microcomputer.

8 is a flowchart of the analog / digital routine stored in the memory of the microcomputer that is part of the trip unit.

45 FIG. 9 shows a flow diagram of the functions contained in the program according to FIG. 7 for a triggering with a short delay and an immediate triggering,

10 is a flowchart of the function of triggering with long delay 50 contained in the program according to FIG. 7,

11 is a flowchart of the function of tripping on earth fault contained in the program according to FIG. 7,

FIG. 12 shows a flowchart of the self-checking routine of the program according to FIG. 7, and FIG. 13 shows a flowchart of the routine for reading out an external programmable read-only memory according to the program of FIG. 8.

In the drawing, the same reference numerals designate corresponding components. 1 and 2 show a perspective view and a functional block diagram of a molded case circuit breaker 10. Although the circuit breaker 10 is a three-pole circuit breaker for use in a three-phase electrical circuit, the invention is of course not thereon be-65 limits and could also be used in a single-phase circuit or another type of multi-phase circuit.

An energy source is connected to input connections 12

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sen, for example a transformer or a panel busbar, and an electrical load is connected to output connections 14. Internal conductors 16 connected to the connections 12 and 14 are also connected to isolating contacts 18 which are used for the selective opening and closing of an electrical circuit by the circuit breaker. The contacts 18 are actuated by a mechanism 20 that responds to commands initiated manually or automatically to open or close the contacts 18.

Current transformers 24 surround each of the internal phase conductors 16 to sense the level of current flow through the conductors 16. The output signal of the current transformer 24 reaches a tripping unit 26, together with the output signal of a current transformer 28, which senses the level of an earth leakage current flowing in the circuit. The trip unit 26 continuously monitors the level of the phase and earth leakage currents flowing in the circuit to which the circuit breaker 10 is connected and issues a command signal to a trip coil 22 which actuates the mechanism to open the contacts 18 whenever the electrical conditions in the circuit to be protected exceed predetermined limit values stored in the tripping unit 26. Under normal conditions, the mechanism 20 can be caused to open and close the contacts 18 by commands given manually via a manual actuation device 32.

1 that the circuit breaker 10 has a cast or pressed insulating material housing 34. The connections 12 and 14 (see FIG. 2) are located on the rear of the housing 34 and are therefore not visible in FIG. 1. A handle 36 is mounted on the right side of the housing 34 by which an operator can manually tension a spring (not shown) within the mechanism 20. The manual control device 32 is arranged in the middle of the housing 34. Windows 38 and 40 indicate the tension state of the spring or the position of the contacts 18. Using a push button 42, an operator can have an internal electric motor mechanically tension the spring in the same manner as is possible by operating the handle 36. Using a push button 44, an operator can cause the spring to actuate the mechanism 20 for closing the contacts 18. Similarly, a push button 46 allows an operator to cause the spring and mechanism 20 to open the contacts 18.

The front panel of the trip unit 26 is on the left side of the housing 34, as shown in FIG. 1. This front panel contains a numerical display device 80 which enables an operator to observe the electrical parameters relating to the protected circuit. The plate also has a plurality of light-emitting diode (LED) display elements 84, 86, 88, a power plug insert 78 for setting the maximum continuous current of the circuit breaker and an insert with programmable read-only memory (PROM), 82, by means of which the time / current tripping characteristic curve of the circuit breaker is defined.

Before the operation of the trip unit is explained, it seems appropriate to explain in detail the function of a circuit breaker within an electrical power distribution network. Figure 3 shows a typical electrical distribution system. Multiple electrical loads 48 are powered by circuit breakers 50, 52 and 54 from one of two electrical energy sources 56 and 58. Sources 56 and 58 could be transformers connected to separate high voltage electrical power lines, diesel powered generators, or a combination thereof. Energy from the first source 56 passes through the first main power switch 50 to a plurality of branch circuit breakers 60, 62, 64 and 66. Similarly, energy from the second source 58 can pass to a second group via the second main power switch 52 branch circuit breakers 68, 70, 72 and 74. Alternatively, power may come from either source 56 or source 58 via interconnect circuit breaker 54 to the opposite side branch circuit breakers. In general, the main and interconnect power switches 50, 52 and 54 are coordinated so that no branch circuit is powered by two sources at the same time. The capacity of the main and branch circuit breakers 50, 52 and 54 is usually greater than the capacity of each of the branch circuit breakers.

For example, if there is a fault (an unusually large current flow) at point 76, it is desirable that this condition be sensed by the branch circuit breaker 62 and that this switch should trip quickly, i.e. is switched off or opened to separate the fault from any electrical energy source. The fault at point 76 can be a large overcurrent, e.g. was caused by a short circuit between two phase conductors of the circuit, or it can be an overload that is only slightly above the nominal power of the switch, as e.g. is caused by an overloaded motor. On the other hand, it may be a ground fault caused by a breakdown in the insulation of one of the conductors, which allows a relatively weak current to flow to an object at ground potential. In any case, the fault would also be detected by the main or connection switches 50, 52 or 54, through which the load fed by the branch switch 62 is supplied at the time the fault occurs. However, it is desirable that only branch circuit breaker 62 be operated to isolate the fault location from the electrical power source. The reason for this is that if the main or connection circuit breaker were to be triggered, a larger part of the overall system than just the load connected to the branch circuit affected by the fault would be affected by a power failure. It is therefore desirable

that the main and link circuit breakers 50, 52 and 54 have a longer delay period following the detection of a fault before initiating a shutdown. Coordinating the delay times among the main, link and branch circuit breakers for different types of faults and the need for interlocking between individual switches are the main causes of the need to provide more sophisticated control in a trip unit.

In order to achieve the coordination among the circuit breakers explained above, the time / current tripping characteristics must be specified for each circuit breaker. Circuit breakers usually have characteristic curves which are similar to the characteristic curve shown in FIG. 4, both coordinate axes having a logarithmic scale. If the current flow is below the maximum rated continuous current of the switch, the switch naturally remains closed. However, if the current increases, the switch should turn off at some point, for example at point 300 in Fig. 4, if this overload current persists for an extended period of time. Should a current flow corresponding to the maximum nominal continuous current, as specified by point 300, continue, the switch will switch off after approximately 60 seconds, as can be seen from FIG. 4.

At slightly higher current values, the time required to trigger the switch is shorter. So e.g. the switch trips at 1.6 times the maximum continuous current (this state is indicated in the drawing by point 302) after about 20 seconds. The segment of the curve between points 300 and 304 is known as a thermal characteristic part of the circuit breaker or as a characteristic of a long connection.

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because in conventional circuit breakers this characteristic curve resulted from a bimetal element. It is desirable that both the current level at which the long delay section begins and the turn-off time required for any point on that section be adjustable. These parameters are referred to as the response value for long deceleration or as long deceleration time, the change in these parameters is indicated by arrows 306 and 308.

At very high overcurrent levels, e.g. 12 times the value of the maximum continuous current and more, it is desirable that the circuit breaker trip takes place as soon as possible. This point 312 of the curve is known as an "instantaneous" or magnetic trip or trip level because conventional circuit breakers have an electromagnet in series with the contacts to ensure response as quickly as possible. The "immediately" response value is usually adjustable, as indicated by arrow 314.

To support the coordination of the circuit breakers within a distribution system, modern circuit breakers are additionally equipped with a characteristic section 316 of a short delay between the section of long delay and the “immediately” section. The present invention allows both the short delay response value and the short delayed trip time to be set, as indicated by arrows 318 and 320.

In some circumstances, it is desirable that the trip time over the short delay portion change inversely with the square of the current. This is known as the I2t characteristic and is indicated in FIG. 4 by the dashed line 310.

The functions and the operating modes of the trigger unit 26 are described below. A power connector insert 78 is inserted into the front plate of the tripping unit 26 in order to specify the maximum continuous current that may flow in the circuit to be protected by the circuit breaker. This maximum continuous current can be below the actual capacity of the circuit breaker known as frame size or system size. For example, the system size of the circuit breaker can be 1600 amperes; however, if the switch is initially installed, the conductors of the circuit to be protected may be sized to only withstand a constant current load of 1200 amps. Therefore, a power insert can be inserted into the trip unit to ensure that the maximum continuous current allowed in the circuit breaker is only 1200 amperes, even if the circuit breaker is capable of continuously carrying a current of 1600 amperes.

In the following explanation of the invention, the current levels are given as multiples of the maximum continuous current specified by the power connector. According to this agreement, a current is expressed, for example, as “3 units”, which means that the current level is three times the maximum continuous current.

The electronic circuitry within the trip unit causes the numerical display 80 (Fig. 1) to sequentially display the current value of the electrical conditions of the circuit being protected and the various limit settings defining the switch's time / current trip curve according to the current setting. The LEDs 84, 86 and 88 indicate whether a fault due to an earth fault, a long-lasting overcurrent or a "current" over-sirom were the cause of the tripping.

On the right side and below the numerical display device 80 and the power insert 78 there is a slot with programmable read-only memory (PROM), 82; the PROM is, for example, type 3601 from Intel Corporation. There are several in the PROM

Limit values and setting values are stored, which specify the time / current tripping characteristic of this special circuit breaker. The procedure for loading the setting values in this module and the way in which the module is used by the circuit arrangement of the trip unit are explained in a later section.

The circuitry of the trip unit includes a digital arithmetic logic card processor 154; this is e.g. a microcomputer 8048 from io Intel Corporation. 5, the processor 154 is shown in block form. The following section explains each of the blocks shown in Fig. 5 and the operation of the trip unit.

The microcomputer 154 contains an arithmetic-logic 15 and control unit 153, a read / write memory (RAM) 155 with 64 bytes each comprising 8 bits, a read or read-only memory (ROM) 157 with 1K bytes each having 8 bits, an 8 -core data bus 172 and two 8-core input / output ports PORTI and PORT2. Other types of 20 digital arithmetic logic control processors could also be used, such as processors that require external memory circuits and do not have on-chip RAM and ROM circuits, such as the 8048. For a detailed description of the 25th Microcomputers is referred to the MCS-48 microcomputer User's Manual, which was published by the Intel Corporation.

Referring to the system block diagram shown in FIG. 5 and the detailed circuit diagram shown in FIG. 6, the display section 79 will first be explained. It consists of four data buffers IC5, 1C6, IC7 and IC8 and a four-digit numerical liquid crystal display 80. The data buffers can be of the type MC14543. Display data is sent to the data bus 172 of the microcomputer by multiplexing 35. The four least significant bits represent data, the four most significant bits their position on the display. The liquid crystal display 80 derives its backside clock from the interval timer 92. This interval timer also functions to reset the Mi-40 microcomputer when it does not receive its clock signals from the microcomputer 154. In normal operation, the microprocessor emits a pulse each time the main program loop is executed.

It can be seen from the diagram in FIG. 5 that the 45 PROM82 receives its address from the data bus 172 and outputs its content via port. Since the display section 79 and the address lines of the PROM82 are both connected to the data bus 172, it may be feared that the address information for the PROM could cause a garbled display. However, the address information only appears on the bus for a small fraction of a second, which is immediately followed by admissible display information. The liquid crystal display therefore does not have enough time to respond to the PROM address information and the viewer 55 only perceives the permissible display information.

The output subsystem 94 consists of one half of a comparator IC2 of the A775 type, a four-way NOR gate IC10 and a four-way NAND gate ICH. By means of the comparator 1C2, the microcomputer 154 sets a locking output signal via port 12 after a response to a fault due to earth fault. Via the NAND gate of the IC11, the microcomputer sets the corresponding LED display 84, 86 or 88 after one Triggering has occurred.

The NOR gates IC10 output a high Pe-65 gel output signal to shutdown a single controlled silicon rectifier (SCR) 98 in the event of ground fault tripping, short delay tripping, long delay tripping or immediate tripping. The 1C10 also causes the

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This switch-off signal follows the RESET signal when the supply voltage is switched on, in order to avoid faulty triggering during the 10 millisecond instability of the microcomputer after the first application of the supply voltage.

The input subsystem 100 consists of two peak value rectifier circuits with capacitors 90 and 91, a D / A converter IC4 of the ZN425J type, the other half of the comparator circuit IC2 and the analog switches from IC3. Capacitors 90 and 91 store the peak phase and earth current at each period of the current on the AC line. The peak values are then read by the microcomputer every period. Capacitors 90 and 91 are reset (discharged) later in each period by the microcomputer via transistor 96 and the IC11 activated by port2.

The analog / digital conversion of the signal coming from the input subsystem 11 is carried out using an iteration method using the D / A converter IC4 and the comparator IC2. A digital value is supplied from the microcomputer 154 to the D / A converter IC4. This value is converted into an analog value and passed to the IC2, which then compares this value with the value supplied by the capacitor 90 or 91 via the analog switch IC3 and indicates whether the value specified by the IC4 is larger or not. The result of this comparison is sent to the microcomputer 154 via the test input T1, which then generates a new value for the IC4. This process continues until the value generated by the microcomputer 154 is very close to the value supplied by the analog switch IC3, the result being held in the accumulator of the microcomputer 154. This method is shown in detail in the flow chart shown in FIG. 8.

The function of transistors 102 and 104 and their associated components is to apply the phase (or earth) currents from current transformers 24 and 28 to power connector resistor 105 when there is no tripping. However, if a trip condition is detected and the trip SCR98 is turned on, the transistors 102 and 104 are turned off, whereby substantially all of the phase (or ground) current signal is applied to the trip coil in parallel to effect a safe trip.

The supply voltage for the circuit of the trigger unit is provided by a rechargeable battery, the charging energy being provided by the current transformers 24. On the other hand, the supply voltage could be derived directly from the current transformers 24 or independently via connections to the conductors 16.

This section explains in detail how the circuit breaker works. The first part presents a general flowchart of the program and the allocation of memory. Then in the second part the important subroutines called by the main program loop are explained.

The memory allocation of the internal RAM 155 of the microcomputer 154 is shown in Table I below:

TABLE I

DATA STORAGE OVERVIEW (RAM)

63 Long delay response value (LDPU)

Long delay time (LDT)

61 Response value for short delay (SDP) M Short delay time (SDT) "*

-9 setting value for immediate release (1TS)

Response value in the event of a fault due to earth fault (GFP)

57 Earth fault time (GFT)

56

55

54 Sum 6 = subtotal (ZWSU) of GFT

53 Sum 4 = subtotal (ZWSU) of SDT

52 Sum 45 = self-test sum 4

51 Sum 56 = self-test sum 45

50

49

48

47

46 Sum 3 = Lower subtotal (ZWSU) of LDT 45 Sum 2 = Average subtotal (ZWSU) of LDT 44 Sum 1 = Upper subtotal (ZWSU) of LDT 43 42

41 Trigger flag 40 period counter

39 Current phase current value 38 Current earth current value 37

36 Trigger value 35

34 Display index

33 Lower byte of the address of the next display 32 Upper byte of the address of the next display

As you can see, the top eight memory locations for loading the limit value settings such as of the response value for tripping with a long delay and the long delay time. The values in these memory locations are refreshed every 4 seconds after reading the external PROM82. The subtotals for the timing functions in the event of an earth fault, short delay and long delay are also stored in the RAM. The address of the information to be displayed next, the current value of earth and phase current and the trigger value are stored in the specified memory locations. These values are addressed indirectly via register 0 (R0) or register 1 (Rl), which contains the special address.

The lower 32 words of the data memory are used for conventional organizational functions of the microcomputer, as explained in the above-mentioned “User's Manual” from Intel.

Reference is made to the flow diagram of the main loop shown in FIG. 7. After the system power is turned on or the reset button on the front panel is pressed, the command counter of the microcomputer 154 is automatically loaded with 000 (hex). A command at this location brings the microcomputer to the three initialization routines: «Clear RAM», «Load the display with« 000.0 »and« Differentiation trigger function ». In the latter function, the current value of the phase current is 0.9 units, i.e. compared to nine times the nominal current. If the circuit breaker is subjected to a strong overload while the trip unit is first “switched up” or “raised” after the supply voltage has been switched on, the program is able to trip the switch within 0.5 ms. These initialization routines are only executed during «upshifting» or «resetting».

At this point the command counter is reduced to FF (hex) or 255 (decimal). This counter reading signals the microcomputer 154 to read out the external PROM82. If the PROMS2 is not readable (content = 00H or FFH), or if the Prulsunune is not permitted, minimum limit values (from the ROM provided internally in the microcomputer

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157) loaded into the corresponding RAM memory locations. Otherwise the last 16 memory locations of the PROM82 are read out. The use of a 2K EROM thus enables the user to program a new set of limit values 16 times in the PROM before a new PROM must be used (16 x 16 values x 8 bits per value = 2048). After reading the values from the PROM, the program jumps to the BEGIN entry point. From now on, this is the starting point for the main program.

The internal ROM 157 of the microcomputer 154 contains a look-up table with the addresses of the subroutines which prepare the formats in order to be able to display the various parameter values. The address of the next display routine is read by an index R34 (initialized at 0 and updated with each display routine) and stored in R33 and R32 of the RAM155.

The next four main functions of the program are entered: «immediate tripping», «short delay tripping», «long delay tripping» and «earth fault tripping». These functions are explained in detail in the following section.

Next, a self check subroutine is executed. The functions of the analog-to-digital converter, the short-delayed response and the earth fault test are checked in this subroutine. If an error is determined, an error flag is set and an error code is stored in RAM 155.

The capacitors 90 and 91 for storing the peak phase and earth current are then discharged and a time delay corresponding to 16.667 ms minus the time required for the execution of the main program instructions is carried out.

A flag is next checked to determine if a trip has occurred. If so, the value of the phase or earth current that caused the trip is displayed. Since the trigger unit is supplied externally, a triggering process does not stand in the way of the execution of the microcomputer programs.

After the first cycle, the main counter has a counter reading of 254 D (D = decimal). This number signals the microcomputer 154 to select a further parameter to be displayed on the display device 80. If one realizes that this counting takes place cyclically, one can see that the selection is made immediately after reading the PROM 82 and 255 x 16.667 ms (4.27 seconds).

The parameter display is a three-digit number which refers to a unit, the parameter displayed being identified by a numerical code which, together with the parameter value, appears in the leftmost digit of the numerical display 80 in the following meaning:

1 Current phase current

2 Response value for long delay

3 Long delay time

4 Response value for short delay

5 Short delay time

6 Response value for earth fault

7 Earth fault time

S Level for immediate tripping 9 Current earth current

If the counter reaches the value 125 (2.1 seconds) and if an error was found in the self-checking program, an error code is shown in the display 80 instead of a parameter value as follows: 1 for an A / D conversion error or a malfunction during immediate tripping, 2 for a short-time malfunction, 3 for an earth-fault tripping, and 4 for the indication that minimum setting values are used. This causes the display 80 to alternate between parameter value and error code every 2 seconds, indicating to the operator that an error has been detected. 5 The function blocks shown in the general flowchart will be explained in detail below. In the description, reference should be made to the flow diagrams given for each block.

In order to consider the “immediate release” function and the “short delay release” function, reference is first made to the flowchart shown in FIG. 9. Upon entering these two routines, the microcomputer 154 switches the analog output of the D / A converter IC4 to the 15 phase peak rectifier circuit via resistors 108, 110 and 112, the values of which are 6.8K, 220K. This creates a scale factor of 1 per unit (with a digital representation of 160). The A / D conversion subroutine (Fig. 8) is now called and this program takes 0.26 ms (104 instructions x 2.5 p.s average execution time per instruction). 20 The A / D conversion subroutine clears the accumulator (ACC) and then sets its most significant bit as a test value. This value is passed to the D / A converter, which generates a corresponding analog value. This analog value is compared to the phase current value provided by the peak rectifier capacitor 90. If the trial analog value is less than the phase current, the one bit trial value is added to the digital successive approximation of the phase current value held in register R3. The test bit in the accumulator gate is then shifted to the right by one position, a corresponding analog test value is generated, a comparison is carried out, and then the bit is held in the register R3 or not in accordance with the comparison result. Similarly, all 8 bits of the accumulator are checked, and 35 after the eighth bit is completed, the value held in R3 is transmitted to the accumulator.

The digital value of the current phase current (PPC) is then stored in RAM155 to be displayed and used in the short delay program. If 40 PPC is greater than the instantaneous trip setting value (ITS), a trip is performed in which the current value that caused the trip is saved (to be shown on the display 80) and the correct LED 84, 86 or 88 is brought to light 45 in order to identify the cause of the triggering. Otherwise the routine for short delayed triggering is entered.

In the routine for short delay tripping, a subtotal (ZWSU) is increased for each period if PPC is greater than the response value for short delay. The subtotal is then compared to a value that corresponds to the short delay time (SDT). If the subtotal is greater than the value of SDT, a trigger is carried out. Otherwise the test program for tripping is entered with a 55 long delay. If PPC is less than the short delay pickup value, the short delay subtotal is reset to zero. At this point, the Long Delay Checker (LDTST) is entered (as shown in Figure 10).

60 After entering the program, the LDTST function (via IC3) switches to the phase peak rectifier circuit. However, this is done via resistors 114 and 116, the values of which are 3.3 K and 220 K, respectively (cf. FIG. 6). In this way, the threshold for A / D conversion is doubled. If you consider that 1 unit was encoded to 16 D when triggered immediately and when triggered with a short delay, you can see that 1 unit is now is coded to 32 D (this corresponds to a resolution of 3.12 ° .'o).

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For time control with a long delay, a variable proportional to (i): must be calculated. This value is added to an accumulator register and then compared with the long delay time (LDT) whenever the response value for long delay (LDPU) is exceeded. The accumulator register then represents the quantity «(i) 2t». An example may explain the process:

LDPU = 1 unit = 32 D

LDT = 2 sec l (PPC) = 6 units = 32 D X 6 = 192 D

p = (192) 2 = 36,864

However, instead of saving i2, i2 / 4 is saved in order to use less storage space while still providing sufficient resolution. So you get:

Ï- / 4 = 36.864 / 4 = 9216

If i2 / 4 is added to a 64-bit subtotal every 1/60 second, the subtotal has the following value after 2 seconds:

9216 x 60 x 2 = 1,105,920 D.

This brings the top 8 bits of the subtotal to the value:

I.105.920 / 216 = 17 D.

Thus, a set long delay time of 2 seconds that is encoded as 17 (decimal) or 11 (hexadecimal) is reached after exactly 2 seconds, as desired. Therefore:

The setting of the long delay time LDT = (number of seconds) X 17/2. It can be seen that with a smaller value of PPC the trigger unit takes longer to reach that counter reading, and that with a larger value of PPC the trigger unit reaches the counter reading faster (the time is inversely related to (i) 2).

Reference should now be made to the flow chart shown in FIG. 10. It can be seen that if PPC is less than LDPU, the subtotal is reduced with a fixed value A4 H = 164 D. This number represents (LDP min) 2/4 or (0.8 X 32 D) 2/4 = 164 D.

Now the test for earth fault is carried out. In conventional tripping units, in the event of faults not based on earth faults, in which the phase current is 3 to 10 times as high as the circuit breaker nominal power, the response value is made insensitive to earth faults, so that the fictitious earth fault current (a quantity artificially generated by the current transformers) does not caused incorrect triggering. As can be seen from the flowchart in FIG. 11, a further corrective measure is provided in the present trigger unit. The response value for earth fault is made insensitive, as in prior art 5, if PPC is greater than or equal to 7.0 units; for values of PPC between 1.0 and 7.0 units, however, the fictitious earth current is taken into account by subtracting PPC / 4 from the measured earth current. This method could of course also be carried out by another device. e.g. with an analog circuit.

If the present earth current is greater than the response value for the earth current, an earth interlock output signal is set to signal to other switches that this 15 switch is handling a fault due to earth fault. Next, a subtotal similar to the short delay subtotal is incremented. If this subtotal is now greater than the subtotal trigger value for a fault in the event of an earth fault, a triggering takes place. Otherwise, the program enters the self-check routine.

If the current earth current is lower than the set response value for earth current, but greater than 1/2 of the set value, the earth interlock output signal is set. Furthermore, for all earth current values below the response value, the subtotal is reduced (not reset as in the short delay) before the self-check routine is entered.

The flowchart for the self-check routine is shown in FIG. This subroutine, which is performed every period, resets peak rectifier capacitors 90 and 91 and checks the current subtotal for ground fault and short delay functions and alerts the operator of a main loop fault. This is done by setting flags that are checked in the 35 main loop every 2.1 seconds and by storing an error code. If the flag is set, the main program causes an error code number to appear on the numeric display 80. In this way, instead of a 4-second display of the parameter 40 values, an alternate, 2.1-second display of the error code and parameter values was carried out.

As already mentioned above, the “READ” routine outlined in FIG. 13 allows the user to reprogram the external PROM chip 16 16 times by means of a 45 PROM programming device. This routine also loads minimum setting values for the circuit breaker if the PROM has not been programmed correctly or if there is no PROM.

The setting values can be coded in the PROM82 as follows, for example:

EXAMPLE

(X

32)

LDPU

from

0.8 units

= -

0.8 x 32

=

26 D.

1A H

(X

8.5)

LDT

from

2 seconds

=

2 x 8.5

=

17 D

11 h

(X

16)

SDP

from

1.5 units

=

1.5 x 16

=

24 D

18 h

(X

1)

SDT

from

20 periods

=

20 X 1

=

20 D

14 h

(X

64)

GFP

from

0.2 units

=

0.2 x 64

= 5

12, S D

OD H

(X

I)

GFT

from

20 periods

=

20 x 1

=

20 D

14 h

(X

16)

ITC

from

8.0 units

=

8 X 16

=

128 D.

80 H.

In this format, the set values are ready for use by the program. However, for the display 65 (which occurs every 4 seconds), the values must be converted into legible decimal characters.

Each AI routine therefore calls a routine to display the integer or fractional values of

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Convert hexadecimal format to BCD code. The BCD legend. Reference figure

The intermediate decoders then use 7-segment characters for values

Format implemented.

Perform A / D conversion

F51

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List of the reference symbols used in the drawing s Save PPC

F52

10th

PPC s LDPU?

F53

10th

Legend

Reference

Figure

ZWSU = ZWSU - A4H

F54

10th

character

Calculate (PPC) 2/4

F55

10th

Source 1

56

2nd

Beginning

Fl

7

io Save (PPC) 2/4

F56

10th

Update the address of the next ad

F2

7

Add (PPC) 2/4 to ZWSU

F57

10th

Immediate release

F3

7

Source 2

58

2nd

Briefly delayed release

F4

7

Save new ZWSU

F58

10th

Long delayed release

F5

7

Upper byte of ZWSU> LDT?

f59

10th

Earth fault tripping

F6

7

is trigger and save value

F60

10th

A / D implementation

F7

7

Switch to earth peak value

Self-examination

F8

7

judge circuit

F61

11

Reset phase peak rectifier

Perform A / D conversion and

capacitor

F9

7

Save value

F62

11

Delay = 16.667 - software time

FIO

7

20 PPC> 7.0 units

F63

11

Counter = Counter - 1

Fll

7

Skip earth fault test

F64

11

Has the switch been triggered?

FI2

7

PPC <1.0

F65

11

Show trigger value

F13

7

Earth current = actual value - PPC / 4

F66

11

Meter reading = 125 (T = 2 seconds)?

F14

7

Earth current> set value

F67

11

Self-examination O.K.

F15

7

25 Set earth lock output signal

F68

11

Show error code

F16

7

ZWSU = ZWSU + 1 _

F69

11

Power-on reset or reset

ZWSU> GFT

F70

11

Push button

F17

7

Trigger and save value

F71

11

Clear trip indicator; Show «0000»

F18

7

Earth current> set value / 2

F72

11

Erase RAM

F19

7

30 Set earth lock output

F73

11

mechanism

20th

ZWSU = ZWSU - 1

F74

11

Distinction trigger function

F20

7

SFCHK

F75

12

Counter = Counter —1

F21

7

Discharge peak rectifier

Trip coil

22

capacitor

F76

12

Meter reading = 255 or T = 4 seconds?

F22

7

35 PPC = 0

F77

12

Read PROM

F23

7

A / D conversion error

F78

12.

Checksum allowed?

F24

7

Display section

79

5

Load minimum setting

F25

7

Set flag

F79

12

Trip unit

26

return

F80

12

Meter reading = 254?

F26

7

40 PPC> ITS?

F81

12

Show next function

F27

7

External PROM

82

5

8 - counter; 0 - ACC; 0 - R2, R3;

ITS malfunction

F82

12

Put carry over

F28

8th

Put FLAG

F83

12

Previous position in ACC

F29

8th

return

F84

12

Shift the test bit to the right

F30

8th

45 PPC 2: SDP?

F85

12

Save in R2

F31

8th

Increase total 4S

F86

12

Manual operation

32

2nd

Sum 4S = Sum 4

F87

12

Add up to held value

F32

8th

SDP malfunction

F88

12

Compare with analog input signal

F33

8th

Put FLAG

F89

12

Is it bigger?

F34

8th

so return

F90

12

Bit reset

F35

8th

Loading PGC

F91

12

Save in R3

F36

8th

PGC - GFP?

F92

12

Counter - 1 = 0?

F37

8th

Interval timer

92

5

Try next bit position

F38

8th

ZWSU = total 6S - 1

F93

12

Held value in ACC

F39

8th

55 Output subsystem 1 / 21C 2, IC10, IC11

94

5

Switch to instant peak

return

F94

12

rectifying circuit

F40

9

ZWSU = total 6S + 1

F95

12

A / D implementation

F41

9

GFP malfunction

F96

12

Save PPC

F42

9

Put FLAG

F97

12

PPC> ITS?

F43

9

60 delay

F98

12

Save trigger and value

F44

9

Sum 4 = 0?

F99

12

PPC> SDP?

F45

9

Read

F100

13

ZWSU = ZWSU + 1

F46

9

Address = 0 0H

F101

13

ZWSU> SDT?

F47

9

Read PROM

Fl 02

13

Save trigger and value

F48

9

65 content = 00H or FFH

F103

13

SUM4 = SWSU = 0

F49

9

Empty PROM or no PROM inserted;

Switch to long delay, Exactly

Load minimum values

Fl 04

13

speed = 1.0 = 32 D.

F50

10th

Set error FLAG

F105 -

- 13th

9

658 lì

Legend

Reference figure sign

Legend

Reference figure sign

return

Address = address + I0H read PROM

Content = 00H or FFH address = F0H? last attempt address = address - 10H Read the 26 next digits

F106 13 checksum allowed? FU3 13

F107 13 s Load setting values into corresponding

F108 13 RAM memory locations Fl 14 13

F109 13 return Fl 15 13

F110 13 Load minimum values F116 13

Fili 13 set error flag FI 17 13

Fl 12 13 io return Fl 18 13

v

13 sheets of drawings

Claims (2)

658 755 2 PATENT CLAIMS 1. Circuit breaker with contacts for connection to a circuit to be protected and a disconnecting device for opening the contacts, a sensor and supply device (24, 28) for sensing the current flowing through the contacts (18) to generate a current corresponding to the strength of the current digital signal and to provide a driving force sufficient to actuate the circuit breaker, a memory (82) for storing a multiple time / current tripping characteristic, an electrical connection arrangement (172, porti, port 2) between the output of the sensor and supply device (24 , 28), the memory (82) and the isolating device (20, 22, 26) for analyzing electrical parameters of the associated circuit and for actuating the isolating device when the current flow through the circuit exceeds the time / current tripping characteristic, the memory ( 82) means for identifying each function of the multi-function trip characteristic never by means of a numerical mark, characterized in that a numerical display device (79, 80) is connected to the connection arrangement, further readable from the outside and a numerical representation of the parameters provides that a memory for storing a value of the contacts flowing current is present at which the separating device (20, 22, 26) is to be started, the stored value being displayed via the numerical display device (80) connected to the memory, and a device being provided which, after actuation the isolating device (20, 22, 26) operates to provide the display device (79, 80) with the numerical mark of the function of the multifunctional time / current tripping characteristic which was exceeded by the current flow through the contacts, which triggers the disconnection device caused, whereby the numerical display device information regarding the cause of the triggering a shows. 2. Circuit breaker according to claim 1, characterized in that the numerical mark comprises a single digital numerical value.