CH608902A5 - - Google Patents

Info

Publication number
CH608902A5
CH608902A5 CH76966A CH96676A CH608902A5 CH 608902 A5 CH608902 A5 CH 608902A5 CH 76966 A CH76966 A CH 76966A CH 96676 A CH96676 A CH 96676A CH 608902 A5 CH608902 A5 CH 608902A5
Authority
CH
Switzerland
Application number
CH76966A
Inventor
Hermann Ruckdeschel
Thomas Rambold
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19752517553 external-priority patent/DE2517553C3/de
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH608902A5 publication Critical patent/CH608902A5/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Logic Circuits (AREA)
  • Multi Processors (AREA)
  • Dram (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
CH76966A 1975-04-21 1976-01-27 CH608902A5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752517553 DE2517553C3 (de) 1975-04-21 Datenverarbeitungssystem aus mehreren Teilsystemen

Publications (1)

Publication Number Publication Date
CH608902A5 true CH608902A5 (de) 1979-01-31

Family

ID=5944546

Family Applications (1)

Application Number Title Priority Date Filing Date
CH76966A CH608902A5 (de) 1975-04-21 1976-01-27

Country Status (12)

Country Link
US (1) US4133029A (de)
JP (1) JPS51130133A (de)
AT (1) AT346915B (de)
AU (1) AU500780B2 (de)
BE (1) BE840957A (de)
CH (1) CH608902A5 (de)
FR (1) FR2308983A1 (de)
GB (1) GB1542136A (de)
IT (1) IT1059164B (de)
NL (1) NL7603797A (de)
SE (1) SE405517B (de)
ZA (1) ZA761804B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4491907A (en) * 1980-12-15 1985-01-01 Texas Instruments Incorporated Plurality of processors sharing the memory, the arithmetic logic unit and control circuitry all on a single semiconductor chip
US5768623A (en) * 1995-09-19 1998-06-16 International Business Machines Corporation System and method for sharing multiple storage arrays by dedicating adapters as primary controller and secondary controller for arrays reside in different host computers
US10684797B2 (en) * 2018-08-31 2020-06-16 Micron Technology, Inc. Command-in-pipeline counter for a memory device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3253262A (en) * 1960-12-30 1966-05-24 Bunker Ramo Data processing system
US3287705A (en) * 1963-03-07 1966-11-22 Rca Corp Computer system
US3302185A (en) * 1964-01-20 1967-01-31 Jr Andrew P Cox Flexible logic circuits for buffer memory
DE1524239B2 (de) * 1965-11-16 1971-07-22 Telefonaktiebolaget Lm Ericsson, Stockholm Schaltungsanordnung zur aufrechterhaltung eines fehler freien betriebes bei einer rechenanlage mit mindestens zwei parallel arbeitenden rechengeraeten
SE313849B (de) * 1966-03-25 1969-08-25 Ericsson Telefon Ab L M
CH515557A (it) * 1969-06-21 1971-11-15 Olivetti & Co Spa Calcolatore elettronico
GB1268283A (en) * 1970-04-02 1972-03-29 Ibm Connect module
NL7007615A (de) * 1970-05-27 1971-11-30
DE2027567A1 (de) * 1970-06-04 1971-12-09 Siemens Ag Speicher zur Zwischenspeicherung von Daten
US3678467A (en) * 1970-10-20 1972-07-18 Bell Telephone Labor Inc Multiprocessor with cooperative program execution
US3676861A (en) * 1970-12-30 1972-07-11 Honeywell Inf Systems Multiple mask registers for servicing interrupts in a multiprocessor system
NL7202501A (de) * 1972-02-25 1973-08-28
GB1422952A (en) * 1972-06-03 1976-01-28 Plessey Co Ltd Data processing system fault diagnostic arrangements
US3964056A (en) * 1974-04-08 1976-06-15 International Standard Electric Corporation System for transferring data between central units and controlled units

Also Published As

Publication number Publication date
SE405517B (sv) 1978-12-11
ZA761804B (en) 1977-03-30
NL7603797A (nl) 1976-10-25
US4133029A (en) 1979-01-02
GB1542136A (en) 1979-03-14
DE2517553A1 (de) 1976-11-04
BE840957A (fr) 1976-10-21
SE7602904L (sv) 1976-10-22
IT1059164B (it) 1982-05-31
AU500780B2 (en) 1979-05-31
ATA150876A (de) 1978-04-15
JPS51130133A (en) 1976-11-12
AT346915B (de) 1978-12-11
FR2308983B1 (de) 1978-05-12
AU1241076A (en) 1977-09-29
DE2517553B2 (de) 1977-02-24
FR2308983A1 (fr) 1976-11-19

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Legal Events

Date Code Title Description
PL Patent ceased