CH570041A5 - - Google Patents

Info

Publication number
CH570041A5
CH570041A5 CH402574A CH402574A CH570041A5 CH 570041 A5 CH570041 A5 CH 570041A5 CH 402574 A CH402574 A CH 402574A CH 402574 A CH402574 A CH 402574A CH 570041 A5 CH570041 A5 CH 570041A5
Authority
CH
Switzerland
Application number
CH402574A
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of CH570041A5 publication Critical patent/CH570041A5/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/141—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer comprising oxides only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6717—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/043—Dual dielectric
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/913—Active solid-state devices, e.g. transistors, solid-state diodes with means to absorb or localize unwanted impurities or defects from semiconductors, e.g. heavy metal gettering
CH402574A 1973-03-30 1974-03-22 CH570041A5 (Direct)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2316118A DE2316118C3 (de) 1973-03-30 1973-03-30 Verfahren zur Herstellung von Feldeffekttransistoren durch Anwendung einer selektiven Getterung

Publications (1)

Publication Number Publication Date
CH570041A5 true CH570041A5 (Direct) 1975-11-28

Family

ID=5876584

Family Applications (1)

Application Number Title Priority Date Filing Date
CH402574A CH570041A5 (Direct) 1973-03-30 1974-03-22

Country Status (13)

Country Link
US (1) US3897625A (Direct)
JP (1) JPS5648986B2 (Direct)
AT (1) AT339378B (Direct)
BE (1) BE813048A (Direct)
CA (1) CA991317A (Direct)
CH (1) CH570041A5 (Direct)
DE (1) DE2316118C3 (Direct)
FR (1) FR2223839B1 (Direct)
GB (1) GB1460489A (Direct)
IT (1) IT1003883B (Direct)
LU (1) LU69732A1 (Direct)
NL (1) NL7404256A (Direct)
SE (1) SE394767B (Direct)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2801085A1 (de) * 1977-01-11 1978-07-13 Zaidan Hojin Handotai Kenkyu Statischer induktionstransistor
US4333224A (en) * 1978-04-24 1982-06-08 Buchanan Bobby L Method of fabricating polysilicon/silicon junction field effect transistors
US4380113A (en) * 1980-11-17 1983-04-19 Signetics Corporation Process for fabricating a high capacity memory cell
US4998146A (en) * 1989-05-24 1991-03-05 Xerox Corporation High voltage thin film transistor
FR2774509B1 (fr) * 1998-01-30 2001-11-16 Sgs Thomson Microelectronics Procede de depot d'une region de silicium monocristallin

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3490964A (en) * 1966-04-29 1970-01-20 Texas Instruments Inc Process of forming semiconductor devices by masking and diffusion
US3783052A (en) * 1972-11-10 1974-01-01 Motorola Inc Process for manufacturing integrated circuits on an alumina substrate
US3837071A (en) * 1973-01-16 1974-09-24 Rca Corp Method of simultaneously making a sigfet and a mosfet

Also Published As

Publication number Publication date
LU69732A1 (Direct) 1974-07-17
NL7404256A (Direct) 1974-10-02
FR2223839B1 (Direct) 1978-02-10
DE2316118B2 (Direct) 1975-04-03
BE813048A (fr) 1974-07-15
US3897625A (en) 1975-08-05
GB1460489A (en) 1977-01-06
FR2223839A1 (Direct) 1974-10-25
DE2316118A1 (de) 1974-10-10
CA991317A (en) 1976-06-15
IT1003883B (it) 1976-06-10
ATA222874A (de) 1977-02-15
JPS5648986B2 (Direct) 1981-11-19
JPS49131082A (Direct) 1974-12-16
SE394767B (sv) 1977-07-04
AT339378B (de) 1977-10-10
DE2316118C3 (de) 1975-11-27

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Legal Events

Date Code Title Description
PL Patent ceased
PL Patent ceased