CH569363A5 - - Google Patents

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Publication number
CH569363A5
CH569363A5 CH1318874A CH1318874A CH569363A5 CH 569363 A5 CH569363 A5 CH 569363A5 CH 1318874 A CH1318874 A CH 1318874A CH 1318874 A CH1318874 A CH 1318874A CH 569363 A5 CH569363 A5 CH 569363A5
Authority
CH
Switzerland
Application number
CH1318874A
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH569363A5 publication Critical patent/CH569363A5/xx

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B1/00Conductors or conductive bodies characterised by the conductive materials; Selection of materials as conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • HELECTRICITY
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    • H01L23/00Details of semiconductor or other solid state devices
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    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H01L23/53252Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/05099Material
    • H01L2224/051Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171Chromium [Cr] as principal constituent
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
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    • H01L2924/01033Arsenic [As]
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    • H01L2924/01327Intermediate phases, i.e. intermetallics compounds
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    • H01L2924/014Solder alloys
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
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    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
CH1318874A 1973-10-12 1974-10-01 CH569363A5 (xx)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US406125A US3881884A (en) 1973-10-12 1973-10-12 Method for the formation of corrosion resistant electronic interconnections

Publications (1)

Publication Number Publication Date
CH569363A5 true CH569363A5 (xx) 1975-11-14

Family

ID=23606638

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1318874A CH569363A5 (xx) 1973-10-12 1974-10-01

Country Status (11)

Country Link
US (1) US3881884A (xx)
JP (1) JPS5310430B2 (xx)
BR (1) BR7408490D0 (xx)
CA (1) CA1023876A (xx)
CH (1) CH569363A5 (xx)
DE (1) DE2440481C3 (xx)
FR (1) FR2247820B1 (xx)
GB (1) GB1448034A (xx)
IT (1) IT1020141B (xx)
NL (1) NL7413310A (xx)
SE (1) SE401291B (xx)

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DE2834221C3 (de) * 1978-08-04 1981-04-30 Preh Elektrofeinmechanische Werke Jakob Preh Nachf. GmbH & Co, 8740 Bad Neustadt Verfahren zur Herstellung von Dünnschichtleiterbahnen
JPS5534414A (en) * 1978-09-01 1980-03-11 Sumitomo Bakelite Co Method of manufacturing printed circuit board
US4267012A (en) * 1979-04-30 1981-05-12 Fairchild Camera & Instrument Corp. Process for patterning metal connections on a semiconductor structure by using a tungsten-titanium etch resistant layer
US4290079A (en) * 1979-06-29 1981-09-15 International Business Machines Corporation Improved solder interconnection between a semiconductor device and a supporting substrate
US4360142A (en) * 1979-06-29 1982-11-23 International Business Machines Corporation Method of forming a solder interconnection capable of sustained high power levels between a semiconductor device and a supporting substrate
US4319264A (en) 1979-12-17 1982-03-09 International Business Machines Corporation Nickel-gold-nickel conductors for solid state devices
US4335506A (en) * 1980-08-04 1982-06-22 International Business Machines Corporation Method of forming aluminum/copper alloy conductors
JPS57141942A (en) * 1981-02-27 1982-09-02 Fuji Electric Corp Res & Dev Ltd Formation of bump electrode
DE3107943A1 (de) * 1981-03-02 1982-09-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von loetbaren und temperfaehigen edelmetallfreien duennschichtleiterbahnen
DE3107857C2 (de) * 1981-03-02 1984-08-23 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung von Dünnfilmschaltungen mit sehr gut lötbaren Leiterbahnschichtsystemen
US4505029A (en) * 1981-03-23 1985-03-19 General Electric Company Semiconductor device with built-up low resistance contact
US4386116A (en) * 1981-12-24 1983-05-31 International Business Machines Corporation Process for making multilayer integrated circuit substrate
US4396900A (en) * 1982-03-08 1983-08-02 The United States Of America As Represented By The Secretary Of The Navy Thin film microstrip circuits
DE3343362A1 (de) * 1983-11-30 1985-06-05 Siemens AG, 1000 Berlin und 8000 München Verfahren zur galvanischen herstellung metallischer, hoeckerartiger anschlusskontakte
US4606788A (en) * 1984-04-12 1986-08-19 Moran Peter L Methods of and apparatus for forming conductive patterns on a substrate
US4851895A (en) * 1985-05-06 1989-07-25 American Telephone And Telegraph Company, At&T Bell Laboratories Metallization for integrated devices
US4725877A (en) * 1986-04-11 1988-02-16 American Telephone And Telegraph Company, At&T Bell Laboratories Metallized semiconductor device including an interface layer
US4711791A (en) * 1986-08-04 1987-12-08 The Boc Group, Inc. Method of making a flexible microcircuit
JP2500523B2 (ja) * 1990-12-28 1996-05-29 日本電装株式会社 基板および基板の製造方法
GB2255672B (en) * 1991-05-10 1994-11-30 Northern Telecom Ltd Opto-electronic components
US5288541A (en) * 1991-10-17 1994-02-22 International Business Machines Corporation Method for metallizing through holes in thin film substrates, and resulting devices
US6882030B2 (en) * 1996-10-29 2005-04-19 Tru-Si Technologies, Inc. Integrated circuit structures with a conductor formed in a through hole in a semiconductor substrate and protruding from a surface of the substrate
EP2270846A3 (en) 1996-10-29 2011-12-21 ALLVIA, Inc. Integrated circuits and methods for their fabrication
US6498074B2 (en) 1996-10-29 2002-12-24 Tru-Si Technologies, Inc. Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners
US6322903B1 (en) 1999-12-06 2001-11-27 Tru-Si Technologies, Inc. Package of integrated circuits and vertical integration
US6717254B2 (en) 2001-02-22 2004-04-06 Tru-Si Technologies, Inc. Devices having substrates with opening passing through the substrates and conductors in the openings, and methods of manufacture
JP2003023239A (ja) * 2001-07-05 2003-01-24 Sumitomo Electric Ind Ltd 回路基板とその製造方法及び高出力モジュール
US6787916B2 (en) 2001-09-13 2004-09-07 Tru-Si Technologies, Inc. Structures having a substrate with a cavity and having an integrated circuit bonded to a contact pad located in the cavity
KR100396787B1 (ko) * 2001-11-13 2003-09-02 엘지전자 주식회사 반도체 패키지용 인쇄회로기판의 와이어 본딩패드 형성방법
US6908845B2 (en) * 2002-03-28 2005-06-21 Intel Corporation Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US6848177B2 (en) * 2002-03-28 2005-02-01 Intel Corporation Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
US20030183943A1 (en) * 2002-03-28 2003-10-02 Swan Johanna M. Integrated circuit die and an electronic assembly having a three-dimensional interconnection scheme
JP3962039B2 (ja) * 2004-06-17 2007-08-22 日東電工株式会社 配線回路形成用基板、配線回路基板および金属薄層の形成方法
US7339267B2 (en) * 2005-05-26 2008-03-04 Freescale Semiconductor, Inc. Semiconductor package and method for forming the same
US10373930B2 (en) * 2012-08-10 2019-08-06 Cyntec Co., Ltd Package structure and the method to fabricate thereof
JP6563366B2 (ja) * 2016-06-13 2019-08-21 新光電気工業株式会社 配線基板及びその製造方法
CN113133217A (zh) * 2020-01-15 2021-07-16 鹏鼎控股(深圳)股份有限公司 线路板的制备方法

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US3458925A (en) * 1966-01-20 1969-08-05 Ibm Method of forming solder mounds on substrates
US3677843A (en) * 1970-02-02 1972-07-18 Sylvania Electric Prod Method for fabricating multilayer magnetic devices

Also Published As

Publication number Publication date
BR7408490D0 (pt) 1975-07-29
DE2440481B2 (de) 1977-12-01
IT1020141B (it) 1977-12-20
SE7412333L (xx) 1975-04-14
US3881884A (en) 1975-05-06
DE2440481A1 (de) 1975-04-24
CA1023876A (en) 1978-01-03
NL7413310A (nl) 1975-04-15
JPS5068082A (xx) 1975-06-07
FR2247820A1 (xx) 1975-05-09
DE2440481C3 (de) 1978-08-03
FR2247820B1 (xx) 1976-10-22
JPS5310430B2 (xx) 1978-04-13
SE401291B (sv) 1978-04-24
GB1448034A (en) 1976-09-02

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