CH530125A - Dispositif de distribution de signaux logiques - Google Patents

Dispositif de distribution de signaux logiques

Info

Publication number
CH530125A
CH530125A CH219171A CH219171A CH530125A CH 530125 A CH530125 A CH 530125A CH 219171 A CH219171 A CH 219171A CH 219171 A CH219171 A CH 219171A CH 530125 A CH530125 A CH 530125A
Authority
CH
Switzerland
Prior art keywords
distribution device
logic signal
signal distribution
logic
signal
Prior art date
Application number
CH219171A
Other languages
English (en)
Inventor
Renoulin Roger
Original Assignee
Lannionnais Electronique
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lannionnais Electronique filed Critical Lannionnais Electronique
Publication of CH530125A publication Critical patent/CH530125A/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/183—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits by voting, the voting not being performed by the redundant components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00392—Modifications for increasing the reliability for protection by circuit redundancy
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
CH219171A 1970-02-27 1971-02-15 Dispositif de distribution de signaux logiques CH530125A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7007201A FR2080251A5 (fr) 1970-02-27 1970-02-27

Publications (1)

Publication Number Publication Date
CH530125A true CH530125A (fr) 1972-10-31

Family

ID=9051427

Family Applications (1)

Application Number Title Priority Date Filing Date
CH219171A CH530125A (fr) 1970-02-27 1971-02-15 Dispositif de distribution de signaux logiques

Country Status (12)

Country Link
US (1) US3686657A (fr)
JP (2) JPS462103A (fr)
BE (1) BE762927A (fr)
CA (1) CA971638A (fr)
CH (1) CH530125A (fr)
DE (1) DE2109023C2 (fr)
ES (1) ES388695A1 (fr)
FR (1) FR2080251A5 (fr)
GB (1) GB1307808A (fr)
NL (1) NL7102304A (fr)
SE (1) SE362561B (fr)
SU (1) SU382317A3 (fr)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH617014A5 (fr) * 1977-03-04 1980-04-30 Bbc Brown Boveri & Cie
FR2390856A1 (fr) * 1977-05-10 1978-12-08 Lannionnais Electronique Base de temps
GB2178926A (en) * 1985-08-09 1987-02-18 Plessey Co Plc Clock signal selection and security arrangements
JP2510750B2 (ja) * 1990-03-16 1996-06-26 株式会社日立製作所 フォ―ルト・トレラント・システム及びその冗長系間の同期方法並びに多重化クロツク発振器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DD66438A (fr) *
US3496539A (en) * 1966-07-15 1970-02-17 Itt Comparator using resistor-diode logic
US3458822A (en) * 1966-11-17 1969-07-29 Bell Telephone Labor Inc Clock pulse failure detector
US3522455A (en) * 1967-07-27 1970-08-04 Bendix Corp Method and means of synchronizing timing pulses of a three channel triplicated system

Also Published As

Publication number Publication date
GB1307808A (en) 1973-02-21
SE362561B (fr) 1973-12-10
FR2080251A5 (fr) 1971-11-12
SU382317A3 (fr) 1973-05-22
BE762927A (fr) 1971-08-16
DE2109023A1 (de) 1971-09-09
NL7102304A (fr) 1971-08-31
CA971638A (en) 1975-07-22
JPS462103A (fr) 1971-10-11
ES388695A1 (es) 1973-05-16
US3686657A (en) 1972-08-22
DE2109023C2 (de) 1983-02-10
JPS543336B1 (fr) 1979-02-21

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Legal Events

Date Code Title Description
PL Patent ceased