CH311394A - Method for producing a semiconductor arrangement and semiconductor arrangement produced by this method. - Google Patents

Method for producing a semiconductor arrangement and semiconductor arrangement produced by this method.

Info

Publication number
CH311394A
CH311394A CH311394DA CH311394A CH 311394 A CH311394 A CH 311394A CH 311394D A CH311394D A CH 311394DA CH 311394 A CH311394 A CH 311394A
Authority
CH
Switzerland
Prior art keywords
semiconductor arrangement
producing
produced
semiconductor
arrangement produced
Prior art date
Application number
Other languages
German (de)
Inventor
Ag Standard Telephon Und Radio
Original Assignee
Standard Telephon & Radio Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephon & Radio Ag filed Critical Standard Telephon & Radio Ag
Publication of CH311394A publication Critical patent/CH311394A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Weting (AREA)
CH311394D 1951-07-03 1952-06-28 Method for producing a semiconductor arrangement and semiconductor arrangement produced by this method. CH311394A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE311394X 1951-07-03

Publications (1)

Publication Number Publication Date
CH311394A true CH311394A (en) 1955-11-30

Family

ID=6129531

Family Applications (1)

Application Number Title Priority Date Filing Date
CH311394D CH311394A (en) 1951-07-03 1952-06-28 Method for producing a semiconductor arrangement and semiconductor arrangement produced by this method.

Country Status (3)

Country Link
BE (1) BE512585A (en)
CH (1) CH311394A (en)
GB (1) GB700156A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0022960A1 (en) * 1979-07-05 1981-01-28 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH Process for producing superficial piling-up defects in semiconductor wafers

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1027320B (en) * 1953-12-30 1958-04-03 Ibm Deutschland Tip transistor, the semiconductor surface of which is partially worn away by a small amount of thickness

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0022960A1 (en) * 1979-07-05 1981-01-28 Wacker-Chemitronic Gesellschaft für Elektronik-Grundstoffe mbH Process for producing superficial piling-up defects in semiconductor wafers
US5133160A (en) * 1979-07-05 1992-07-28 Wacker-Chemitronic Gesellschaft Fur Elektronik-Grundstoffe M.B.H. Process for the removal of specific crystal structures defects from semiconductor discs

Also Published As

Publication number Publication date
BE512585A (en)
GB700156A (en) 1953-11-25

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