CH301198A - Verfahren zur Formierung einer Halbleitereinrichtung. - Google Patents

Verfahren zur Formierung einer Halbleitereinrichtung.

Info

Publication number
CH301198A
CH301198A CH301198DA CH301198A CH 301198 A CH301198 A CH 301198A CH 301198D A CH301198D A CH 301198DA CH 301198 A CH301198 A CH 301198A
Authority
CH
Switzerland
Prior art keywords
forming
semiconductor device
semiconductor
Prior art date
Application number
Other languages
English (en)
Inventor
America Radio Corporation Of
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rca Corp filed Critical Rca Corp
Publication of CH301198A publication Critical patent/CH301198A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
CH301198D 1950-04-21 1951-04-17 Verfahren zur Formierung einer Halbleitereinrichtung. CH301198A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US301198XA 1950-04-21 1950-04-21

Publications (1)

Publication Number Publication Date
CH301198A true CH301198A (de) 1954-08-31

Family

ID=21852611

Family Applications (1)

Application Number Title Priority Date Filing Date
CH301198D CH301198A (de) 1950-04-21 1951-04-17 Verfahren zur Formierung einer Halbleitereinrichtung.

Country Status (5)

Country Link
BE (1) BE502674A (de)
CH (1) CH301198A (de)
FR (1) FR1040717A (de)
GB (1) GB693726A (de)
NL (2) NL89628C (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL97560C (de) * 1953-05-14
US2913704A (en) * 1954-07-06 1959-11-17 Sylvania Electric Prod Multiple emitter matrices

Also Published As

Publication number Publication date
GB693726A (en) 1953-07-08
BE502674A (de) 1900-01-01
FR1040717A (fr) 1953-10-19
NL89628C (de) 1900-01-01
NL160604B (nl) 1900-01-01

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