CA959383A - Thick oxide process for improving metal deposition and stability of semiconductor devices - Google Patents

Thick oxide process for improving metal deposition and stability of semiconductor devices

Info

Publication number
CA959383A
CA959383A CA158,352A CA158352A CA959383A CA 959383 A CA959383 A CA 959383A CA 158352 A CA158352 A CA 158352A CA 959383 A CA959383 A CA 959383A
Authority
CA
Canada
Prior art keywords
stability
semiconductor devices
metal deposition
thick oxide
oxide process
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA158,352A
Other versions
CA158352S (en
Inventor
Fredrick B. Jenne
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Boeing North American Inc
Original Assignee
North American Rockwell Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by North American Rockwell Corp filed Critical North American Rockwell Corp
Application granted granted Critical
Publication of CA959383A publication Critical patent/CA959383A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Formation Of Insulating Films (AREA)
CA158,352A 1972-04-05 1972-12-07 Thick oxide process for improving metal deposition and stability of semiconductor devices Expired CA959383A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US24128472A 1972-04-05 1972-04-05

Publications (1)

Publication Number Publication Date
CA959383A true CA959383A (en) 1974-12-17

Family

ID=22910046

Family Applications (1)

Application Number Title Priority Date Filing Date
CA158,352A Expired CA959383A (en) 1972-04-05 1972-12-07 Thick oxide process for improving metal deposition and stability of semiconductor devices

Country Status (7)

Country Link
JP (1) JPS4910673A (en)
CA (1) CA959383A (en)
DE (1) DE2302264A1 (en)
FR (1) FR2178859B3 (en)
GB (1) GB1361357A (en)
IT (1) IT976934B (en)
NL (1) NL7303610A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5128755A (en) * 1974-09-04 1976-03-11 Nippon Electric Co Handotaisochi no seizohoho
JPH03198327A (en) * 1989-12-26 1991-08-29 Fujitsu Ltd Manufacture of semiconductor device

Also Published As

Publication number Publication date
FR2178859A1 (en) 1973-11-16
NL7303610A (en) 1973-10-09
DE2302264A1 (en) 1973-10-25
JPS4910673A (en) 1974-01-30
GB1361357A (en) 1974-07-24
FR2178859B3 (en) 1976-01-30
IT976934B (en) 1974-09-10

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