CA924026A - Method for manufacturing a semiconductor integrated circuit isolated by dielectric material - Google Patents
Method for manufacturing a semiconductor integrated circuit isolated by dielectric materialInfo
- Publication number
- CA924026A CA924026A CA124253A CA124253A CA924026A CA 924026 A CA924026 A CA 924026A CA 124253 A CA124253 A CA 124253A CA 124253 A CA124253 A CA 124253A CA 924026 A CA924026 A CA 924026A
- Authority
- CA
- Canada
- Prior art keywords
- manufacturing
- integrated circuit
- dielectric material
- semiconductor integrated
- circuit isolated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003989 dielectric material Substances 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/026—Deposition thru hole in mask
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Weting (AREA)
- Element Separation (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8658670A JPS4945035B1 (nl) | 1970-10-05 | 1970-10-05 | |
JP4925071A JPS5521461B1 (nl) | 1971-07-06 | 1971-07-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
CA924026A true CA924026A (en) | 1973-04-03 |
Family
ID=26389625
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA124253A Expired CA924026A (en) | 1970-10-05 | 1971-10-04 | Method for manufacturing a semiconductor integrated circuit isolated by dielectric material |
Country Status (6)
Country | Link |
---|---|
US (1) | US3756877A (nl) |
CA (1) | CA924026A (nl) |
DE (1) | DE2149566C3 (nl) |
FR (1) | FR2110235B1 (nl) |
GB (1) | GB1345752A (nl) |
NL (1) | NL169802C (nl) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2294549A1 (fr) * | 1974-12-09 | 1976-07-09 | Radiotechnique Compelec | Procede de realisation de dispositifs optoelectroniques |
US3997381A (en) * | 1975-01-10 | 1976-12-14 | Intel Corporation | Method of manufacture of an epitaxial semiconductor layer on an insulating substrate |
JPS5215262A (en) * | 1975-07-28 | 1977-02-04 | Nippon Telegr & Teleph Corp <Ntt> | Semiconductor device and its manufacturing method |
DE69232347T2 (de) * | 1991-09-27 | 2002-07-11 | Canon K.K., Tokio/Tokyo | Verfahren zur Behandlung eines Substrats aus Silizium |
DE69233314T2 (de) * | 1991-10-11 | 2005-03-24 | Canon K.K. | Verfahren zur Herstellung von Halbleiter-Produkten |
US5843322A (en) * | 1996-12-23 | 1998-12-01 | Memc Electronic Materials, Inc. | Process for etching N, P, N+ and P+ type slugs and wafers |
CN111019659B (zh) * | 2019-12-06 | 2021-06-08 | 湖北兴福电子材料有限公司 | 一种选择性硅蚀刻液 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3372063A (en) * | 1964-12-22 | 1968-03-05 | Hitachi Ltd | Method for manufacturing at least one electrically isolated region of a semiconductive material |
FR1483068A (fr) * | 1965-05-10 | 1967-06-02 | Ibm | Montage de dispositif à semi-conducteur et procédé de fabrication |
-
1971
- 1971-10-04 CA CA124253A patent/CA924026A/en not_active Expired
- 1971-10-04 US US00186257A patent/US3756877A/en not_active Expired - Lifetime
- 1971-10-05 DE DE2149566A patent/DE2149566C3/de not_active Expired
- 1971-10-05 GB GB4625871A patent/GB1345752A/en not_active Expired
- 1971-10-05 FR FR7135864A patent/FR2110235B1/fr not_active Expired
- 1971-10-05 NL NLAANVRAGE7113629,A patent/NL169802C/nl not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
FR2110235B1 (nl) | 1977-03-18 |
US3756877A (en) | 1973-09-04 |
NL169802B (nl) | 1982-03-16 |
DE2149566C3 (de) | 1981-07-23 |
GB1345752A (en) | 1974-02-06 |
DE2149566A1 (de) | 1972-04-06 |
DE2149566B2 (de) | 1980-11-27 |
NL169802C (nl) | 1982-08-16 |
FR2110235A1 (nl) | 1972-06-02 |
NL7113629A (nl) | 1972-04-07 |
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