CA921616A - Multiple layer metal structure and processing - Google Patents

Multiple layer metal structure and processing

Info

Publication number
CA921616A
CA921616A CA093321A CA93321A CA921616A CA 921616 A CA921616 A CA 921616A CA 093321 A CA093321 A CA 093321A CA 93321 A CA93321 A CA 93321A CA 921616 A CA921616 A CA 921616A
Authority
CA
Canada
Prior art keywords
processing
metal structure
layer metal
multiple layer
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA093321A
Other languages
English (en)
Inventor
R. Johnson Larry
M. Whelton Robert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Application granted granted Critical
Publication of CA921616A publication Critical patent/CA921616A/en
Expired legal-status Critical Current

Links

Classifications

    • H10W20/435—
    • H10P95/00—
    • H10W20/40—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/02—Contacts, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/053—Field effect transistors fets
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
CA093321A 1969-10-31 1970-09-16 Multiple layer metal structure and processing Expired CA921616A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87453569A 1969-10-31 1969-10-31

Publications (1)

Publication Number Publication Date
CA921616A true CA921616A (en) 1973-02-20

Family

ID=25364025

Family Applications (1)

Application Number Title Priority Date Filing Date
CA093321A Expired CA921616A (en) 1969-10-31 1970-09-16 Multiple layer metal structure and processing

Country Status (9)

Country Link
US (1) US3586922A (enExample)
JP (2) JPS55907B1 (enExample)
BE (1) BE758160A (enExample)
CA (1) CA921616A (enExample)
CH (1) CH514236A (enExample)
DE (1) DE2047799C3 (enExample)
FR (1) FR2065609B1 (enExample)
GB (1) GB1308359A (enExample)
NL (1) NL158325B (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3675319A (en) * 1970-06-29 1972-07-11 Bell Telephone Labor Inc Interconnection of electrical devices
US3774079A (en) * 1971-06-25 1973-11-20 Ibm Monolithically fabricated tranistor circuit with multilayer conductive patterns
US3892606A (en) * 1973-06-28 1975-07-01 Ibm Method for forming silicon conductive layers utilizing differential etching rates
JPS5334484A (en) * 1976-09-10 1978-03-31 Toshiba Corp Forming method for multi layer wiring
NL7701559A (nl) * 1977-02-15 1978-08-17 Philips Nv Het maken van schuine hellingen aan metaal- patronen, alsmede substraat voor een geinte- greerde schakeling voorzien van een dergelijk patroon.
US4178674A (en) * 1978-03-27 1979-12-18 Intel Corporation Process for forming a contact region between layers of polysilicon with an integral polysilicon resistor
JPS57112027A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Manufacture of semiconductor device
FR2525389A1 (fr) * 1982-04-14 1983-10-21 Commissariat Energie Atomique Procede de positionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre
US4600663A (en) * 1982-07-06 1986-07-15 General Electric Company Microstrip line
US4703392A (en) * 1982-07-06 1987-10-27 General Electric Company Microstrip line and method for fabrication
DE3232837A1 (de) * 1982-09-03 1984-03-08 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen einer 2-ebenen-metallisierung fuer halbleiterbauelemente, insbesondere fuer leistungshalbleiterbauelemente wie thyristoren
DE3806287A1 (de) * 1988-02-27 1989-09-07 Asea Brown Boveri Aetzverfahren zur strukturierung einer mehrschicht-metallisierung
US6522762B1 (en) * 1999-09-07 2003-02-18 Microtronic A/S Silicon-based sensor system
KR101557942B1 (ko) * 2014-01-08 2015-10-12 주식회사 루멘스 발광 소자 패키지 및 발광 소자 패키지의 제조 방법

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL251064A (enExample) * 1955-11-04
US3382568A (en) * 1965-07-22 1968-05-14 Ibm Method for providing electrical connections to semiconductor devices
US3515607A (en) * 1967-06-21 1970-06-02 Western Electric Co Method of removing polymerised resist material from a substrate
US3510728A (en) * 1967-09-08 1970-05-05 Motorola Inc Isolation of multiple layer metal circuits with low temperature phosphorus silicates

Also Published As

Publication number Publication date
DE2047799C3 (de) 1981-12-03
DE2047799B2 (de) 1980-06-19
BE758160A (fr) 1971-04-01
DE2047799A1 (de) 1971-05-06
JPS5543251B1 (enExample) 1980-11-05
JPS55907B1 (enExample) 1980-01-10
NL158325B (nl) 1978-10-16
CH514236A (de) 1971-10-15
GB1308359A (en) 1973-02-21
US3586922A (en) 1971-06-22
FR2065609A1 (enExample) 1971-07-30
NL7015137A (enExample) 1971-05-04
FR2065609B1 (enExample) 1976-05-28

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