CA2668121C - Lock-free state merging in parallelized constraint satisfaction problem solvers - Google Patents

Lock-free state merging in parallelized constraint satisfaction problem solvers Download PDF

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Publication number
CA2668121C
CA2668121C CA2668121A CA2668121A CA2668121C CA 2668121 C CA2668121 C CA 2668121C CA 2668121 A CA2668121 A CA 2668121A CA 2668121 A CA2668121 A CA 2668121A CA 2668121 C CA2668121 C CA 2668121C
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solver
solvers
parallel
graphs
graph
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CA2668121A
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French (fr)
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CA2668121A1 (en
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Allen L. Brown Jr
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Microsoft Technology Licensing LLC
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Microsoft Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/31—Programming languages or programming paradigms
    • G06F8/314—Parallel programming languages
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/31—Programming languages or programming paradigms
    • G06F8/313—Logic programming, e.g. PROLOG programming language
    • G06F8/3135—Unification or backtracking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computing arrangements using knowledge-based models
    • G06N5/01—Dynamic search techniques; Heuristics; Dynamic trees; Branch-and-bound
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N20/00—Machine learning
    • G06N20/10—Machine learning using kernel methods, e.g. support vector machines [SVM]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N5/00—Computing arrangements using knowledge-based models
    • G06N5/04—Inference or reasoning models
    • G06N5/048—Fuzzy inferencing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N7/00—Computing arrangements based on specific mathematical models
    • G06N7/01—Probabilistic graphical models, e.g. probabilistic networks

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Physics (AREA)
  • Computational Linguistics (AREA)
  • Artificial Intelligence (AREA)
  • Computer Hardware Design (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
CA2668121A 2006-11-20 2007-11-19 Lock-free state merging in parallelized constraint satisfaction problem solvers Expired - Fee Related CA2668121C (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/602,092 US7543266B2 (en) 2006-11-20 2006-11-20 Lock-free state merging in parallelized constraint satisfaction problem solvers
US11/602,092 2006-11-20
PCT/US2007/085149 WO2008064185A1 (en) 2006-11-20 2007-11-19 Lock-free state merging in parallelized constraint satisfaction problem solvers

Publications (2)

Publication Number Publication Date
CA2668121A1 CA2668121A1 (en) 2008-05-29
CA2668121C true CA2668121C (en) 2015-04-21

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CA2668121A Expired - Fee Related CA2668121C (en) 2006-11-20 2007-11-19 Lock-free state merging in parallelized constraint satisfaction problem solvers

Country Status (8)

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US (1) US7543266B2 (enExample)
EP (1) EP2084615B1 (enExample)
JP (1) JP4707760B2 (enExample)
KR (1) KR101432328B1 (enExample)
CN (1) CN101542460B (enExample)
CA (1) CA2668121C (enExample)
IL (1) IL197775A (enExample)
WO (1) WO2008064185A1 (enExample)

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US20100057647A1 (en) * 2008-09-04 2010-03-04 Microsoft Corporation Accommodating learned clauses in reconfigurable hardware accelerator for boolean satisfiability solver
CN101685408B (zh) * 2008-09-24 2013-10-09 国际商业机器公司 多个线程并行访问共享数据结构的方法及装置
US20100169618A1 (en) * 2008-12-30 2010-07-01 Microsoft Corporation Identifying concurrency control from a sequential proof
US8346704B2 (en) * 2009-05-13 2013-01-01 Microsoft Corporation Controlled constraint sharing in parallel problem solvers
US9031890B2 (en) * 2010-08-04 2015-05-12 Sherwin Han Inverse function method of boolean satisfiability (SAT)
CN102467583B (zh) * 2010-10-29 2014-07-23 国际商业机器公司 追踪不确定信号的方法和装置
US8589327B2 (en) 2011-04-22 2013-11-19 International Business Machines Corporation Efficiently determining boolean satisfiability with lazy constraints
US8413091B2 (en) 2011-04-22 2013-04-02 International Business Machines Corporation Enhancing redundancy removal with early merging
US8874498B2 (en) 2011-09-16 2014-10-28 International Business Machines Corporation Unsupervised, supervised, and reinforced learning via spiking computation
US8738554B2 (en) 2011-09-16 2014-05-27 International Business Machines Corporation Event-driven universal neural network circuit
US8799199B2 (en) * 2011-12-14 2014-08-05 International Business Machines Corporation Universal, online learning in multi-modal perception-action semilattices
US8626684B2 (en) 2011-12-14 2014-01-07 International Business Machines Corporation Multi-modal neural network for universal, online learning
US8676866B2 (en) * 2012-03-19 2014-03-18 Sap Ag Computing canonical hierarchical schemas
WO2014152541A1 (en) 2013-03-15 2014-09-25 Sherwin Han Spatial arithmetic method of sequence alignment
CN105190632B (zh) 2013-04-04 2018-06-05 韩小文 构造非确定性(np)图灵机的多项式方法
US9311429B2 (en) 2013-07-23 2016-04-12 Sap Se Canonical data model for iterative effort reduction in business-to-business schema integration
FI20135946L (fi) * 2013-09-23 2015-03-24 Procomp Solutions Oy Rinnakkainen ratkaisun muodostaminen
US11481468B2 (en) * 2014-06-03 2022-10-25 Qualcomm Technologies, Inc. Systems and methods for solving unrestricted incremental constraint problems
US9418137B2 (en) 2014-08-29 2016-08-16 Sherwin Han Database without structured query language
US9424103B2 (en) * 2014-09-30 2016-08-23 Hong Kong Applied Science and Technology Research Institute Company Limited Adaptive lock for a computing system having multiple runtime environments and multiple processing units
US10540477B2 (en) * 2016-05-02 2020-01-21 Siemens Industry Software Nv Space modeling language for the generation of engineering designs
CN106201988A (zh) * 2016-08-03 2016-12-07 桂林电子科技大学 一种重构高性能目标阵列的方法
KR102820745B1 (ko) * 2018-12-31 2025-06-13 삼성전자주식회사 폴링 시간을 예측하는 뉴럴 네트워크 시스템 및 이를 이용한 뉴럴 네트워크 모델 처리 방법

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JPH0789220B2 (ja) * 1987-05-28 1995-09-27 富士写真フイルム株式会社 版材焼付装置
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JPH0785748B2 (ja) * 1991-08-06 1995-09-20 三郎 狩野 ゴルフ場のピンに付設する標示体
US5469367A (en) * 1994-06-06 1995-11-21 University Technologies International Inc. Methodology and apparatus for modular partitioning for the machine design of asynchronous circuits
JPH10275084A (ja) * 1997-03-31 1998-10-13 Toshiba Corp 制約充足問題の解決装置及び解決方法、システム構築装置及び構築方法
US6038392A (en) * 1998-05-27 2000-03-14 Nec Usa, Inc. Implementation of boolean satisfiability with non-chronological backtracking in reconfigurable hardware
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Also Published As

Publication number Publication date
CN101542460B (zh) 2012-03-21
IL197775A0 (en) 2009-12-24
IL197775A (en) 2013-07-31
CN101542460A (zh) 2009-09-23
KR20090085028A (ko) 2009-08-06
KR101432328B1 (ko) 2014-08-20
JP4707760B2 (ja) 2011-06-22
EP2084615A4 (en) 2012-08-01
US7543266B2 (en) 2009-06-02
EP2084615B1 (en) 2017-10-25
JP2010510591A (ja) 2010-04-02
EP2084615A1 (en) 2009-08-05
US20080120490A1 (en) 2008-05-22
CA2668121A1 (en) 2008-05-29
WO2008064185A1 (en) 2008-05-29

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