CA2392503A1 - Module informatique et carte-mere - Google Patents

Module informatique et carte-mere Download PDF

Info

Publication number
CA2392503A1
CA2392503A1 CA002392503A CA2392503A CA2392503A1 CA 2392503 A1 CA2392503 A1 CA 2392503A1 CA 002392503 A CA002392503 A CA 002392503A CA 2392503 A CA2392503 A CA 2392503A CA 2392503 A1 CA2392503 A1 CA 2392503A1
Authority
CA
Canada
Prior art keywords
motherboard
computer module
cpu
bus
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002392503A
Other languages
English (en)
Inventor
Kevin Paul Heawood
Neil Thompson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NMI Electronics Ltd
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2392503A1 publication Critical patent/CA2392503A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Logic Circuits (AREA)

Abstract

L'invention porte sur un module (102) informatique à carte unique doté d'une matrice FPGA (107) qui est disposée de façon à adapter des adresses et des fonctions de bus à partir d'une unité centrale (103) aux connexions (105) de bus requises d'une carte-mère (101). Le module peut être agencé de façon à desservir les connexions de bus requises et à adapter les adresses de bus.
CA002392503A 1999-11-25 1999-11-25 Module informatique et carte-mere Abandoned CA2392503A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/GB1999/003946 WO2001038997A1 (fr) 1999-11-25 1999-11-25 Module informatique et carte-mere

Publications (1)

Publication Number Publication Date
CA2392503A1 true CA2392503A1 (fr) 2001-05-31

Family

ID=10848196

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002392503A Abandoned CA2392503A1 (fr) 1999-11-25 1999-11-25 Module informatique et carte-mere

Country Status (4)

Country Link
EP (1) EP1232443A1 (fr)
AU (1) AU1287200A (fr)
CA (1) CA2392503A1 (fr)
WO (1) WO2001038997A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0201223D0 (en) * 2002-01-19 2002-03-06 Inc Technologies Holdings Ltd Kiosk Technology kit
CN1299213C (zh) * 2002-09-19 2007-02-07 华为技术有限公司 利用系统板上的cpu进行集中控制处理的方法
CN105988516B (zh) * 2015-02-12 2020-08-04 中兴通讯股份有限公司 处理器子卡、适配其的电源板及系统板

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5548782A (en) * 1993-05-07 1996-08-20 National Semiconductor Corporation Apparatus for preventing transferring of data with peripheral device for period of time in response to connection or disconnection of the device with the apparatus
US5734872A (en) * 1994-09-19 1998-03-31 Kelly; Michael CPU interconnect system for a computer
US5920731A (en) * 1997-02-21 1999-07-06 Vlsi Technology, Inc. Single-housing electrical device self-configurable to connect to PCMCIA compliant or non-PCMCIA compliant host interfaces

Also Published As

Publication number Publication date
EP1232443A1 (fr) 2002-08-21
AU1287200A (en) 2001-06-04
WO2001038997A1 (fr) 2001-05-31

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Legal Events

Date Code Title Description
FZDE Discontinued