CA2392503A1 - Module informatique et carte-mere - Google Patents
Module informatique et carte-mere Download PDFInfo
- Publication number
- CA2392503A1 CA2392503A1 CA002392503A CA2392503A CA2392503A1 CA 2392503 A1 CA2392503 A1 CA 2392503A1 CA 002392503 A CA002392503 A CA 002392503A CA 2392503 A CA2392503 A CA 2392503A CA 2392503 A1 CA2392503 A1 CA 2392503A1
- Authority
- CA
- Canada
- Prior art keywords
- motherboard
- computer module
- cpu
- bus
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
Abstract
L'invention porte sur un module (102) informatique à carte unique doté d'une matrice FPGA (107) qui est disposée de façon à adapter des adresses et des fonctions de bus à partir d'une unité centrale (103) aux connexions (105) de bus requises d'une carte-mère (101). Le module peut être agencé de façon à desservir les connexions de bus requises et à adapter les adresses de bus.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/GB1999/003946 WO2001038997A1 (fr) | 1999-11-25 | 1999-11-25 | Module informatique et carte-mere |
Publications (1)
Publication Number | Publication Date |
---|---|
CA2392503A1 true CA2392503A1 (fr) | 2001-05-31 |
Family
ID=10848196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002392503A Abandoned CA2392503A1 (fr) | 1999-11-25 | 1999-11-25 | Module informatique et carte-mere |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1232443A1 (fr) |
AU (1) | AU1287200A (fr) |
CA (1) | CA2392503A1 (fr) |
WO (1) | WO2001038997A1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB0201223D0 (en) * | 2002-01-19 | 2002-03-06 | Inc Technologies Holdings Ltd | Kiosk Technology kit |
CN1299213C (zh) * | 2002-09-19 | 2007-02-07 | 华为技术有限公司 | 利用系统板上的cpu进行集中控制处理的方法 |
CN105988516B (zh) * | 2015-02-12 | 2020-08-04 | 中兴通讯股份有限公司 | 处理器子卡、适配其的电源板及系统板 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5548782A (en) * | 1993-05-07 | 1996-08-20 | National Semiconductor Corporation | Apparatus for preventing transferring of data with peripheral device for period of time in response to connection or disconnection of the device with the apparatus |
US5734872A (en) * | 1994-09-19 | 1998-03-31 | Kelly; Michael | CPU interconnect system for a computer |
US5920731A (en) * | 1997-02-21 | 1999-07-06 | Vlsi Technology, Inc. | Single-housing electrical device self-configurable to connect to PCMCIA compliant or non-PCMCIA compliant host interfaces |
-
1999
- 1999-11-25 CA CA002392503A patent/CA2392503A1/fr not_active Abandoned
- 1999-11-25 WO PCT/GB1999/003946 patent/WO2001038997A1/fr not_active Application Discontinuation
- 1999-11-25 EP EP99956229A patent/EP1232443A1/fr not_active Withdrawn
- 1999-11-25 AU AU12872/00A patent/AU1287200A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO2001038997A1 (fr) | 2001-05-31 |
AU1287200A (en) | 2001-06-04 |
EP1232443A1 (fr) | 2002-08-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5898846A (en) | CPU interconnect system for a computer | |
US5546563A (en) | Single chip replacement upgradeable computer motherboard with enablement of inserted upgrade CPU chip | |
EP0992000B1 (fr) | Systeme d'interface de bus et procede | |
US6918027B2 (en) | System and method for in-system programming through an on-system JTAG bridge of programmable logic devices on multiple circuit boards of a system | |
US4935868A (en) | Multiple port bus interface controller with slave bus | |
EP1080418B1 (fr) | Fond de panier a configuration multiple | |
US6198303B1 (en) | Configuration eprom with programmable logic | |
US6044423A (en) | Identification of a swappable device in a portable computer | |
KR100264632B1 (ko) | Pci버스컴퓨터용프로그래머블구성레지스터를구비한증설보드 | |
EP1011050B1 (fr) | Procédé et système pour enficher des cartes adapteurs sous tension dans un environnement d'extension de bus | |
US5551012A (en) | Single socket upgradeable computer motherboard with automatic detection and socket reconfiguration for inserted CPU chip | |
US20080028186A1 (en) | FPGA Co-Processor For Accelerated Computation | |
US8756360B1 (en) | PCI-E compatible chassis having multi-host capability | |
US6237048B1 (en) | Adapter card with vendor unique differentiation and customization using PCI sideband signals | |
US5848250A (en) | Processor upgrade system for a personal computer | |
JPH04317156A (ja) | ドッキング可能ポータブルコンピュータシステム及びそのシステムでの通信ポート割り当て自動構成方法 | |
WO1998048356A1 (fr) | Controleur de peripheriques microprogramme a puce unique dote d'une memoire telechargeable a personnalite 'fantome', optimise pour des transferts de donnees bidirectionnels sur un canal de communications | |
CZ284019B6 (cs) | Doplňková deska s automatickým přizpůsobením konfiguraci štěrbinové přípojky | |
EP0774713B1 (fr) | Circuit intégré ayant une configuration de bus programmable | |
EP0351961A2 (fr) | Appareil de reconfiguration automatique | |
US20030023793A1 (en) | Method and apparatus for in-system programming through a common connection point of programmable logic devices on multiple circuit boards of a system | |
US20040225783A1 (en) | Bus to multiple jtag bus bridge | |
EP0657826A1 (fr) | Initialisation interprocesseur à poignée de mains pour l'identification de l'augmentation de processeur | |
EP0990973B1 (fr) | Procédé et dispositif pour faciliter l'insertion et l'enlèvement de modules dans un système ordinateur | |
EP0104545A2 (fr) | Unité de commande pour porte d'entrée/sortie |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
FZDE | Discontinued |