CA2186141A1 - An iterative method of recording analog signals - Google Patents

An iterative method of recording analog signals

Info

Publication number
CA2186141A1
CA2186141A1 CA002186141A CA2186141A CA2186141A1 CA 2186141 A1 CA2186141 A1 CA 2186141A1 CA 002186141 A CA002186141 A CA 002186141A CA 2186141 A CA2186141 A CA 2186141A CA 2186141 A1 CA2186141 A1 CA 2186141A1
Authority
CA
Canada
Prior art keywords
coarse
fine
pulse
pulses
cycle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CA002186141A
Other languages
French (fr)
Other versions
CA2186141C (en
Inventor
David Sowards
Trevor Blyth
Sakhawat Khan
Lawrence Engh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Information Storage Devices Inc
Original Assignee
David Sowards
Trevor Blyth
Sakhawat Khan
Lawrence Engh
Information Storage Devices, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by David Sowards, Trevor Blyth, Sakhawat Khan, Lawrence Engh, Information Storage Devices, Inc. filed Critical David Sowards
Publication of CA2186141A1 publication Critical patent/CA2186141A1/en
Application granted granted Critical
Publication of CA2186141C publication Critical patent/CA2186141C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44Indication or identification of errors, e.g. for repair
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C27/00Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/005Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS

Abstract

Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques for later playback. The invention allows setting of various parameters for the multi iterative programming technique after chip fabrication so as to allow tighter control and thus higher resolution analog signal sample storage in a given or minimum amount of time. Such parameters include, but are not limited to: the step down voltage [VSD] from the coarse programming cycle to the fine programming cycle, the incremental voltage increase between each fine pulse, the pulse width of each fine pulse, the number of fine pulses [Nf], the incremental voltage increase between each coarse pulse [VC], the pulse width of each coarse pulse, the number of coarse pulses [NC], and the offset [VOS], which stops further coarse pulses and holds the last coarse level as a reference for the following fine cycle.
CA002186141A 1995-02-23 1995-02-23 An iterative method of recording analog signals Expired - Fee Related CA2186141C (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1995/002258 WO1996026523A1 (en) 1995-02-23 1995-02-23 An iterative method of recording analog signals

Publications (2)

Publication Number Publication Date
CA2186141A1 true CA2186141A1 (en) 1996-08-29
CA2186141C CA2186141C (en) 2001-11-27

Family

ID=22248717

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002186141A Expired - Fee Related CA2186141C (en) 1995-02-23 1995-02-23 An iterative method of recording analog signals

Country Status (6)

Country Link
EP (1) EP0757836A4 (en)
JP (1) JPH09512380A (en)
KR (1) KR970702563A (en)
AU (1) AU1968995A (en)
CA (1) CA2186141C (en)
WO (1) WO1996026523A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6208542B1 (en) 1998-06-30 2001-03-27 Sandisk Corporation Techniques for storing digital data in an analog or multilevel memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59106152A (en) * 1982-12-10 1984-06-19 Nec Corp Semiconductor device
US4989179A (en) * 1988-07-13 1991-01-29 Information Storage Devices, Inc. High density integrated circuit analog signal recording and playback system
US5241494A (en) * 1990-09-26 1993-08-31 Information Storage Devices Integrated circuit system for analog signal recording and playback
US5220531A (en) * 1991-01-02 1993-06-15 Information Storage Devices, Inc. Source follower storage cell and improved method and apparatus for iterative write for integrated circuit analog signal recording and playback
US5166562A (en) * 1991-05-09 1992-11-24 Synaptics, Incorporated Writable analog reference voltage storage device

Also Published As

Publication number Publication date
KR970702563A (en) 1997-05-13
EP0757836A1 (en) 1997-02-12
EP0757836A4 (en) 1999-08-04
CA2186141C (en) 2001-11-27
AU1968995A (en) 1996-09-11
WO1996026523A1 (en) 1996-08-29
JPH09512380A (en) 1997-12-09

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