CA2186141A1 - An iterative method of recording analog signals - Google Patents
An iterative method of recording analog signalsInfo
- Publication number
- CA2186141A1 CA2186141A1 CA002186141A CA2186141A CA2186141A1 CA 2186141 A1 CA2186141 A1 CA 2186141A1 CA 002186141 A CA002186141 A CA 002186141A CA 2186141 A CA2186141 A CA 2186141A CA 2186141 A1 CA2186141 A1 CA 2186141A1
- Authority
- CA
- Canada
- Prior art keywords
- coarse
- fine
- pulse
- pulses
- cycle
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/44—Indication or identification of errors, e.g. for repair
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/005—Electric analogue stores, e.g. for storing instantaneous values with non-volatile charge storage, e.g. on floating gate or MNOS
Abstract
Method and apparatus for adjustment and control of an iterative method of recording analog signals with on-chip trimming techniques for later playback. The invention allows setting of various parameters for the multi iterative programming technique after chip fabrication so as to allow tighter control and thus higher resolution analog signal sample storage in a given or minimum amount of time. Such parameters include, but are not limited to: the step down voltage [VSD] from the coarse programming cycle to the fine programming cycle, the incremental voltage increase between each fine pulse, the pulse width of each fine pulse, the number of fine pulses [Nf], the incremental voltage increase between each coarse pulse [VC], the pulse width of each coarse pulse, the number of coarse pulses [NC], and the offset [VOS], which stops further coarse pulses and holds the last coarse level as a reference for the following fine cycle.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US1995/002258 WO1996026523A1 (en) | 1995-02-23 | 1995-02-23 | An iterative method of recording analog signals |
Publications (2)
Publication Number | Publication Date |
---|---|
CA2186141A1 true CA2186141A1 (en) | 1996-08-29 |
CA2186141C CA2186141C (en) | 2001-11-27 |
Family
ID=22248717
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA002186141A Expired - Fee Related CA2186141C (en) | 1995-02-23 | 1995-02-23 | An iterative method of recording analog signals |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP0757836A4 (en) |
JP (1) | JPH09512380A (en) |
KR (1) | KR970702563A (en) |
AU (1) | AU1968995A (en) |
CA (1) | CA2186141C (en) |
WO (1) | WO1996026523A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6208542B1 (en) | 1998-06-30 | 2001-03-27 | Sandisk Corporation | Techniques for storing digital data in an analog or multilevel memory |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59106152A (en) * | 1982-12-10 | 1984-06-19 | Nec Corp | Semiconductor device |
US4989179A (en) * | 1988-07-13 | 1991-01-29 | Information Storage Devices, Inc. | High density integrated circuit analog signal recording and playback system |
US5241494A (en) * | 1990-09-26 | 1993-08-31 | Information Storage Devices | Integrated circuit system for analog signal recording and playback |
US5220531A (en) * | 1991-01-02 | 1993-06-15 | Information Storage Devices, Inc. | Source follower storage cell and improved method and apparatus for iterative write for integrated circuit analog signal recording and playback |
US5166562A (en) * | 1991-05-09 | 1992-11-24 | Synaptics, Incorporated | Writable analog reference voltage storage device |
-
1995
- 1995-02-23 EP EP95912592A patent/EP0757836A4/en not_active Withdrawn
- 1995-02-23 WO PCT/US1995/002258 patent/WO1996026523A1/en not_active Application Discontinuation
- 1995-02-23 KR KR1019960705936A patent/KR970702563A/en not_active Application Discontinuation
- 1995-02-23 JP JP8525635A patent/JPH09512380A/en active Pending
- 1995-02-23 AU AU19689/95A patent/AU1968995A/en not_active Abandoned
- 1995-02-23 CA CA002186141A patent/CA2186141C/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR970702563A (en) | 1997-05-13 |
EP0757836A1 (en) | 1997-02-12 |
EP0757836A4 (en) | 1999-08-04 |
CA2186141C (en) | 2001-11-27 |
AU1968995A (en) | 1996-09-11 |
WO1996026523A1 (en) | 1996-08-29 |
JPH09512380A (en) | 1997-12-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
EEER | Examination request | ||
MKLA | Lapsed |