CA2076533A1 - Methode et dispositif de transfert de donnees via une memoire intermediaire - Google Patents

Methode et dispositif de transfert de donnees via une memoire intermediaire

Info

Publication number
CA2076533A1
CA2076533A1 CA002076533A CA2076533A CA2076533A1 CA 2076533 A1 CA2076533 A1 CA 2076533A1 CA 002076533 A CA002076533 A CA 002076533A CA 2076533 A CA2076533 A CA 2076533A CA 2076533 A1 CA2076533 A1 CA 2076533A1
Authority
CA
Canada
Prior art keywords
data
staging
memory
device interface
mass storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002076533A
Other languages
English (en)
Inventor
Chris W. Eidler
Hoke S. Johnson Iii
Kaushik S. Shah
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of CA2076533A1 publication Critical patent/CA2076533A1/fr
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
CA002076533A 1990-02-28 1991-02-27 Methode et dispositif de transfert de donnees via une memoire intermediaire Abandoned CA2076533A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US48653590A 1990-02-28 1990-02-28
US486,535 1990-02-28

Publications (1)

Publication Number Publication Date
CA2076533A1 true CA2076533A1 (fr) 1991-08-29

Family

ID=23932273

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002076533A Abandoned CA2076533A1 (fr) 1990-02-28 1991-02-27 Methode et dispositif de transfert de donnees via une memoire intermediaire

Country Status (5)

Country Link
EP (1) EP0517808A1 (fr)
JP (1) JP2989665B2 (fr)
AU (1) AU7497091A (fr)
CA (1) CA2076533A1 (fr)
WO (1) WO1991013397A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0528273B1 (fr) * 1991-08-16 1999-10-27 Fujitsu Limited Mémoire tampon et sa méthode de gestion
JPH11110315A (ja) * 1997-07-31 1999-04-23 Matsushita Electric Ind Co Ltd 通信装置
CN103199952A (zh) * 2012-01-06 2013-07-10 上海华虹集成电路有限责任公司 通信接收机中的业务数据传输方法及业务数据传输模块

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3824551A (en) * 1972-05-18 1974-07-16 Little Inc A Releasable buffer memory for data processor
US4507760A (en) * 1982-08-13 1985-03-26 At&T Bell Laboratories First-in, first-out (FIFO) memory configuration for queue storage
JPS60181942A (ja) * 1984-02-29 1985-09-17 Fujitsu Ltd メモリ制御装置
JPS6336348A (ja) * 1986-07-30 1988-02-17 Toshiba Corp バツフアメモリ管理方法
FR2633744B1 (fr) * 1988-07-01 1991-02-08 Dassault Electronique Dispositif de memoire vive electronique

Also Published As

Publication number Publication date
JPH05505049A (ja) 1993-07-29
JP2989665B2 (ja) 1999-12-13
EP0517808A1 (fr) 1992-12-16
AU7497091A (en) 1991-09-18
WO1991013397A1 (fr) 1991-09-05

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CA2076533A1 (fr) Methode et dispositif de transfert de donnees via une memoire intermediaire

Legal Events

Date Code Title Description
FZDE Dead