CA2045227A1 - High memory density package - Google Patents

Abstract

HIGH MEMORY DENSITY PACKAGE

Abstract Disclosed is a high density microelectronic circuit package. The circuit package includes a plurality of IC
chips, as memory chips, on a circuitized flexible tape, which is, in turn, bonded to a printed circuit board. The circuitized flexible tape extends outwardly from the printed circuit board and has a plurality of IC chips mounted on I/O
pads on the tape. The individual IC chips are in thermal contact with a heat sink means on the surfaces thereof opposite the circuitized flexible tape. The circuitized flexible tape and the heat sink are bonded to a printed circuit board.

Description

HIGH MEMORY DENSITY PACKAGE

FIELD OF THE INVENTION

This invention relates to microelectronic circuit packages, especially multi-chip memory packages. The circuit packages are characterized by efficient utilization of I/O
circuitization, a high memory density, and efficient thermal management.

Background of the Invention The general structures and manufacturing processes for electronic packages are described in, for example, Donald P.
Seraphim, Ronald Lasky, and Che-Yo Li, Principles of Electronic Packaqinq, McGraw-Hill Book Company, New York, New York, (1988), and Rao R. Tummala and Eugene J.
Rymaszewski, Microelectronic Packaqinq Handbook, Van Nostrand Reinhold, New York, New York (1988).

As described by Seraphim et al., and Tummala et al., an electronic circuit contains many individual electronic circuit components, e.g., thousands or even millions of individual resistors, capacitors, inductors, diodes, and transistors. These individual circuit components are interconnected to form the circuits, and the individual circuits are interconnected to form functional units.
Power and signal distribution are done through these interconnections. The individual functional units re~uire mechanical support and structural protection. The electrical circuits require electrical energy to function, and the removal of thermal energy to remain functional.
Microelectronic packages, such as chips, modules, connectors, cables, circuit cards, and circuit boards, are used to protect, house, cool, and interconnect circuit components and circuits.
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Within an integrated circuit, circuit component-to- -circuit component and circuit-to-circuit interconnection, '; ' ~

2045Z2'7 heat dissipation, and mechanical protection are provided by an integrated circuit chip. This chip enclosed within its module is referred to as the first level of packaging.

There is at least one additional level of packaging.
The second level of packaging is the circuit card. A
circuit card performs at least four functions. First, the circuit card is employed because the total required circuit or bit count to perform a desired function exceeds the bit count of the first level package, i.e., the chip. Second, the second level package, i.e., the circuit card, provides a site for components that are not readily integrated into the first level package, i.e., the chip or module. These components include, e.g., capacitors, precision resistors, inductors, electromechanical switches, optical couplers, and the like. Third, the circuit card provides for signal interconnection with other circuit elements. Fourth, the second level package may provide for thermal management, i.e., heat dissipation.

In most applications, and especially high performance workstations, mid range computers, and main frame computers, there is a third level of packaging. This is the board level package. The board contains connectors to accept a plurality of cards, circuitization to provide communication between the cards, I/O devices to provide external communication, and, frequently, sophisticated thermal management systems.
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Modern application programs, sophisticated operating systems, and multi-tasking permit large amounts of random access memory to be utilized. This results in ever-increasing memory magnitudeæ and memory densities. The increasing memory densities are accompanied by increasing circuit densities, wiring densities, and I/O densities, all of which impose higher thermal loads on electronic packages.
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F.E. Andros and B.G. Sammakia, Thermal Manaqement in Flectronic Packaqinq, in Seraphim. Lasky, and Li, ~rinciples .

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EN9-90-010 3 20~5Z27 of Electronic Packaging, at page 127, state that to achieve improved performance in data processing equipment, trends in electronic packaging designs have moved toward larger circuit chips, higher I/O density per chip, increased circuit density per chip, and increased system reliability.
These increases in chip size, I/O density, circuit density, and reliability have brought about improved performance by, among other things, reducing electrical line lengths and point to point flight times. Simultaneously, these improvements have significantly increased power density.
For example, Antonetti, Oktay, and Simons, Heat Transfer In Electronic Packages, in Tummala & Rymaszewski, Microelectronics Packaqin~ Handbook, page 167, report a 5 millimeter by 5 millimeter chip can dissipate 10 Watts, for a total heat flux of 400 Kilowatts per square meter.

- The very rapid increase in chip and package level thermal loads has occurred in the face of rapidly decreasing individual device power demands. This is because of even more rapidly increasing device densities and degrees of integration. When solid state devices were first introduced, it was surmised that solid state devices, with their low individual power requirements relative to vacuum tubes or iron core memories, would minimize if not eliminate thermal management concerns. This has not been the case, as the packing densities, and concomittantly the power densities, of integrated circuits have increased dramatically over the years. For example, while CMOS devices have lower power demands per device then, for example, bipolar devices, the number of CMOS devices per modern CMOS integrated circuit is orders of magnitude higher then the number of bipolar devices per older bipolar integrated circuit.
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Meanwhile, package design, that is, card and board design, have been driven by the necessity of accommodating the above described ever increasing density of logic or ' memory, with their concommitant increase in interconnections, in a smaller area. As noted by Andros and Sammakia, these high density cards and boards have high EN9-90-010 4 X04522 ~

power density, and therefore require sophisticated thermal management.

Package level thermal management is particularly important because integrated circuit failure rates increase by a factor of two for every 10 degrees Centigrade increase in operating temperature. Andros and Sammakia point out that ; reliability at all levels of packaging is directly related to temperature. For example, higher operating temperatures accelerate failure mechanisms, such as creep, corrosion, interdiffusion, and electromigration. Likewise, Andros and Sammakia point out that the temperature differences which occur as a system is cycled between power-off and power-on -- states have a significant effect on electronic component reliability, due mainly to fatigue in composite structures formed of materials with different coefficients of thermal expansion.
, , Antonetti, Oktay, and Simons state that it is a requirement that the thermal management of the electronic package satisfy some or all of the performance criteria: ;

* Integrated circuit device temperatures must be ` maintained below maximum allowable limits at "worst case" operating conditions (that is, worst-case values of device and module power and thermal resistances, coolant flowrates, environmental conditions, etc.) .: ' ; * Integrated circuit device temperatures experienced ; during normal operating conditions must allow ~ reliability goals to be achieved.
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* Temperature variations of devices belonging to the same signal network must be maintained within allowable limits.
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* The reliability of the thermal management scheme must be acceptable.

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ENg-gO-O10 5 Z()45Z27 * Electronic noise limitations must be met.

The purpose of any thermal management design is to attain these ends by allowing the flow of thermal energy from the heat source, i.e., the integrated circuit memory chip, to the heat sink, i.e., the external environment, within the constraints of specified temperatures and thermal fluxes. Ideally, this is accomplished by combinations of conduction and natural and/or forced convection.
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The purpose of a memory package is to combine efficient thermal management with high memory capacity and memory density.
Objects of the Invention ., It is a primary object of the invention to provide a -microelectronic package adapted for high memory capacity and `
density, and concomittantly allow the use of, for example, -~
double sided surface mount technology (SMT) assembly.
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It is a further object of the invention to provide a ~:
microelectronic package having a high input/output capacity, including a high address bus capacity and a high data bus ~capacity. -~
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It is a still further object of the invention to provide a microelectronic package having the thermal management capacity to accommodate the herein contemplated memory capacity and input/output capacity.

It is a still further object of the invention to ' provide a circuitized flexible strip carrier for memory with individually bonded, assembled, and tested memory chips, thereby avoiding multiple chip reworks.

;It is a still further object of the invention to reduce the package area consumed by common control and data lines and discrete devices.

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Summary of the Invention Disclosed is a high density microelectronic circuit package. The circuit package includes a plurality of IC
memory chips bonded to a circuitized flexible tape, which is in turn bonded to a printed circuit board. The circuitized flexible tape extends outwardly from the printed circuit board and has plurality of IC chips, such as memory chips, mounted on I/O pads.
The I/O pads on the circuitized flexible tape are arranged in at least first and second groups. The first group of I/O pads are connected to a common bus of first connectors. This first common bus terminates in an I/O
contact pin array on an edge of the flexible tape.
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The second group of I/O pads are connected to a group of second conductors that extend outwardly from the I/O
chips to the I/O contact pin array. The I/O contact pin array of the circuitized flexible strip is in regist~r with and bonded to an array of contact pads on the printed circuit board.
''; ,, The Figures FIGURE 1 is an isometric view of a printed circuit board having a plurality of microelectronic packages of the invention extending outwardly therefrom.
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FIGURE 2 shows a microelectronic package of the invention including a flexible strip substrate with two modes of circuitization thereon, as data circuitization and address circuitization.

FIGURE 3 shows a region of the microelectronic circuit package with an IC chip mounted on the flex strip substrate, with first and second leads extending therefrom.

FIGURE 4 shows one embodiment of the invention with one flexible circuitized strip wrapped around a heat sink.
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FIGURE 5 shows an alternative embodiment of the invention with a pair of flexible circuitized substrates, one on each side of the heat sink.

FIGURE 6 shows a further embodiment of the invention where the memory IC chips, the circuitized flex, and the heat sink are a modular unit, capable of being batch soldered onto the printed circuit board, for example by vapor phase soldering.
Detailed Description of the Invention The invention described herein is a high density microelectronic circuit package 1. The circuit package 1 includes a plurality of IC memory chips 11 bonded to a circuitized flexible tape substrate 21 and thermally bonded to a heat sink 41. The circuitized flexible tape 21 and the ~;~
heat sink 41 are, in turn, bonded to a printed circuit board 31. The circuitized flexible tape 21 and the heat sink extend generally outwardly from the printed circuit board 31. A plurality of IC chips 11, such as memory chips, are mounted on I/O pads. The memory chips 11 may be arrayed in a single row 11, or in multiple rows, lla and llb, thereof, on the circuitized flexible tape 21.
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.The circuitized flexible tape 21 includes a first I/O
contact pad array 22. This first I/O contact pad array 22 is compatible with and bonded to I/O terminal array of the I/O
contact (first) surface 15 of the I/C chips 11. While a single contact array 22 is referred to, there may be multiple contact pad arrays, as for data \i/\o, address I/O, and control. The circuitized flexible tape 21 also includes a second I/O contact pad array 24. The second I/O contact pad array 24 is compatible with and bonded to an array of I/O pads 34 on the printed circuit board 31.

The I/O pads 22 on the c.ircuitized flexible tape 21 may be arranged in multiple arrays, for example, at least first 22a and second 22b groups. The first group of I/O pads 22a are connected to a common bus 23a of first conductors. This ~.''' .: .
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EN9-90-010 Z045Z2~

first common bus 23a terminates in an I/O contact pad array 24a on an edge of the flexible tape 21. This first contact pad array 24a is, in turn, bonded to a matching first contact pad array 34a on the printed circuit board 31.
:' The second group of I/O pads 22b are connected to a common bus 23b of second conductors that extend outwardly from the I/C chips to a second I/O contact pad array 24b on the edge of the circuitized flexible tape 21. The second I/O
contact pad array 24b of the circuitized flexible tape 21 is in register with and bonded to a second array of contact pads 34b on the printed circuit board 31. Contact pad arrays 24a and 24b may be on orthogonal edges of the circuitized flexible strip 21.
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According to an alternative embodiment, shown in FIG 4, more I/O density is provided. In this exemplification the circuitized flexible tape 21 includes a first I/O contact pad array 22a on one surface 21a thereof. This first I/O
contact pad array 22a is compatible with and bonded to the -I/O terminal array of the I/O contact (first) surface 15 of the I/C chips 11. The circuitized flexible tape 21 may also include a second I/O contact pad array on its opposite surface. This second I/O contact pad array is connected by vias to the first I/O contact pad array 22a. The second I/O
contact pad array is compatible with and bonded to an array of I/O pads on the printed circuit board 31. In this way separate busses may be provides for data and address lines.

Thermal management is provided by heat sink structure~
41 that are mechanically and structurally separate from the circuitized flexible tape 21 but thermally bonded to the individual IC chips 11. Specifically, the heat sink means 41 extend substantiality vertically outward from the printed circuit board 31, and the IC chips 11 each have an I/O
contact first surface 15 and a thermal contact second surface 17. The IC chips 11 are bonded to the circuitized flexible tape 21 through the l/O contact (first) surface= l5 . ~

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thereof, and to the heat sink means 41 through the IC chip thermal contact (second) surfaces 17 thereof.

This structure is shown generally in FIGS 1, 4, and 5.
As described hereinabove, the microelectronic package 1 of the invention extends substantially vertically outwardly from the printed circuit board 31 and is electrically connected to the printed circuit board 31 through I/0 pad array 24 on the flexible strip 21 and I/0 pad array 34 on the printed circuit board 31. A critical aspect of the invention is the coupling of the IC chips 11 to the heat sink 21. The microelectronic packag~ 1 is thermally connected to the printed circuit board 31 through the heat transfer (second) surfaces 17 of the IC chips 11. These IC
chip heat transfer surfaces 17 are joined to the heat sink means to allow thermal communication therebetween.

Various methods may be used to attach the individual IC
chips 11 to the heat sink 41. These include, solely by way of exemplification and illustration, and not limitation, soldering, thermal greases, and thermal pastes. Thermal greases and pastes include (l) thixotropic suspensions of thermal conductors in liquid polymers, and (2) oils, as silicone oils (for example, diphenlyene siloxane and dimethylene siloxane) and/or hydrocarbon oils mixed with small amounts of thixotropic solids (as fumed silica, clays, and soaps). Thermal greases and pastes act as flexible thermal conductors, ensuring that a thermally conductive pathway is maintained during extremes of thermal expansion and contraction.

The IC chips 11 and the circuitized flexible tape 21 ; may extend along only a single side or surface of the heat sink means 41, as shown in FIGS 1 and 2, or along both surfaces of the heat sink means 41, as shown in FIGS 4 and 5. Thus, in the embodiment shown in FIGS 4 and 5, each of the IC chips are bonded to the heat sink means 41 through the thermal (second) surfaces 17 of the IC chips ll. At least one IC chip 11 is bonded to one surface of the heat ;, , :.
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EN9-90-010 10 2~452Z7 sink means 41 and at least one other IC chip 11 is bonded to the opposite surface of the heat sink means 41. In this arrangement the IC chips 11 are in back to back configuration.
When the IC chips 11 are in contact with the heat sink means 41 in back to back configuration, as shown in FIGS 4 and 5, they may be mounted on a single circuitized flexible tape 21, as shown in FIG 4, or on multiple circuitized flexible tapes 21, as shown in FIG 5.

FIG 4 shows an embodiment where the individual IC chips 11 and the printed circuit board 41 are electrically connected to each other through a single circuitized flexible tape 21. This single tape 21 surrounds the heat sink means 41 and the IC chips 11.

FIG 5 shows an alternative embodiment where the individual IC chips 11 and the printed circuit board 41 are electrically connected to each other through a pair of circuitized flexible tapes 21. These multiple tapes 21 are arrayed on opposite surfaces of the heat sink means 41 and thus surround the heat sink means 41 and the IC chips 21.
In.this embodiment the individual IC chips 11 and the printed circuit board 31 are electrically connected to each other through a pair of circuitized flexible tapes 21. One of the circuitized flexible tapes 21 is bonded to the IC
chips 21 that are on one surface of the heat sink means, and the other circuitized flexible tape 21 is bonded to the IC
chips 11 that are on the opposite surface of the heat sink means 41.

A still further embodiment of the invention is shown in FIGURE 6. In this embodiment the memory IC chips 11, the circuitized flexible strip 21, and the heat sink 41 are a modular unit, with the circuitized flexible strip 21 wrapping the IC chips 11 and heat sink means 41 and surrounding the base of the heat sink means 41, so that the heat sink means 41 is connected to the printed circuit board 31 through openings in the circuitized flexible strip 21.

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EN9-90-010 11 Z0~5Z27 ~

, This modular unit is capable of being batch soldered onto the printed circuit board 31, for example, by vapor phase soldering of the contact pad 24 on the flexible strip 21 and the contact pad 34 of the printed circuit board 31. In the embodiment shown in FIGURE 6 the heat sink means 41 is finned.

While the structure is described and illustrated with respect to various mounting techniques, it is to be understood that various methods of Direct Chip Attach (DCA) may be used to bond the IC chips 11 to the circuitized flexible tape 21. Exemplary is Tape Automated Bonding (TAB~
where the individual chips 11 are joined to a patterned metal on tape (as copper on polyimide), for example, by thermal compression bonding, and this structure is subsequently attached to the flexible circuitized tape 21 by, for example, outer lead bonding. One advantage of DCA
using TAB is that intermediate processing, such as testing, encapsulation, and burn-in, may be carried out prior to bonding the TAB assembly to the circuitized flexible tape 21. Other DCA and thin film chip attach methodolgies may be utilized without departing from the inventive concept.
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The apparatus and structure of the invention results in a microelectronic package adapted for high memory capacity and density, with minimal package area consumed by common control and data lines and discrete devices.
Concomittantly, the package of the invention allows double sided Surface Mount Technology (SMT) assembly. The disclosed microelectronic package has a high input/output capacity, including a high address bus capacity and a high data bus capacity with the thermal management capacity to accommodate the disclosed memory capacity and input/output capacity. It is to be noted that while the invention has been described with respect to digital IC chips, passive components, such as resistors, capacitors,and inductors may be present in the microelectronic packages 1, as well as analog IC chips.

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EN9-90-010 12 20~5227 .
As described hereinabove, the microelectronic circuit package lincludes a circuitized flexible tape carrier 21 for memory chips, with individually bonded, assembled, and tested memory chips 11, thereby avoiding multiple chip reworks.

While the invention has been described with respect to certain preferred embodiments and exemplifications thereof, it is not intended to limit the scope of the invention thereby, but solely by the claims appended hereto.

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Claims (21)

1. A high density microelectronic circuit package comprising:
(a) a plurality of IC chips, individual IC chips having an I/O contact first surface and a thermal contact second surface;
(b) a printed circuit board;
(c) a circuitized flexible tape extending outwardly from the printed circuit board and having first and second I/O pads thereon, with IC chips mounted on the first I/O pads thereon, and the second I/O
pads being in register with and bonded to an array of contact pads on the printed circuit board; and (d) a heat sink means extending outward from the printed circuit board, the IC chips being bonded to the circuitized flexible tape by the I/O
contact first surface thereof, and to the heat sink means by the IC chip thermal contact second surface thereof.

2. The high density microelectronic circuit package of claim 1 wherein (a) the IC chips are bonded to the heat sink means on the thermal second surfaces thereof, with at least one IC chip being bonded to one surface of the heat sink means and at least one IC chip being bonded to the opposite surface of the heat sink means, said IC chips being in back to back configuration; and (b) said IC chips and printed circuit board are electrically connected to each other through a single circuitized flexible tape surrounding the heat sink means and the I/C chips.

3. The high density microelectronic circuit package of claim 2 wherein (a) the IC chips are bonded to the heat sink means on the thermal second surfaces thereof, with at least one IC chip being bonded to one surface of the heat sink means and at least one IC chip being bonded to the opposite surface of the heat sink means, said IC chips being in back to back configuration; and (b) said IC chips and printed circuit board are electrically connected to each other through a pair of circuitized flexible tapes, one of said strips bonded to the chips on one surface of the heat sink means, and the other of said strips bonded to the chips on the opposite surface of the heat sink means.

4. The high density microelectronic circuit package of claim 1 further comprising:
(a) a first I/O contact pad array on one surface of the circuitized flexible tape first I/O contact pad array being compatible with and bonded to the I/O terminal array of the I/O contact first surface of the I/C chips; and (b) a second I/O contact pad array on the opposite surface of the circuitized flexible tape, connected by vias to the first I/O contact pad array, said second I/O contact pad array being compatible with and bonded to an array of I/O pads on the printed circuit board.

5. The high density microelectronic circuit package of claim 1 wherein the package extends outwardly from the printed circuit board and is (a) electrically connected thereto through the second I/O pad array on the circuitized flexible tape and the I/O pads on the printed circuit board; and (b) thermally connected thereto through the heat transfer surfaces of the IC chips adhesively joined to the heat sink means.

6. The microelectronic circuit package of claim 1 wherein said I/O pad array on the circuitized flexible tape is a Tape Automated Bond.

7. The microelectronic circuit package of claim comprising a thermal adhesive between at least one of said integrated circuit chips and said heat sink means.

8. The microelectronic circuit package of claim 7 wherein said thermal adhesive comprises solder.

9. The microelectronic circuit package of claim 7 wherein said thermal adhesive comprises a thermal grease.

10. The microelectronic circuit package of claim 1 wherein the circuitized flexible tape extends underneath the heat sink means, and the heat sink means is bonded to the printed circuit board through the circuitized flexible tape.

11. A high density microelectronic circuit package comprising:
(a) a plurality of IC memory chips;
(b) a printed circuit board; and (c) a circuitized flexible tape;
wherein (d) the circuitized flexible tape extends outwardly from the printed circuit board and has the plurality of IC chips mounted on I/O pads thereon, said I/O pads being arranged in at least first and second groups, (1) the first group of I/O pads being connected to a common bus of first connectors, said common bus terminating in an I/O contact pad array on an edge of the flexible tape, and (2) the second group of I/O pads being connected to a group of second conductors that extend outwardly from the I/O chips to the I/O
contact pad array; and (e) the I/O contact pad array of the circuitized flexible tape being in register with and bonded to an array of contact pads on the printed circuit board.

12. The high density microelectronic circuit package of claim 11 further comprising:
(a) heat sink means extending outwardly from the printed circuit board;
(b) the IC chips each have an I/O contact first surface and a thermal contact second surface, the IC chips being bonded circuitized flexible tape by the I/O contact first surface thereof, and to the heat sink means by the IC chip thermal contact second surface thereof.

13. The high density microelectronic circuit package of claim 12 further comprising:
(a) a first I/O contact pad array on one surface of the circuitized flexible tape first I/O contact pad array being compatible with and bonded to the I/O terminal array of the I/O contact first surface of the I/C chips; and (b) a second I/O contact pad array on the opposite surface of the circuitized flexible tape, connected by vias to the first I/O contact pad array, said second I/O contact pad array being compatible with and bonded to an array of I/O pads on the printed circuit board.

14. The high density microelectronic circuit package of claim 13 wherein the package extends outwardly from the printed circuit board and is (a) electrically connected thereto through the second I/O pad array on the circuitized flexible tape and the I/O pads on the printed circuit board; and (b) thermally connected thereto through the heat transfer surfaces of the IC chips adhesively joined to the heat sink means.

15. The high density microelectronic circuit package of claim 14 wherein (a) each the IC chips are bonded to the heat sink means on the thermal second surfaces thereof, with at least one IC chip being bonded to one surface of the heat sink means and at least one IC chip being bonded to the opposite surface of the heat sink means, said IC chips being in back to back configuration; and (b) said IC chips and printed circuit board are electrically connected to each other through a single circuitized flexible tape surrounding the heat sink means and the I/C chips.

16. The high density microelectronic circuit package of claim 14 wherein (a) each the IC chips is bonded to the heat sink means on the thermal second surfaces thereof, with at least one IC chip being bonded to one surface of the heat sink means and at least one IC chip being bonded to the opposite surface of the heat sink means, said IC chips being in back to back configuration; and (b) said IC chips are electrically connected to the printed circuit board through a pair of circuitized flexible tapes, one of said tapes being bonded to the chips on one surface of the heat sink means, and the other of said tapes being bonded to the chips on the opposite surface of the heat sink means.

17. The microelectronic circuit package of claim 11 wherein said circuitized flexible tape contact pad array is a Tape Automated Bond.

18. The microelectronic circuit package of claim 12 comprising a thermal adhesive between at least one of said integrated circuit chips and said heat sink means.

19. The microelectronic circuit package of claim 18 wherein said thermal adhesive comprises solder.

20. The microelectronic circuit package of claim 18 wherein said thermal adhesive comprises a thermal grease.

21. The microelectronic circuit package of claim 11 wherein the circuitized flexible tape extends underneath the heat sink means, and the heat sink means is bonded to the printed circuit board through the circuitized flexible tape.