CA2021829A1 - Display system - Google Patents
Display systemInfo
- Publication number
- CA2021829A1 CA2021829A1 CA 2021829 CA2021829A CA2021829A1 CA 2021829 A1 CA2021829 A1 CA 2021829A1 CA 2021829 CA2021829 CA 2021829 CA 2021829 A CA2021829 A CA 2021829A CA 2021829 A1 CA2021829 A1 CA 2021829A1
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- Prior art keywords
- pixel
- bit
- display
- character
- word
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
- G09G5/30—Control of display attribute
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
Abstract
DISPLAY SYSTEM
ABSTRACT
A display system is presented, comprising an all points addressable display buffer, in which a pixel is represented by an n bit pixel word; and in which a display character is represented by a pixel matrix comprising a plurality of pixels arranged in a plurality of pixel rows, a character font table for storing a plurality of such character pixel matrices representative of display characters of a font, and control logic responsive to a character code word for selecting a desired pixel matrix from the character font table, wherein each pixel matrix is stored in the character font table in an m bit (m<n) per pixel format whereby the pixel is represented by an m bit word; and wherein the display system comprises translation means for translating a pixel row arranged in the m bit pixel format to a pixel row arranged in an n bit per pixel format compatible with the APA display buffer.
ABSTRACT
A display system is presented, comprising an all points addressable display buffer, in which a pixel is represented by an n bit pixel word; and in which a display character is represented by a pixel matrix comprising a plurality of pixels arranged in a plurality of pixel rows, a character font table for storing a plurality of such character pixel matrices representative of display characters of a font, and control logic responsive to a character code word for selecting a desired pixel matrix from the character font table, wherein each pixel matrix is stored in the character font table in an m bit (m<n) per pixel format whereby the pixel is represented by an m bit word; and wherein the display system comprises translation means for translating a pixel row arranged in the m bit pixel format to a pixel row arranged in an n bit per pixel format compatible with the APA display buffer.
Description
DISPLAY SYSTEM
The present invention relates to a display system having an all points addressable (APT) display buffer for the storage of information compatible with a display output screen. A display system can be a computer system itself, or an optional, peripheral adapter, such as a display adapter card, installed in a computer system.
Many existing display systems operate in an alpha-numeric display mode. Although an initial reference is made to an alpha-numeric display mode, characters other than alpha-numeric characters can be displayed, depending on data provided by a character font table.
Therefore, for the purpose of description, this type of display mode will be referred to as a character display mode. Many existing display systems operate in a character display mode. In a character display mode, a display character is typically selected from a character font of 256 available characters by a coded character byte. The coded character byte can be stored in a coded text buffer or a computer program instruction. The display character is represented by a set of pixels which are arranged in pixel rows to form a pixel matrix. The character code byte selects the pixel matrix from a character font table in which each pixel in the pixel matrix- is represented by a binary bit. The binary bit specifies whether the pixel is in the foreground of the display character or in the background on which the display character is superimposed. An attribute byte can be supplied in conjunction with the coded character byte.
Four bits of the attribute byte specify a foreground pixel color and the remaining four bits specify a background pixel color. Such attributes are added to the display character information by attribute combining logic prior to output on the display output screen.
Many modern display systems can be programmed to perform sophisticated data processing tasks. Such systems are usually designed to operate in an SPA display mode, which allows text, graphics and image data to be superimposed on a display output screen. However, in order to maintain compatibility with a large number of existing alpha-numeric applications, a display system designed to operate in an APT display mode must also be compatible with a character display mode. A feature of a display system operating in an APT display mode is that a pixel is represented in the APT display buffer by a binary word. This binary word can be representative of either a foreground color or a background color. It therefore follows that a character font table for storing such pixel representations requires a large amount of storage space in comparison with an equivalent character font table for a display system operating in a character display mode.
Furthermore, in some display systems operating in an APT display mode, it is necessary to achieve compatibility between "first order" and "second order"
character fonts corresponding to "first" and "second"
pixel code formats. The terms "first" and "second" are used in reference to methods of storing pixels in first and second RAM memory structures. In a first map, pixels physically located to the left on a display output screen are stored in higher order bits of a byte, while in a second map, such pixels are stored in lower order bits of a byte. Certain display systems operating in an APT
display mode are responsive to picture manipulation instructions for a second pixel code format. This can cause problems when a first order character font table is supplied. Therefore, in such situations it is desirable to translate a "first order" character font table into a "second order" expanded format.
, Therefore, the aim of the present invention is to provide a translation means by which a display system operating in an APT display mode, can make use of a character font table associated with a character display mode which may be stored in either a first order or a second order RAM structure.
UK9-88-016 - 3 - ~2~C3~
In accordance with the present invention, a display system comprising an all points addressable display buffer, in which a pixel is represented by an n bit, where n is an integer greater than zero, pixel word; and in which a display character is represented by a pixel matrix comprising a plurality of pixels arranged in a plurality of pixel rows, a character font table for storing a plurality of such character pixel matrices representative of display characters of a font, and control logic responsive to a character code word for selecting a desired pixel matrix from the character font table, wherein that each pixel matrix is stored in the character font table in an m bit, where m is an integer greater than zero, (men) per pixel format whereby the pixel is represented by an m bit word; and in that the display system comprises translation means for translating a pixel row arranged in the m bit pixel format to a pixel row arranged in an n bit per pixel format compatible with the APT display buffer.
Preferably, the translation means has attribute combining logic by which the n bit pixel word can be changed in accordance with an n bit attribute word, which can be stored in association with the character code word in the coded text buffer for specifying an attribute of the pixel. This achieves the advantage that a pixel attribute, such as a foreground color associated with one pixel status or a background color associated with another pixel status, can be specified by a single display processor variable associated with a pixel matrix rather than each composite pixel. furthermore the display processor can accommodate an existing pixel attribute during any translation by reading an n bit attribute word representative of a pixel in the APT display buffer instead of a new n bit-attribute word.
In one particularly preferred arrangement the translation means can include code transforming means wherein a first order m bit per pixel format, associated with a first memory structure, is transformed into a UK9-88-016 - 4 - ~V2~0~
second order n bit per pixel format associated loath a second memory structure. This achieves the advantage that the translation means can be used to translate a standard pixel format into a form compatible with any memory structure wherein bit patterns representative of adjacent pixels art stored at adjacent addresses.
The translation means ma include a translation table wherein the pixel row arranged in the m bit per pixel format corresponds exclusively to a pixel row in the n bit per pixel format according to a translation requirement. This achieves the advantage that by using different translate tables, different pixel formats can be translated.
Jo In the following an example of a display system for font expansion in accordance with the present invention I` will be described with reference to the accompanying drawings in which:
Figure 1 is a block diagram of a computer system including a display system.
Figure 2 is a block diagram illustrating the structure of a display system in accordance with the invention.
figure 3 is a block diagram illustrating translation process logic in accordance with the invention.
Figure 4 illustrates a translation table structure for the display system in accordance with the present invention.
Figure 5 illustrates differences between first and second RAM memory structures.
Figure 6 illustrates translation from a first order data format to a second expanded data format.
I; Figure 7 is a flow diagram of a translation routine ; in accordance with the particular embodiment.
I;
UK9-88-016 - 5 - 2~.732~
Where possible, hexadecimal notation is used to simplify the description of aspects of the display system which will be described with reference to the computer system shown in Figure 1. This computer system includes a central processing unit (CPU) (1) for executing program instructions. A bus architecture (2) provides a data communication path between the CPU and other components of the computer system. A read only memory (3) provides secure storage of data. A fast random access memory (4) provides temporary storage of data. Data communication with a host computer system (5) is provided by a communication adapter (6). An I/0 adapter (7) provides a means for communicating data both to and from a mass storage device (8). A user can operate the computer system using a keyboard (9) which is connected to the bus architecture via a keyboard adapter (10). A display device (11) provides a visual output from the computer system. The visual output is generated by a display adapter (12).
The display adapter comprises the display system for font expansion in accordance with the present invention which will now be described with reference to Figure 2.
In this display system a display character is represented by an eight pixel row (33) by fourteen pixel column (34) pixel matrix (32). A one bit per pixel character font table (22) contains 256 such character representations, from which a particular pixel matrix can be selected by a coded character byte (26) stored at a text address (31) in a coded text buffer (21). An at-tribute byte (27), associated with the coded character byte, is also stored in the coded text buffer. The four most significant bits of the attribute byte specify a foreground pixel color (28) while the four least significant bits specify a background pixel color (29).
The pixel matrix is composed of fourteen eight bit rows which can be separately processed via a translation table (23) to sequentially translate the pixel matrix into a four bit per pixel format. An eight bit row can contain one of 256 possible eight bit patterns. Accordingly, a UK9-88-016 - 6 - Us translation table ~23), for translating each bit in the eight bit row into four similar bits, has 256 translation addresses for storing 32 bit row representations of all possible eight bit patterns. Each four bit pixel representation is stored in an APT display buffer (25) starting at an APT display buffer address (30) corresponding to the text address in the coded text buffer. The following eight pixel row translations are given by way of example.
ONE BIT PER PIXEL FOUR BITS PER PIXEL
"AYE "FOFOFOFO"x "C3"x "FFOOOOFF"x "55"x "OFOFOFOF"~
A first display processor (24), instructed by a programmed operating system, controls the translation process according to a translation routine.
In the following, translation process logic will be described with reference to Figure 3. This routine is based around a display system in which all four bits representing a pixel in the APT display buffer are directly accessible in a "first order" addressing format with adjacent pixels stored as adjacent four bit words.
When the routine is called, certain registers within the display processor are initialized. For instance, a source index register SYRIA indicates the next pixel row of the pixel matrix character code byte, to be translated. A
destination index resister (DIR) stores a display buffer address indicating where the next pixel row of the character is to be drawn in the APT display buffer. In addition, "register a", "register b", and "register c"
are general registers in the display processor which are used fur data storage during execution of the routine. On each call to the routine, initial values are assigned to certain routine variables. More specifically, "all foregrounds" (40) is the four bit foreground color specification repeated eight times to form an 32 bit foreground specification. In the example, the foreground color (41) is ox therefore "all foregrounds" is "55555555"x. Similarly, "all backgrounds" (42) is the four bit background color specification repeated eight times to form an 32 bit background specification. In the example, the background color (43) is ox therefore "all backgrounds" is "99999999"x. The foreground color specification, or the background color specification, or both can be read from bit patterns representative of foreground and background in the APT display buffer.
"line offset" is an incremental integer added to the contents of thy DIR to point to the location in the APT
display buffer where the next pixel row of the pixel matrix is to be drawn. The translation table, which is shown in Figure 4, is a look up table, stored in a memory in the display system, in which an eight bit row of a pixel matrix specifies an address for a corresponding 32 bit word in which each bit of the eight bit row is represented by for similar bits in the 32 bit word.
The translation process logic is responsive to a translation routine, in accordance with the present invention, which will now be described with reference to the flow diagram shown in figure 7 and the translation process logic shown in Figure 3. Step So loads the number of bit rows in the pixel matrix into "register c". Step So resets "register a". Step So loads the next eight bit row ~44), representing an eight pixel row of the pixel matrix into "register a". The appropriate eight pixel row is specified by the contents of the SIR. Step So increments the contents of the SIR in preparation for the next program iteration. Step So translates each bit stored in "register a" into four similar bits according to a particular 32 bit pattern specified in "translate table". Step So copies the contents of "register a";
inverts it via a logical NOT (47) operation; and places the inverted version (48) in "register b". Step So sets each four bit foreground pixel specification in "resister a" to a four bit representation of foreground color UK9-8~-016 - 8 -(49). A logical AND operation is used for this purpose (50). Step I sets each four bit background pixel specification in "register b" to a four bit representation of background color ~51~ through application of another logical AND operation (52). Step So reassembles the eight pixel row using a logical OR
(54) operation, wherein each pixel is now specified by four bits (53), according to foreground (41) and background (43) color information. Step Sly writes the eight pixel row to an APT display buffer address specified in register edit Step S11 increments the contents of the DIR by "line offset" to specify the next eight pixel row of the APT display buffer to be written to. Step S12 reiterates the process on the next eight bit row of the pixel matrix. Step S13 decrements the contents of "register c" on each program iteration until all composite bit rows of -the pixel matrix have been processed, whereupon the display processor can be instructed to perform another task as appropriate.
This implementation uses lo bytes to store a set of four bit per pixel character fonts; each of which would otherwise require 14k bytes of memory space for storage.
By reversing the order of the 256 bit patterns stored in the translation table, a first order one bit per pixel character font table can be translated into a second order four bit per pixel character font table. The following eight pixel row translations are provided by way of example.
one BIT PER PIXEL four BITS PER PIXEL
'AA x 'OFOFOFOF x C3'x 'FFOOOOFF'x '55'x 'FOFOFOFO x Figure 5 illustrates the first pixel format (80) of four pixels represented by two bytes, By and By, stored next to each other in an APT display buffer. By represents two pixels to the right of those pixels represented by By as displayed on a display output screen. For comparison, the same pixels are also shown in the second pixel format (81) wherein the stored bit pattern representing By and By is reversed. The translation table shown in Figure can therefore be rearranged to translate an eight pixel row, as shown in Figure 6, from the first order one bit per pixel format (82) to a second order four bit per pixel format by changing the order of the appropriate 32 bit pattern (833.
The present invention relates to a display system having an all points addressable (APT) display buffer for the storage of information compatible with a display output screen. A display system can be a computer system itself, or an optional, peripheral adapter, such as a display adapter card, installed in a computer system.
Many existing display systems operate in an alpha-numeric display mode. Although an initial reference is made to an alpha-numeric display mode, characters other than alpha-numeric characters can be displayed, depending on data provided by a character font table.
Therefore, for the purpose of description, this type of display mode will be referred to as a character display mode. Many existing display systems operate in a character display mode. In a character display mode, a display character is typically selected from a character font of 256 available characters by a coded character byte. The coded character byte can be stored in a coded text buffer or a computer program instruction. The display character is represented by a set of pixels which are arranged in pixel rows to form a pixel matrix. The character code byte selects the pixel matrix from a character font table in which each pixel in the pixel matrix- is represented by a binary bit. The binary bit specifies whether the pixel is in the foreground of the display character or in the background on which the display character is superimposed. An attribute byte can be supplied in conjunction with the coded character byte.
Four bits of the attribute byte specify a foreground pixel color and the remaining four bits specify a background pixel color. Such attributes are added to the display character information by attribute combining logic prior to output on the display output screen.
Many modern display systems can be programmed to perform sophisticated data processing tasks. Such systems are usually designed to operate in an SPA display mode, which allows text, graphics and image data to be superimposed on a display output screen. However, in order to maintain compatibility with a large number of existing alpha-numeric applications, a display system designed to operate in an APT display mode must also be compatible with a character display mode. A feature of a display system operating in an APT display mode is that a pixel is represented in the APT display buffer by a binary word. This binary word can be representative of either a foreground color or a background color. It therefore follows that a character font table for storing such pixel representations requires a large amount of storage space in comparison with an equivalent character font table for a display system operating in a character display mode.
Furthermore, in some display systems operating in an APT display mode, it is necessary to achieve compatibility between "first order" and "second order"
character fonts corresponding to "first" and "second"
pixel code formats. The terms "first" and "second" are used in reference to methods of storing pixels in first and second RAM memory structures. In a first map, pixels physically located to the left on a display output screen are stored in higher order bits of a byte, while in a second map, such pixels are stored in lower order bits of a byte. Certain display systems operating in an APT
display mode are responsive to picture manipulation instructions for a second pixel code format. This can cause problems when a first order character font table is supplied. Therefore, in such situations it is desirable to translate a "first order" character font table into a "second order" expanded format.
, Therefore, the aim of the present invention is to provide a translation means by which a display system operating in an APT display mode, can make use of a character font table associated with a character display mode which may be stored in either a first order or a second order RAM structure.
UK9-88-016 - 3 - ~2~C3~
In accordance with the present invention, a display system comprising an all points addressable display buffer, in which a pixel is represented by an n bit, where n is an integer greater than zero, pixel word; and in which a display character is represented by a pixel matrix comprising a plurality of pixels arranged in a plurality of pixel rows, a character font table for storing a plurality of such character pixel matrices representative of display characters of a font, and control logic responsive to a character code word for selecting a desired pixel matrix from the character font table, wherein that each pixel matrix is stored in the character font table in an m bit, where m is an integer greater than zero, (men) per pixel format whereby the pixel is represented by an m bit word; and in that the display system comprises translation means for translating a pixel row arranged in the m bit pixel format to a pixel row arranged in an n bit per pixel format compatible with the APT display buffer.
Preferably, the translation means has attribute combining logic by which the n bit pixel word can be changed in accordance with an n bit attribute word, which can be stored in association with the character code word in the coded text buffer for specifying an attribute of the pixel. This achieves the advantage that a pixel attribute, such as a foreground color associated with one pixel status or a background color associated with another pixel status, can be specified by a single display processor variable associated with a pixel matrix rather than each composite pixel. furthermore the display processor can accommodate an existing pixel attribute during any translation by reading an n bit attribute word representative of a pixel in the APT display buffer instead of a new n bit-attribute word.
In one particularly preferred arrangement the translation means can include code transforming means wherein a first order m bit per pixel format, associated with a first memory structure, is transformed into a UK9-88-016 - 4 - ~V2~0~
second order n bit per pixel format associated loath a second memory structure. This achieves the advantage that the translation means can be used to translate a standard pixel format into a form compatible with any memory structure wherein bit patterns representative of adjacent pixels art stored at adjacent addresses.
The translation means ma include a translation table wherein the pixel row arranged in the m bit per pixel format corresponds exclusively to a pixel row in the n bit per pixel format according to a translation requirement. This achieves the advantage that by using different translate tables, different pixel formats can be translated.
Jo In the following an example of a display system for font expansion in accordance with the present invention I` will be described with reference to the accompanying drawings in which:
Figure 1 is a block diagram of a computer system including a display system.
Figure 2 is a block diagram illustrating the structure of a display system in accordance with the invention.
figure 3 is a block diagram illustrating translation process logic in accordance with the invention.
Figure 4 illustrates a translation table structure for the display system in accordance with the present invention.
Figure 5 illustrates differences between first and second RAM memory structures.
Figure 6 illustrates translation from a first order data format to a second expanded data format.
I; Figure 7 is a flow diagram of a translation routine ; in accordance with the particular embodiment.
I;
UK9-88-016 - 5 - 2~.732~
Where possible, hexadecimal notation is used to simplify the description of aspects of the display system which will be described with reference to the computer system shown in Figure 1. This computer system includes a central processing unit (CPU) (1) for executing program instructions. A bus architecture (2) provides a data communication path between the CPU and other components of the computer system. A read only memory (3) provides secure storage of data. A fast random access memory (4) provides temporary storage of data. Data communication with a host computer system (5) is provided by a communication adapter (6). An I/0 adapter (7) provides a means for communicating data both to and from a mass storage device (8). A user can operate the computer system using a keyboard (9) which is connected to the bus architecture via a keyboard adapter (10). A display device (11) provides a visual output from the computer system. The visual output is generated by a display adapter (12).
The display adapter comprises the display system for font expansion in accordance with the present invention which will now be described with reference to Figure 2.
In this display system a display character is represented by an eight pixel row (33) by fourteen pixel column (34) pixel matrix (32). A one bit per pixel character font table (22) contains 256 such character representations, from which a particular pixel matrix can be selected by a coded character byte (26) stored at a text address (31) in a coded text buffer (21). An at-tribute byte (27), associated with the coded character byte, is also stored in the coded text buffer. The four most significant bits of the attribute byte specify a foreground pixel color (28) while the four least significant bits specify a background pixel color (29).
The pixel matrix is composed of fourteen eight bit rows which can be separately processed via a translation table (23) to sequentially translate the pixel matrix into a four bit per pixel format. An eight bit row can contain one of 256 possible eight bit patterns. Accordingly, a UK9-88-016 - 6 - Us translation table ~23), for translating each bit in the eight bit row into four similar bits, has 256 translation addresses for storing 32 bit row representations of all possible eight bit patterns. Each four bit pixel representation is stored in an APT display buffer (25) starting at an APT display buffer address (30) corresponding to the text address in the coded text buffer. The following eight pixel row translations are given by way of example.
ONE BIT PER PIXEL FOUR BITS PER PIXEL
"AYE "FOFOFOFO"x "C3"x "FFOOOOFF"x "55"x "OFOFOFOF"~
A first display processor (24), instructed by a programmed operating system, controls the translation process according to a translation routine.
In the following, translation process logic will be described with reference to Figure 3. This routine is based around a display system in which all four bits representing a pixel in the APT display buffer are directly accessible in a "first order" addressing format with adjacent pixels stored as adjacent four bit words.
When the routine is called, certain registers within the display processor are initialized. For instance, a source index register SYRIA indicates the next pixel row of the pixel matrix character code byte, to be translated. A
destination index resister (DIR) stores a display buffer address indicating where the next pixel row of the character is to be drawn in the APT display buffer. In addition, "register a", "register b", and "register c"
are general registers in the display processor which are used fur data storage during execution of the routine. On each call to the routine, initial values are assigned to certain routine variables. More specifically, "all foregrounds" (40) is the four bit foreground color specification repeated eight times to form an 32 bit foreground specification. In the example, the foreground color (41) is ox therefore "all foregrounds" is "55555555"x. Similarly, "all backgrounds" (42) is the four bit background color specification repeated eight times to form an 32 bit background specification. In the example, the background color (43) is ox therefore "all backgrounds" is "99999999"x. The foreground color specification, or the background color specification, or both can be read from bit patterns representative of foreground and background in the APT display buffer.
"line offset" is an incremental integer added to the contents of thy DIR to point to the location in the APT
display buffer where the next pixel row of the pixel matrix is to be drawn. The translation table, which is shown in Figure 4, is a look up table, stored in a memory in the display system, in which an eight bit row of a pixel matrix specifies an address for a corresponding 32 bit word in which each bit of the eight bit row is represented by for similar bits in the 32 bit word.
The translation process logic is responsive to a translation routine, in accordance with the present invention, which will now be described with reference to the flow diagram shown in figure 7 and the translation process logic shown in Figure 3. Step So loads the number of bit rows in the pixel matrix into "register c". Step So resets "register a". Step So loads the next eight bit row ~44), representing an eight pixel row of the pixel matrix into "register a". The appropriate eight pixel row is specified by the contents of the SIR. Step So increments the contents of the SIR in preparation for the next program iteration. Step So translates each bit stored in "register a" into four similar bits according to a particular 32 bit pattern specified in "translate table". Step So copies the contents of "register a";
inverts it via a logical NOT (47) operation; and places the inverted version (48) in "register b". Step So sets each four bit foreground pixel specification in "resister a" to a four bit representation of foreground color UK9-8~-016 - 8 -(49). A logical AND operation is used for this purpose (50). Step I sets each four bit background pixel specification in "register b" to a four bit representation of background color ~51~ through application of another logical AND operation (52). Step So reassembles the eight pixel row using a logical OR
(54) operation, wherein each pixel is now specified by four bits (53), according to foreground (41) and background (43) color information. Step Sly writes the eight pixel row to an APT display buffer address specified in register edit Step S11 increments the contents of the DIR by "line offset" to specify the next eight pixel row of the APT display buffer to be written to. Step S12 reiterates the process on the next eight bit row of the pixel matrix. Step S13 decrements the contents of "register c" on each program iteration until all composite bit rows of -the pixel matrix have been processed, whereupon the display processor can be instructed to perform another task as appropriate.
This implementation uses lo bytes to store a set of four bit per pixel character fonts; each of which would otherwise require 14k bytes of memory space for storage.
By reversing the order of the 256 bit patterns stored in the translation table, a first order one bit per pixel character font table can be translated into a second order four bit per pixel character font table. The following eight pixel row translations are provided by way of example.
one BIT PER PIXEL four BITS PER PIXEL
'AA x 'OFOFOFOF x C3'x 'FFOOOOFF'x '55'x 'FOFOFOFO x Figure 5 illustrates the first pixel format (80) of four pixels represented by two bytes, By and By, stored next to each other in an APT display buffer. By represents two pixels to the right of those pixels represented by By as displayed on a display output screen. For comparison, the same pixels are also shown in the second pixel format (81) wherein the stored bit pattern representing By and By is reversed. The translation table shown in Figure can therefore be rearranged to translate an eight pixel row, as shown in Figure 6, from the first order one bit per pixel format (82) to a second order four bit per pixel format by changing the order of the appropriate 32 bit pattern (833.
Claims
1. A display system (12) comprising an all points addressable display buffer (25), in which a pixel is represented by an n bit pixel word, and in which a display character is represented by a pixel matrix (32) comprising a plurality of pixels arranged in a plurality of pixel rows, a character font table (22) for storing a plurality of such character pixel matrices representative of display characters of a font, and control logic (21) responsive to a character code word (26) for selecting a desired pixel matrix from the character font table, wherein each pixel matrix is stored in the character font table in an m bit (m<n) per pixel format whereby the pixel is represented by an m bit word; and wherein the display system comprises translation means (23) attribute word can be specified by an n bit pixel word stored in the APA display buffer.
6. A display system as claimed in claim 5 wherein the translation means includes a plurality of translation tables and a selection means for selecting a translation table in accordance with a translation requirement.
7. A display system as claimed in claim 6 wherein the n bit attribute word corresponds to the character code word.
8. A method for translating a pixel matrix arranged in an m bit per pixel format for storage in a character font table into a pixel matrix arranged in an n bit per pixel format (m<n) compatible with a APA display buffer comprising, selecting a pixel row arranged in an m bit per pixel format of the pixel matrix from the character font table, exclusively mapping the pixel row arranged in the m bit per pixel format to a pixel row in the n bit per pixel format according to a translation requirement, using a translation table, transforming, where appropriate, a first order m bit per pixel format, associated with a first memory structure, into a second order n bit per pixel format associated with a second memory structure, using a translation table, changing an n bit pixel word representing a pixel in the pixel row arranged in the n bit per pixel format in accordance with an n bit attribute word for specifying an attribute of the pixel using attribute combining logic, storing the n bit pixel word in an all pels addressable display buffer.
6. A display system as claimed in claim 5 wherein the translation means includes a plurality of translation tables and a selection means for selecting a translation table in accordance with a translation requirement.
7. A display system as claimed in claim 6 wherein the n bit attribute word corresponds to the character code word.
8. A method for translating a pixel matrix arranged in an m bit per pixel format for storage in a character font table into a pixel matrix arranged in an n bit per pixel format (m<n) compatible with a APA display buffer comprising, selecting a pixel row arranged in an m bit per pixel format of the pixel matrix from the character font table, exclusively mapping the pixel row arranged in the m bit per pixel format to a pixel row in the n bit per pixel format according to a translation requirement, using a translation table, transforming, where appropriate, a first order m bit per pixel format, associated with a first memory structure, into a second order n bit per pixel format associated with a second memory structure, using a translation table, changing an n bit pixel word representing a pixel in the pixel row arranged in the n bit per pixel format in accordance with an n bit attribute word for specifying an attribute of the pixel using attribute combining logic, storing the n bit pixel word in an all pels addressable display buffer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP89310454A EP0422294A1 (en) | 1989-10-12 | 1989-10-12 | Display system |
| EP89310454.7 | 1989-10-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA2021829A1 true CA2021829A1 (en) | 1991-04-13 |
Family
ID=8202810
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA 2021829 Abandoned CA2021829A1 (en) | 1989-10-12 | 1990-07-24 | Display system |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP0422294A1 (en) |
| JP (1) | JPH03134699A (en) |
| CA (1) | CA2021829A1 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4405329A1 (en) * | 1994-02-21 | 1995-08-24 | Vobis Microcomputer Ag | Method for displaying text in CGA graphics mode on a screen of a personal computer |
| US6069613A (en) * | 1997-10-16 | 2000-05-30 | Phoenix Technologies Ltd. | Basic input-output system (BIOS) read-only memory (ROM) including expansion table for expanding monochrome images into color image |
| US7006077B1 (en) * | 1999-11-30 | 2006-02-28 | Nokia Mobile Phones, Ltd. | Electronic device having touch sensitive slide |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5919993A (en) * | 1982-07-27 | 1984-02-01 | 株式会社東芝 | Character display circuit |
| JPS60173585A (en) * | 1984-02-20 | 1985-09-06 | 株式会社リコー | Display control system |
| JPS60258589A (en) * | 1984-06-06 | 1985-12-20 | 株式会社日立製作所 | Character/graphic display circuit |
| JP2835719B2 (en) * | 1986-07-14 | 1998-12-14 | 株式会社日立製作所 | Image processing device |
| JPS6358395A (en) * | 1986-08-11 | 1988-03-14 | テクトロニックス・インコ−ポレイテッド | Color display device |
| EP0269174A3 (en) * | 1986-11-17 | 1989-10-18 | Koninklijke Philips Electronics N.V. | Logic circuit for expansion of monochrome display patterns to color form and video controller comprising such logic circuit |
-
1989
- 1989-10-12 EP EP89310454A patent/EP0422294A1/en not_active Withdrawn
-
1990
- 1990-07-24 CA CA 2021829 patent/CA2021829A1/en not_active Abandoned
- 1990-09-05 JP JP2233441A patent/JPH03134699A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP0422294A1 (en) | 1991-04-17 |
| JPH03134699A (en) | 1991-06-07 |
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| Date | Code | Title | Description |
|---|---|---|---|
| EEER | Examination request | ||
| FZDE | Dead |