CA2015401C - Multi-length packet format including check sequence(s) - Google Patents

Multi-length packet format including check sequence(s)

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Publication number
CA2015401C
CA2015401C CA002015401A CA2015401A CA2015401C CA 2015401 C CA2015401 C CA 2015401C CA 002015401 A CA002015401 A CA 002015401A CA 2015401 A CA2015401 A CA 2015401A CA 2015401 C CA2015401 C CA 2015401C
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Canada
Prior art keywords
packet
parity check
bits
word
bit positions
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Application number
CA002015401A
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French (fr)
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CA2015401A1 (en
Inventor
Carl J. May, Jr.
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AT&T Corp
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American Telephone and Telegraph Co Inc
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Publication date
Priority claimed from US07/371,229 external-priority patent/US5020054A/en
Priority claimed from US07/371,236 external-priority patent/US4962498A/en
Application filed by American Telephone and Telegraph Co Inc filed Critical American Telephone and Telegraph Co Inc
Publication of CA2015401A1 publication Critical patent/CA2015401A1/en
Application granted granted Critical
Publication of CA2015401C publication Critical patent/CA2015401C/en
Anticipated expiration legal-status Critical
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Abstract

MULTI-LENGTH PACKET FORMAT INCLUDING
CHECK SEQUENCE(S) Abstract A unique packet transport word, i.e., header, format is disclosed which is advantageously employed to delimit the corresponding packet and to verify data fields in the transport word. An at least first parity check is employed in conjunction with a packet length indicator to delimit the corresponding packet. The at least first parity check is formed by computing a predetermined number of parity check bits from bits in predetermined bit positions of the transport word. These parity check bits are inserted into predetermined bit positions in the transport word.
Similarly, bits representing the packet length indicator are also inserted into predetermined bit positions of the transport word. In a specific embodiment, a plurality of parity checks is employed to achieve increased robustness. The plurality of parity checks is formed such that each of the bits in predetermined bit positions of the transport word is used in computing at least two different parity check bits. In one embodiment, a first prescribed parity check is formed by computing parity over bits from predetermined bit positions in one or more groups of bit positions in the transport word and a second prescribed parity check is formed by computing parity over bits from predetermined similar bit positions in the groups of bit positions in the transport word. In one example, the transport word includes a plurality of bytes, each of which includes a predetermined number of bit positions forming columns and rows. Parity check bits forming the first prescribed parity check are obtained by computing parity from bits in predetermined bit positions in the transport word columns and parity check bits forming the second prescribed parity check are obtained by computing parity from bits in predetermined bit positions in the transport word rows. In this example, the first and second parity checks are obtained by so-called "group" processing and are adequate to both delimit the packets and verify the transport word data fields. These verified fields include, among others, the packet length and necessary information for delivery and "billing" of the packet. (FIG. 5).

Description

MULTI-LENGTH PACKET FORMAT INCLUDING
CHECK SEQUENCE(S) Technical Field This invention relates to packet transmission systems and/or 5 switching systems and, more particularly, to a packet format.
Back~round of the Invention In packet transmission systems and/or switching systems it is important to delimit individual packets, i.e., identify the beginning and end of the packets and to verify the packet header data fields. Proper 10 delimiting of packets is especially critical in systems employing variable length packets. Packets were delimited in prior arrangements by employing flags, i.e., a specific code sequence, placed at the beginning and end of the packet and by employing bit stuffing so that information being transmitted did not emulate the flags. Packet header data fields were verified in prior 15 arrangements by employing a separate cyclic redundancy check ~CRC).
Such prior delimiting and verifying arrangements require bit-by-bit serial processing. Consequently, they are difficult, if at all possible, to implement for high bit rate packet transmission systems and/or switching systems, e.g., bit rates of 45 Mbits/sec or higher. Indeed, any possible 20 implementation of such prior delimiting and verifying arrangements would be expensive for the higher bit rates and, therefore, undesirable from an economic standpoint.
It is also possible that the header, i.e., transport word, of a packet can be emulated by user information. Additionally, transport words 25 used in private networks can possibly be similar to those used in public networks. Then, it is possible that such private network transport words will be mistaken for those used in the public network. Such occurrences are extremely undesirable and must be avoided. Otherwise, errors in transmission and/or switching will occur. That is to say, packets would be 30 lost, orworse, mis-delivered.
SummarY of the Invention Problems and shortcomings of prior packet delimiting and/or verifying arrangements are overcome, in accordance with an aspect of the invention, by employing a unique packet transport word, i.e., header, 35 in~luding at least one prescribed parity check in conjur.ction with a packet length, i.e., size, indicator. - ~
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, ~ 201~401 To this end, the packet transport word includes a plurality of groups of bit positions each having a predetermined number of bit positions.
Parity check bits forming the at least one prescribed parity check are generated by computing parity from bits in predetermined bit positions of 5 the transport word. The resulting parity check bits that form the at least one prescribed parity check are inserted into predetermined bit positions forming an at least one prescribed parity check field in the transport word.
Similarly, bits representative of the packet length indicator are also inserted ~ -into predetermined bit positions forming a packet length indicator f~leld in 10 the transport word.
In accordance with another aspect of the invention, increased robustness against delimitation and/or verification errors is realized by employing a plurality of prescribed parity checks in conjunction with the packet length indicator in the packet transport word. To this end, each bit 15 from predetermined bit positions in the transport word is used in computing ~-at least two different parity check bits. The number of parity check bits being computed is dependent on the desired degree of robustness that is desired.
In a specific embodiment of the invention, parity check bits 20 forming an at least first prescribed parity check are generated by computing parity from bits in bit positions of one or more of predetermined ones of the groups of bit positions in the transport word. The parity check bits forming this at least first prescribed parity check are inserted into predetermined bit positions forming an at least first parity check field in the transport word.
2S Parity check bits forming an at least second prescribed parity check are generated by computing parity from bits in predetermined similar bit positions in predetermined ones of the groups of bit positions in the transport word. The parity check bits forming this second prescribed parity check are inserted into predetermined bit positions forming an at least 30 second prescribed parity check field in the transport word.
In an exemplary embodiment of the invention, each group of bit positions forms a byte having a predetermined number of bit positions. The data is bit parallel byte serial to form a transport word having a predetermined number of columns of bit positions and a predetermined 35 number of rows of bit positions. The at least first prescribed parity check bits are generated by computing parity from bits in bit positions of one or 20~1 5401 more of predetermined ones of the columns and the at least second prescribed parity check bits are generated by computing parity from predetermined bit positions inpredetermined ones oE the rows. Additionally, the individual parity check bits forming the at least second prescribed parity check are generated from bits in predetermined 5 bit positions of the rows in the transport word including the parity check bits forming the at least first prescribed parity check.
The at least ~Irst and second prescribed parity checks are advantageously utilized to verify data in the transport word fields and in conjunction with the packet length indicator to delimit the individual packets.
Additionally, the possibility of a particular transport word used in a specific networks, whether private, public or otherwise, is minimized, in accordance with another aspect of the invention, by employing a unique reference code word in computing one or more prescribed parity checks used in the transport word.
In accordance with one aspect of the invention there is provided 15 apparatus for generating a packet including at least a transport word, i.e., header, comprising: means for generating said transport word including a predetermined number of groups of bit positions each including a predetermined number of bit positions, predetermined ones of said transport word bit positions forming a packet length indicator field, a predetermined number of said transport word bit positions -20 forming a first prescribed parity check field and a predetermined number of said transport word bit positions forming an at least second prescribed parity check field; ~ -means for obtaining the length of said packet; means for inserting bits representative of said packet length in bit positions of said packet length indicator field; means for generating a first prescribed parity check from bits in predetermined bit positions of 25 said transport word; means for generating an at least second prescribed parity check from bits in predetermined bit positions of said transport word; means for inserting a number of bits representative of said at least first prescribed parity check into said number of bit positions of said at least one prescribed parity check field; and means for inserting a number of bits representative of said at least second prescribed parity 30 check in said number of bit positions of said at least second parity check field, said first prescribed parity check, said at least second prescribed parity check and said ~ ~ -packet length indicator being employed to delimit said packet.
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~ 2015401 Brief De~criPtion of the DrawinR
In the Drawing:
FIG. 1 shows details, in simplified block diagram form, of a packet network node including aspects of the invention;
FIG. 2 depicts a packet format, illustrating an aspect of the invention;
FIG.3 graphically illustrates a packet transport word, i.e., header, useful in describing an aspect of the invention;
FIG.4 depicts a packet transport word including aspects of the 10 invention;
FIG. 5 shows details, in simplified block diagram form, of input ports 104 employed in the packet cross-connect 103 of FIG.l;
FIG.6 depicts a flow chart illustrating operations performed in control 504 in controlling input port 104 of FIG. 5;
FIG.7 shows details, in simplified block diagram form, of output ports 110 employed in packet cross-connect 103 of FIG.l;
FIG.8 depicts a sequence of timing diagrams useful in describing the operation of packet cross-connect 103 of FIG.l and output ports 110 of FIG.7;
FIG.~ shows another sequence of timing diagrams also useful in describing the operation of packet cross-connect 103 of FIG.l and output ports 110 of FIG.7;
FIG.10 depicts details, in simplified block diagram form, of reservation factor calculator 716 used in output ports 110 shown in FIG.7;
FIGs.11,12,13, 14 and 15 when connected A-A, E~B, C-C, D-D, E-E, F-F, G-G, H-H,I-I, J-J, K-K and L-L form a flow diagram illustrating operations performed by scheduler 113 in packet cross-connect 103 of FIG. 1; and FIG.16shows a packet network arrangement in which packet ~ -30 network node 100 including aspects of the inventions may be advantageously employed.
Detailed DescriPtion FIG.l shows details, in simplified block diagram form, of packet network node 100 for interconnectin~ a plurality of incoming ports to a plurality of outgoing ports. Such packet network nodes may be advantageously employed in a network a9 9hown in FIG. lB and described ~ 201~401 below. Accordingly, signals from a plurality of sources are supplied via terminals 101-1 through 101-(X+Y) to packet network node 100. The sources may be, for example, broadband packet transmission facilities, digital data, RS232, DSO, DS1, DS3, other digital signals, other packet 5 signals, e.g., LAPD (Link Access Protocol D channel), broadband packets of a type similar to those disclosed herein or the like. These signals may be analog or digital at any desired rate. For example, the incoming signal bit rates could be the 64Kbit/sec DSO rate, the 1.544 Mb/sec DS1 rate, or a 150 Mb/sec transmission rate including packet formatted information, or 10 any higher or lower rate, as desired.
If the incoming signal is being transmitted over a digital facility and includes packets in a broadband packet format of a type employed in packet network node 100, it would be supplied to one of facility interfaces 102-1 through 102-X. Input facility interfaces 102, in this 15 example, are employed to supply the packet information a byte at a time to packet cross-connect 103 and, therein, to a corresponding one of input ports 104-1 through 104-X. Such facility interfaces are known in the art -and, typically, include a phase locked loop for recovering the incoming clock signal, a framer, a bipolar-to-unipolar converter if needed, an equalizer for 20 the equalization of gain and/or delay distortion, performance monitoring apparatus and apparatus for reformatting the incoming digital signal from the incoming digital format into the broadband packet format used in cross-connect 103 which is supplied to a corresponding one of input ~ -ports 104-1 through 104-X a byte at a time.
In this example, packet network node 100 also includes packetizers 105-1 through 105-Y. Each of packetizers 10~1 through 105-Y
include an input local packet interface 10B and a parity unit 107.
Operation of an exemplary one of packetizers 105 in generating a packet ~
transport word, i.e., header, and a packet format, in accordance with ~- -30 aspects of the invention, is described below. It should be noted, however, that depending on the type of signal source being interfaced the structure of the particular one of packetizers 105 may vary. However, the broadband ~ -packet format being generated is the same for ali of packetizers 105. Such packetizers may also be included in other remotely located equipments 35 which supply signals to a packet network node 100 via a transmission facility and a corresponding input facility interface 102 or if des;red directly ' . '~ .' , . .

~ 201~401 to one of packetizers 105-1 through 105-Y for reasons described below. It is noted that one of packetizers 105-1 through 105-Y is designated a control input.
The broadband packet formatted incoming signals are supplied 5 from packetizers 105-1 through 10~Y to input ports 104-(X+1) through 1û4-(X+Y), respectively. A reference code word Xref is supplied from Xref unit 108 to each of packetizers 10~1 through 10~Y, to each of input ports 104-1 through 104-(X+Y) and to stuff port 10~. Xref unit 108 may include a register or other memory device for storing a desired reference 10 code word. The reference code word Xref i3 unique to each network layer in the system hierarchy and provides s~called transmission transparency for all users. Additionally, private networks employing the same broadband packet format are each assigned a unique reference code word Xref which is used to delimit the private network packets and also provides transparency 15 in the system hierarchy.
Each of input ports 104-1 through 104-(X+Y) is employed to delimit packets, to synchronize to the incoming broadband packet format and to store the packets which are to be obtained by appropriate ones of ~-output ports 11û 1 through 110-(X+Y), in accordance with aspects oi the 20 invention. To this end, each of inpu$ ports 104 interfaces on a synchronous basis with packet cross-connect 103 data bus (DBUS), address bus (ABUS) and transport bus (TBUS). These buses operate on a time division multiplexed basis. Details of each of input ports 104 are shown in FIG. 5 and are described below.
Stuff port 10~ generates so-called stuff packets which are transmitted when no other packets are present for transmission. Stuff port 109 generates the stuff packets in a manner substantially identical to that employed in packetizers 105 and described below. The stuff packets are stored in a buffer memory for use as needed. Stuff packets are requested as needed by individual ones of output ports 11~1 through 110-(X+Y), as explained below. To this end, stuff port 10~ interfaces with the packet cross connect 103 address bus (ABUS) and data bus (DBUS).
Each of output ports 110-1 through 110-(X+Y) is employed to supply packets obtained from input ports 104-1 through 104-(X+Y) and stuff port 10~ to an appropriate one of output interfaces l11-1 througn 111-X and output local packet interfaces 112-1 through 112-Y. For ~ 201~401 example, if the packets are to be transmitted to a remote packet network node they will be supplied to one of output facility interfaces 111-1 through 111-X and, in turn, to output terminals 115-1 through 11~X, respectively.
If the destination of a packet is Ihe instant packet network node 100, it will 5 be supplied to an appropriate one of output local packet interfaces 112-1 through 112-Y and, ill turn, to output terminals 115-(X+1) through 11~
(X+Y), respectively. A~, in the c~se of packetizers 105, output local packet interfaces 112 may also require different structures depending on the type of equipment that is being interfaced.
Output facility interfaces 111-1 through 111-X typically include apparatus for interfacing output ports 11~1 through 11~X, respectively, to predetermined transmission facilities. To this end, each of output facility interfaces 111 include appropriate apparatus for formatting the broadband packets being transmitted into the particular signal format of the 15 corresponding transmission facility. Such output facility interfaces will be apparent to those skilled in the art.
To this end, each of output ports 11~1 through 11~(X+Y), in conjunction with scheduler 113, operates to schedule the transmission of the ~ -packets, in accordance with aspectc~, of the invention. In order to realize 20 these functions, each of output ports 110 interfaces on a synchronous basis with the packet cross-connect 103 data bus (DBUS), address bus (ABUS), scheduler bus (SBUS) and total quanta bus (TQBUS). Again, each of the cross-connect buses operates on a time division multiplexed basis. Details of each of output ports 110 are shown in FIG. 7 and are described below. ~ -Scheduler 113, in conjunction with processor 114, operates to -control the routing of packets from input ports 104 to output ports 110 and to statistics port 116 and to control output scheduling of the packets at output ports 110 in accordance with aspects of the invention.
Processor 114 is supplied with information regarding the status 30 of output ports 110 and with delay difference (DD) values between primary and alternate routes assigned to the destination (DEST) for the particular packet being scheduled for transmission. Additionally, statistics port 116 supplies in'ormation to processor 114 regarding the status of input ports 104. In turn, processor 114 supplies this information to scheduler 113.

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~` 2015A01 Operation of packet network node 100 and, therein, packet cross-connect 103 will become apparent to those skilled in the art from the following detailed description of the components thereof. It is noted, that the inputs to input ports 104 and the outputs from output ports 110 are 5 asynchronous. However, the internal interfacing with input ports 104 within packet cross-connect 103 is synchronous at a clock rate which is determined as a function of the number X+Y=N of input ports and the maximum transmission rate of the signals being supplied to packet network node 100. In this example, a particular time slot of cross-connect 103 timing 10 sequence i.e., polling cycle, is employed to write certain information in input ports 104, a~ will be explained below. A polling cycle is completed in an interval less than a packet word interval at the maximum incoming transmission rate. Thus, in this example, if the maximum incoming transmission rate is, for example, 150 Mb/sec, there are N=8 ports and the 15 word length is eight bytes, there will be 8+1=0 time slots per polling cycle and the synchronous clock rate in packet cross-connect 103 is approximately 24Mb/sec. Each of input ports 104-1 through 104-(X+Y) is identif~led by a time slot number in the synchronous polling cycle of scheduler 113.
Specifically, the first time slot through the Nth time slot identify input 20 ports 104-1 through 104-(X+Y), respectively, to scheduler 113. During time slots N----X+Y, output ports 110-1 through 110-(X+Y) have access to the memory units in input ports 104 and time slot N+1=0 is the time slot for writing input word data into units in input ports 104.
Packet network node 100 may be employed in a number of 25 applications, for example, as a switching node, an access node or a so-calledgateway node. However, it is important to note that the configuration of -cross-connect 103 is independent of the network configuration it i5 employed in, whether the network configuration is a ring, star, mesh or the like. A switching node would typically include a plurality of N=X-1 input 30 and N~X-1 output facility interfaces 102 and 111, respectively, and at least one packetizer 105 and a corresponding output local packet interface 112.
An access or gateway node would typically include Y=N-X input ports and Y=N-X output ports and at least one input facility interface 10~ and at least one corresponding output facility interface 111, i.e., X=1 and, 35 preferahly, includes Y=N-1 packetizers 105 and Y=N-1 output local packet interfaces 112. For other applications, packet network node 100 may , ; ~ . , , . . .. ; ~ ~

I~ 201~01 include a number of input and output facility interfaces (X) and a number of packetizers and output local packet interfaces (Y), where X=Y.
However, any number of input facility interfaces and output facility interfaces, and packetizers and output local packet interfaces may be 5 employed to meet system requirements in particular applications. It should be noted, however, for each type input interface there is a corresponding output interface. For example, if a digital signal is being received at this packet network node from a 3pecific remote switching node via one of input facility interfaces 102, a similar digital signal is being transmitted to the 10 remote switching node via a corresponding one of output facility interfaces 111. Similarly, if a data signal is being received from a local area network at one of packetizers 105, a similar data signal is being supplied to the local area network by one of output local packet interfaces 112. That is to say, there is two-way communication between sources of signals being 15 supplied to packet network node 100.
Packetizer As indicated above, each of packetizers 10~1 through 10~Y
includes input local packet interface 106 and parity unit 107, and is employed to generate a packet format, in accordance with aspects of the 20 invention, as shown in FIG. 2. To this end, input local packet interface 106 includes apparatus for interfacing the particular incoming signal in order to delimit it so that the broadband packet words may be formatted in accordance with the instant invention. Additionally, buffer storage is ~ - -required for the packet being formatted, a transport word generator, -25 counters for counting the number of packet bytes and the number oi packet words, apparatus for padding the last packet information word to build it out to the proper number of bytes and multiplex apparatus for combining packet information words and the transport word to form the desired packet. The transport word generator can be a register or a read write 30 (RAM) memory unit into which the dèsired information is inserted. Such ;
apparatus is known in the art.
Accordingly, shown in FIG. 2 is a packet format including -transport word (header) 201 and a number of information quanta, i.e., information words 202-1 through 202-M. Details of the transport word are -35 described below iD conjunction with FIGs. 3 and 4. The in~tant packet format including a number M of information words 202, each having a relatively short fixed length, i9 particularly advantageous toward emcient packet transmission and/or switching. Prior arrangements used either totally variable length information fields delimited by flags, or a fixed lengthinformation field. The arrangements using totally variable length 5 information fields are undesirable because they use so-called bit level processing, and the arrangements using fixed length information field~ are undesirable because the length of the information field is either too long or too short. Use of a fixed length information field also requires that the entire information field be transmitted or switched even when only one byte 10 of information is present. In the instant arrangement, only a number M of the relatively short information words are transmitted or switched as determined by the number of bytes of information to be included in the packet. Then, only the last information word in the packet may have to be padded to include bytes not used for information in order to build out the 15 last word to its proper length. As shown in FIG. 2, information word 202-M, in this example, includes five bytes of user information and three bytes which have been padded and include s~called fill. In this example, not to be construed as limiting the scope of the invention, the number M of packet -information words can be zero (0) to 255, each packet information word 20 includes eight bytes and each byte includes eight bits. Although the bytes of information are shown as being in parallel, it will be apparent that they could also be arranged in series. The packet format as shown in FIG. 2 is formed by packetizers 105 in a manner that will be apparent to those skilled in the art.
Input local packet interface 106 also partially generates transport word 201 as shown in FIG. 3. In this example, transport word 201 also includes eight bytes with each byte having eight bits. Again, although the transport word bytes are shown as being in parallel they could equally be arranged in series. Thus, the transport word is the same size as each of the 30 packet information words and will appear as such if supplied as an input to one of packetizers 105. BYTE (0) through BYTE (3) are employed for system address purposes and are designated the system address field. In this example, bit positions designated DEST (0) through DEST (11) form a des~ination fleld and are used to identify a packet network node address.
36 A3 will be apparent to those skill~d in the art, the bit positions designated VCID (0) through VCID (1~) may be used to further identify the final destination of the corresponding packet and represent a so-called virtual circuit identification. In this example, bit positions VCID (16) through VCID (19) are designated a destination extension (DEST EXT) field. If the destination of the packet is the instant packet network node, the DEST
5 EXT field indicates which one of output ports 110-(X+1) through 11~
(X+Y) is to be supplied with the packet. The remaining VCID bits are employed to identify the f~nal destination of the packet and for billing purposes.
BYTE (4) includes bit positions designated TYPE (0) through 10 TYPE (4) and BKG (0) through BKG (2). Bit positions TYPE (0) through TYPE (4) indicate the class or grade of service assigned to the corresponding packet and is designated the type of packet field. Bit ---position TYPE (0) indicates if the packet is alternate routable. Thus, a logical 1 in bit position TYPE (0) indicates that the packet is alternate 15 routable, and a logical 0 indicates it is not. In this example, normally only - ~-statistical packets are alternate routable. The only instances that a periodic packet would be alternate routed are if there was a failure in the primary route assigned to the destination for the packet or for some reason the packet was assigned a class of ~ervice requiring a minimum delay. Bit ~ - -20 position TYPE (1) indicates the type of packet, i.e., statistical or periodic.
That is, if the information words of the packet include bursty information, the packet is designated a statistical packet, and if the information words of the packet, include circuit type information, e.g., PCM encoded voice or the like, the packet is designated a periodic packet. Thus, a logical 1 in bit 25 position TYPE (1) indicates a periodic packet, while a logical 0 indicates a - :
statistical packet. Bit positions TYPE (2) and TYPE (3) are employed to select the values of thre~holds employed in scheduler 113, as described below. Bit position TYPE (4) indicates whether or not the packet is as~igned a minimum delay class of service. Bit positions BKG (0) through 30 BKG (2) are designated the breakage field and indicate the number of byte~
in the last information word M of the packet that do not include u~er information being transmitted and, hence, have been padded. It will be apparent that bit positions BKG (0) through BKG (2) could equally be used to indicate the number of bytes including user information in the last 35 information word.
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~ 20~401 BYTE (5) includes bit positions SIZE (0) through SIZE (7) which are designated the SIZE field. Bits are placed in the SIZE field which indicate the number M of information words, i.e., quanta, in the corresponding packet. That is, bits representative of the packet length 5 indicator are placed in the SIZE field. Again, in this example, M can be zero(0) to 255.
BYTE (6) includes six vacant bit positions for a plurality of first parity check bits which form a first prescribed parity check pattern to be inserted by parity unit 107 and bit positions SGZ and EXG. The six vacant 10 bit positions are designated the first parity check field. Bit position SGZ, in this example, indicates whether or not the packet includes a number of information words greater than or equal to zero (0). If the packet length is not greater than zero, the packet length indicator bits are not needed and information can be transmitted in the SIZE field of BYTE (5) of the 15 transport word. Thus, if only one (1) byte of information is to be transmitted, SGZ is set to a logical 0 and the byte of information is inserted into the bit positions of the SIZE field in BYTE (5), in place of the packet length indicator bits. BYTE (5) is available because there is no need in such a packet for a packet length indicator because one packet word is 20 assumed. It will be apparent to those skilled in the art that this technique -~-can be extended to transmit two or even three bytes of information in the transport word and, therefore, eliminate the need to transmit additional information words in this situation. It should also be noted that additional ones of the transport word fields may be usable to transmit user 25 information. The use of the additional fields in the transport word will alsoincrease transmission efficiency by minimizing the number of information words that need to be transmitted. One example, where additional transport word fields may be used to transport information is a control packet. Bit position EXC in BYTE (B) is used to indicate whether or not 30 the packet is a control packet.
BYTE (7) includes eight vacant bit positions for a plurality of second parity check bits forming a second prescribed parity check pattern to be inserted by parity unit 107. The eight vacant bit positions of BYTE (7) are designated the second parity check field.
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Input local packet interface 10B supplies the packet information to parity unit 107 on a byte-wise basis. Also supplied to parity unit 107 are an ENABLE signal and a start of packet (SOP) signal. The ENABLE signal indicates a valid byte of information is available and the SOP signal 5 indicates the beginning of a packet and, hence, the beginning of a transport word.
Parity unit 107, in each of packetizers 105 generates prescribed parity check bits which form a plurality of prescribed parity check patterns that are inserted into the vacant bit positions of BYTES (6) and (7) of the 10 transport word, as indicated in FIG. 4. FIG. 4 also indicates that reference code word Xref, shown in dashed outline, is employed in generating the prescribed parity check bits which form, in this example, the plurality of prescribed parity checks. It w;ll be apparent to those skilled in the art, that use of reference code word Xref is not necessary in practicing certain aspects 15 of the invention. Indeed, either EVEN or ODD parity can be used in generating the prescribed parity check bits. Use of Xref and the number of bits included in Xref is determined by the ~umber of network layers including private networks in a particular system. Additionally, it will also be apparent that the number of prescribed parity checks and the bit 20 patterns used in computing the parity check bits used in practicing the invention is dependent on the degree of robustness desired in the system.
In this embodiment of the invention, two prescribed parity checks including 14 parity check bits are used to obtain a desired level of robustness. That is to say, each bit from the bit position~ of BYTE (0) through BYTE (6) of the 25 transport word is used in computing at least two different parity check bits.Accordingly, parity unit 107 is supplied with start of packet signal (SOP), an ENABLE signal and packet information BYTE from input local packet interface 10~. The SOP signal indicates the beginning of the corresponding packet and, hence, the beginning of the transport word. The 30 ENABLE signal indicates that a valid BYTE of packet information is available. In this example, a first prescribed parity check is generated, in well known fashion, over the bits in each of vertical columns, i. e., groups of bit positions, of BYTE (0) through BYTE (5), and can be either EVEN
parity or ODD parity, as desired or as indicated below when using reference 35 code word Xref. That i9 to say, a separate parity check bit i9 geDerated over each of the vertical columns of BYTE (0) through BYTE (5). The first . .

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,~, , . ,.. ,.. ~ ., ,. .... . .. , ., ,. , . ,.. .. , .. , ... ,., . , , " .. , . ;,. .... .. .. . ..

~ 2015~01 prescribed parity check bits which are generated for BYTE (0) through BYTE (5) are PBYT (0) through PBYT (5), respectively, and form tbe ~lrst prescribed parity pattern which is inserted into the first parity check field in ~3YTE (6) of the transport word, as shown in FIG. 4. It will be apparent 5 that the parity for generating the individual parity check bits need not be restricted to a byte but can be computed from bits in any number of bit positions in one or more bytes, or groups of bit positions. For example, parity can be computed from bits in specific ones of the functional fields of the transport word. In ~his example, a second prescribed parity check is 10 generated, in well known fa~hion, over predetermined ones of the bits in each of the horizontal rows designated BIT (0) through BIT (7), i. e., from predetermined similar bit po~itions in each group of bit position~. The parity generated for each row can also be either EVEN parity or ODD
parity, as desired. It is noted that, in this example, a parity check bit is 15 generated for each of horizontal rows BIT (0) through BIT (7~ including the bits in BYTE (0) through BYTE (6). Thus, parity check bits in bit positions PBYT (0) through PBYT (5) are included in the computation of parity check bits forming the second prescribed parity check. Again, this increase~ the robustness of the system so that the likelihood of a packet 20 information word emulating a transport word i9 greatly reduced. Thus, a Yeparate parity check bit is generated for each of horizontal rows BIT (0) through BIT (7). The second prescribed parity check bits which are generated for horizontal rows BIT (0) through BIT (7) are PBIT (0) through PBIT (7), respectively, and form the second prescribed parity check pattern 25 which is inserted into the second parity check field in BYTE (7) of the transport word, as shown in FIG. 4. It is noted, however, that the parity check bits may be computed from bits in any desired pattern of bit positions in the transport word. Indeed, any desired number of parity checks may be employed in practicing aspects of the invention to realize any 30 desired level of robustness.
As indicated above, the use of reference code word Xref ` "
guarantees transparency for a large number of user networks. Additionally, the use of reference code word Xref causes the probability that a private network transport word can emulate a puhlic system transport word to be 35 zero. I~ this example, reference code wora Xref includes bits Xref (0) through Xref (11). Xref (0) through Xref (7) are aqsociated with horizontal 20~5~01 rolls of bits designated BIT (0) through BIT (7), respectively, and Xref (8) through Xref (11) are associated with BYTE (0) through BYTE (3), respectively. It should be noted that the number of bit positions in Xref can be increased or decreased, respectively as desired. Additionally, the bits 5 of Xref can be applied to any desired bit positions in the transport word.
For example, individual ones of the bits of Xref can be associated with a specific functional field of the transport word. The parity check bits generated over the bits of BYTE (4) and BYTE (5) can be either EVEN or ODD, as desired. Logical signals in the b;t positions of Xref designate the 10 type of parity generated over the associated roll of bits and the associated BYTES. In this example, a logical 1 in a bit position of Xref designates EVEN parity, while a logical 0 designates ODD parity. Thus, Xref can be set to any desired combination of logical 1's and logical 0's. However, it should be noted that Xref is the same for a predetermined network or 15 community of nodes. Again, the unique prescribed parity checks are used in conjunction with the paeket length indicator, in accordance with aspects of the invention, to delimit the packets and effect packet synchronization.
Moreover, the use of the unique prescribed parity checks provides verification of the transport word fields. Additionally, as described below, a 20 unique reference code word Xref can be assigned to a specific transport user to provide a unique identity for its packets and to assure transparency of its packets in the system hierarchy.
Again, each of packetizers 105 generates the packet format as shown in FIG. 2, in a manner which will be apparent to those skilled in the 25 art, by accumulating the number M of information words 202 in the packet and appending the transport word 201 to them. To this end, each of input local packet interfaces 106 stores the information words and inserts the appropriate information concerning the packet into the fields of the transport word as shown in FIG. 3. This information includes the address -30 information to be placed in the address field including the network destination in bit position DEST (0) through DEST (11) (FIG. 3), and the destination extension (DEST EXT) in bit positions VCID (16) through VCID (1û) and the final destination in the remaining VCID bits. The type information is inserted into bit positions TYPE (0) through TYPE (4!. The 35 type of packet whether statistical or periodic is usually provided at call set up or otherwise known by the originating packetizer. The breakage '' ' ' :~ .

;: ' : ! ; ? ~ "

2~ 01 - lB-information is inserted into bit positions BKG (0) through BKG (2) and i~
readily obtained by knowing the number of bytes of information in the packet being formatted or the number of bytes of information in the last information word of the packet. Similarly, the packet size information is 5 inserted into bit positions SIZE (0) and SIZE (7). This is readily obtained by knowing the number of information words being stored for the packet being formatted. The packet size greater than zero information is inserted in bit position SGZ. If the packet iI~formation is in only one byte, a logical zero is inserted in the SGZ field and the byte of information is inserted in 10 the transport word SIZE field. Again, this information is readily obtained from the number of bytes of information being ~tored for the packet being formatted. Finally, information indicating whether or not the packet is a special packet is inserted in bit position EXC.
It should be noted that, when there is no information being 15 stored to be formatted into either an information packet or a control packet, input local interface 106 in conjunction with parity unit 107 generates a s~called stuff packet. Stuff packets are generated in the same manner as the information and control packets described above. The differences being that the number of information words in the stuff packet 20 is zero as indicated by the size field and SGZ, and the destination field indicates to scheduler 113 that the stuff packet should be scheduled for statistics gathering and be directed to statistics port 116. The stuff packet is comprised of just a transport word.
The packets, whether information, control or stuff are supplied -25 to parity unit 107 on a byte-wise basis along with an ENABLE signal and a --~
start of packet (SOP) signal. Parity unit 107 in response to the ENABLE
and SOP signals operates to generate the first and second parity checks, as described above. The generated first parity check bits PBYTE (0) through PBYTE (5) are inserted into the first parity check field and the generated 30 second parity check bits PBIT (0) through PBIT (7) are inserted into the - -second parity check field. The first and second parity checks are employed in conjunction with the packet length indicator, in accordance with an aspect of the invention, to delimit the packets and synchronize the system.
As lndicated above, parity unit 1~7 is also supplied with reference code 35 word Xref which is employed, in accordance with an aspect of the inqention, -to generate the first and second parity checks which provide a desired level ~ 201~401 of robustness to the synchronization process. Additionally, the use of reference code word Xref provides a unique identity for a network and also assures that the network user's packets are transparent in the public system hierarchy. The resulting transport word for the formatted packet is shown - - -5 in FIG. 4.
A specific transport user can employ a packetizer essentially identical to packetizer 105 to generate packets or employ packet network nodes essentially identical to packet network node 100 in a private network.
Then, a unique reference code word Xref is assigned to the specific 10 transport user to provide a unique network identity. The packets generated with the unique reference code word are assured to be transparent in the public system hierarchy. The broadband packets generated in the private network are identical to the broadband packets described above.
Consequently, the private network packets including their transport words appear as information to packetizer 105 in packet network node 100 and, - -therefore, are transparent. Packet network node 100 æimply appends a transport word to the supplied information to form packets. When the private network packets reach the transport user's private network, the public network transport word is removed and its unique reference code :
20 word Xref is recognized and the private network packets are transmitted therein. The packets are supplied on a byte-wise basis from packetizers 10~1 through 10~Y to input ports 104-(X+1) through 104-(X+Y), respectively. Also supplied from packetizers 10i~1 through 10i~Y :
are corresponding ENABLE IN signals. The ENABLE IN signal indicates to 25 the corresponding input port that a valid byte of packet information is -available to be supplied. -It is important to note that the use of the first and second parity - ~ -checks, in this example, is powerful enough to verify the data fields in the transport word. This eliminates the need of an additional separate check 30 for the transport word fields as was required in prior arrangements.
Additionally, although so-called group processing is advantageously employed in practicing aspects of the invention, it will be apparent that othertypes of proGessing maybe employed.

' . . , r ,. . . ~ f ~ .;

201~01 INPUT PORT
FIG. 5 shows details, in simplified block diagram form, of input ports 104. Accordingly, shift bytes unit 501 is supplied an ENABLE IN
signal, the reference code word Xref and packet bytes in parallel via BYTE
5 IN. ENABLE IN is at an incoming clock rate and indicates that a valid packet byte is available for this input port. ENABLE IN is also supplied to byte counter 502. Shift bytes unit 501 includes a word wide shift register, parity generators and a comparator (not shown). In this example, a word includes eight (8) bytes in series and each byte includes eight (8) parallel 10 bits.
Shift bytes unit 501 operates initially to generate the first and second parity checks, as described above, in relationship to parity unit 107 ~FIG.1) in well known fashion, over each eight bytes supplied thereto on a byte-by-byte basis. If a match is obtained between the generated first and 15 second prescribed parity checks, and the expected first and second parity patterns in the predetermined fields of the packet word, i.e., PBYT(0) through PBYT(5) and PBIT(0~ through PBIT(7), a Tok=1 is generated.
Outputs from shift bytes unit 501 are the packet word (WORD), the packet length field (SIZE), the packet length greater than zero field (SGZ), and a 20 transport word candidate indicator (Tok). Shift bytes unit 501 supplies as --outputs SIZE, SGZ and Tok which, in turn, are supplied to control 506.
The packet WORD is supplied to word latch 503 where it is stored until ~ ~ -write time slot 0 occurs in the polling cycle of packet cross connect 103, at which time RAM 504 is enabled to write the WORD. Appropriate fields of 25 the packet WORD are also written into scheduler data store 505 if it i9 a transport word candidate as indicated by Tword=1. The packet WORD is written into a memory location in RAM 504 identified by an address generated by RAM address generator 50~. RAM address generator 50~ is responsive to a word complete (WC) signal from byte counter 502 to 30 advance a write address counter during the write time slot. RAM address generator 50~ is also operative to pass address signals from address -bus ABUS to read a packet WORD from RAM 504 which is supplied to databus DBUS and, consequently, to the one of output ports 110 (FIG.1) requesting the corresponding WORD. It is noted that anyone of output 3~ ports 110 can read a word from any given input port 104 during 3 poliing cycle. In this example, RAM 504 has the capability of storing 4~ words.

Byte counter 502 is responsive to ENABLE IN for counting the number of packet bytes supplied to input port 104. A word complete output (WC) from byte counter 502 indicates that a packet word, in this example, 8 bytes, is complete and is supplied to word counter 507, word 5 latch 503, scheduler data store 505, status latch 508 and RAM address generator 50~. -In response to the word complete (WC) signal, word latch 503 latches the WORD from shift bytes unit 503; status latch 508 latches the WORD COUNT from word counter 507, Tword from control 506 and 10 IpkTok from control 506; R~M address generator 50~ is enabled to be advanced by one address; and scheduler data store 505 is enabled to input data. It i~ noted that a WC signal is also generated when byte counter 502 is reset.
Word counter 507 is responsive to the WC output from byte 15 counter 502 to count the number of packet words supplied to input ~ -port 104. The count of packet words (WORD COUNT) is supplied to status latch 508 and to control 506.
Scheduler interface 510 interfaceis input port 104 to TBUS.
Control 50~ i9 responisive to the supplied SIZE field, SGZ f5eld, 20 Tok and WORD COUNT for controlling input port 104 to synchrollize on the incoming packets. To this end, control 50~ generates a signal Tword, which indicates whether or not the packet word is a possible transport word candidate and a signal IpkTok which indicates whether or not the l~t packet transport word w~ vislid, i.e., ok. Tword and IpkTok are supplied 25 to status latch 508. -Operation of control 506 in obtaining frame synchronization of input port 104 for incoming packets can be explained by referring to the flow chart shown in FIG. 6. Accordingly, the control routine is entered via i enter step B01. Thereafter, operational block 602 initialize~ byte 30 counter 502 and word counter 507 by resetting them and the stored packet SIZE is set to zero (0) packet words, i.e., M=0. Input port 104 is defined to be in an OUT-OF-FRAME mode. Operational block 603 indicates that a packet byte has been supplied to shift bytes unit 501. As indicated above, shift bytes unit 501 generates the predetermined first and second parity 35 check bits and compares them to the first and second parity check bits in the predetermined fields of the packet word, namely, PBYTE(0) through ~ 201~01 PBYTE(5) in BYTE (6) and PBIT(0) through PBIT(7) in BYTE (7) (FIG.4).
If a match is obtained a Tok=l is generated. Otherwise, a Tok=0 is generated. Conditional branch point 604 tests to determine whether or not the WORD COUNT in word counter 507 is equal to the number of packet 5 words indicated by SIZE plus one (1), i.e., M+1. In the initial pass of the process, step 604 yields a YES result after the first word has been supplied to shift bytes unit 501(FIG.S). On subsequent passes, the packet length indicator value M is obtained from the expected SIZE field and the SGZ
field in the packet word, namely, BYTE (5) and the SGZ bit position in 10 BYTE (6). If the test result in step 604 is NO, conditional branch point 605 tests to determine if Tok=l. If the test result in step 605 is NO, control is returned to operational block 603. Thereafter, steps 603, 604 and 605 are iterated until either step 604 yields a YES result or step 605 yields a YES
result. If step 604 yields a YES result, conditional branch point 608 tests to determine if Tok=1. If the test in step 606 is NO, operational block 607 sets Tword=1, and IpkTok=0, resets byte counter 502 and word counter 507, and causes the expected number of information words (M) in the packet from the SIZE field to be stored. Signal IpkTok indicates whether or not the last packet transport word candidate i~ ~alid or not.
Accordingly, IpkTok=0 indicates that the last packet transport word candidate is not valid and IpkTok=1 indicates that it is valid. Resetting of byte counter 502 generates a WC signal. Consequently, the current WORD
from shift bytes unit 501is latched in word latch 503; the WORD COUNT
from word counter 507, Tword from control 506 and IpkTok from control 506 are latched in status latch 508; RAM address generator 50~ is enabled to be advanced an address; and scheduler data store 505 is enabled to store data. Upon write time slot 0 occurring in the synchronous polling cycle of packet cross connect 103, the address in RAM address generator 50 is advanced and the packet WORD from word latch 503 is written into the `
30 memory location of RAM 504 identified by RAM address generator 50~.
Similarly, upon the write time slot occurring in the polling cycle of packet cross-connect 103 and Tword=1 from status latch 508, the DEST, DEST
EXT, and TYPE fields from the packet WORD stored in word latch 503 are written into scheduler data store 505. Additionally, the corresponding 35 address designating the packet starting address (SAD) from RAM address generator 509 for the packet word is also written into scheduler data , .:

- I 201~401 store 505. Thereafter, appropriate ones of steps 603 through 607 are iterated until either step 605 or step 606 yields a YES result. either of these YES results indicates that a possible transport word candidate has been identified and a so-called ALMOST IN-FRAME mode of operation is 5 entered. To this end, operational block 608 sets Tword=1 and IpkTok=0, resets byte counter 502 and word counter 507, and causes the number of information words M from the SIZE field to be stored. Again, the resetting of counter 502 causes generation of a WC signal which, in turn, causes the actions to occur as set forth above in step 607. Operational block 60~
10 indicates that another packet byte has been suppled to shift bytes unit 501.
Then, conditional branch point B10 tests to determine if the WORD
COUNT in word counter 507 equals SIZE+1. SIZ13+1 is the total length of the packet and points to the expected next packet transport word. If the test result in step 610 is NO, conditional branch point 611 tests to 15 determine if Tok=1. If the test result in step 611is NO, the current packet WORD in shift bytes unit 501 is not a valid transport word candidate and steps 60~ through 611 are repeated until either step 610 or step 611 yields a YES result. If step 610 yields a YES result, conditional branch point 612 tests to determine if Tok=1. If the test result in step 612 is NO, the packet 20 WORD presently in word latch 503 is not a valid transport word candidate.
Control is returned to step 607 and appropriate ones of steps 603 through B12 are iterated. If step 611 yields a YE:S result, the current packet WORD
in word latch 503 is not a valid transport word and steps 608 through 611 are iterated until step 610 yields a YES result and step 612 is reached. A
2S NO result in step 612 again indicates that the present packet WORD being pointed to by the previous packet length indicator is not a valid transport word and the reframing process is reinitiated by returning control to step B07. When step 612 yields a YES result, the WORD latched in word Iatch 503 is a valid transport word and input port 104 is in synchronism 30 with the incoming broadband packets. An IN-FRAME mode of operation ha9 been entered.
To summarize, ~teps 603 through B07 operate on the incoming packet on a byte-by-byte basis to identify a first transport word candidate.
Then steps 608 through 612 operate on the incoming packet also on a byte-35 by-byte basis to identify a subsequent transport word candidate pointed to by the packet length indicator from the previous transport word candidate.

201~401 Upon detection of the subsequent transport word candidate pointed to by the packet length indicator from the previous transport word candidate, the previous transport word candidate is identified as a valid transport word, in accordance with an aspect of the invention.
Once a valid transport word has been identified, operation of input port 104 enters an IN-FRAME mode. In the IN-FRAME mode, testing for transport word candidates, in this example, is done on a word wise basis. To this end, operational block 613 sets Tword =1 and lpkTok=1, resets byte counter 502 and word counter 507 and causes the 10 number of information words in the packet from the SIZE field to be stored.
This indicates that a GOOD transport word and, hence, a GOOD packet has been identifîed. That is to say, the last packet received has been identifled as a GOOD packet. Thereafter, operational block 614 indicates that a packet word has been supplied to shift bytes unit 501. Then, conditional branch point B15 tests to determlne if the WORD COUNT in word counter 507 equals SIZE+1. If the test result in step 615is NO, steps B13 and 614 are repeated until a YES result in step 615 is obtained.
Thereafter, conditional branch point 616 tests if Tok=1. If the test result in step 616 is YES, another GOOD packet has again been identified. Again, 20 the WORD COUNT from word counter 507, and Tword and IpkTok signals from control 50B are written into status latch 508 in response to a word complete (WC) signal. In turn, the stored WORD COUNT and IpkTok --signal are written into scheduler interface 510 during the write time slot of the polling cycle of cross-connect 103. When IpkTok=l the packet 2S transport data stored in scheduler data store 505 for the last previous packet and IpkTok are supplied via scheduler interface 510 to cross connect 103 transport bus TBUS for use by scheduler 113. That is, the packet transport information fields DEST, DEST EXT, WORD COUNT
and TYPE, the packet starting address (SAD) and the last packet status 30 IpkTok are supplied to TBUS. The packet source (SCR), i.e., input port, is known to scheduler 113 by the time slot in the polling cycle during which the transport information was supplied to TBUS. If the test result in step BlB is NO, the operation of input port 104 re-enters the OUT-OF-FRAME
mo&e, control is returned to step B07 and the reframing process is - --3~ reinitiated.
:" .

STUFF PORT
Stuf~ port 10~ generates so-called stuff packets which are stored in buffer memory for use by output ports 110-1 through 110-(X+Y) when no other packets are available for transmission. The stuff packets each 5 comprise only a transport word which is generated in identical manner as described above regarding packetizers 105. The DEST field, however, includes a predetermined destination which indicates that the packet is a stuff packet and eventually will be used to determine facility activity. To this end, stuff port 109 interfaces with address bus ABUS and data bus 10 DBUS.
OUTPUT PORT
FIG. 7 shows details, in simplified block diagram form, of each of output ports 110. As indicated above, each of output ports 110 interfaces with cross-connect 103 address bus ABUS, scheduler bus SBUS, data bus 15 DBUS and total quanta bus TQBUS. As explained below, scheduler 113 supplies packet output information via SBUS concerning packets to be transmitted by output ports 110. This information includes the output port identity, the input port identity (SRC), the starting address (SAD) of the packet being stored in the corresponding input port, WORD COUNT (total 20 length) of the packet and the TYPE of packet, i.e., periodic or statistical.
Output port 110 operates on this information, in accordance with aspects of the invention, to schedule transmitting of statistical packets and to reserve intervals for transmitting periodic packets.
The packet output information is obtained from SBUS at the 25 appropriate one of output ports 110 by queue controller (QCON) 701.
QCON 701 determines from T~'E whether the packet is a periodic packet or a statistical packet. If it i9 a periodic packet, the input port identity - -(SRC), packet starting address (SAD) and total length, i.e., WORD COUNT -(M+1) in packet word intervals, of the packet are stored in periodic 30 queue 702, REAL QSUM counter 703 is incremented by the WORD COUNT
and RESERVED QSUM counter 704 is decremented by the WORD .
COUNT. It is noted that the value RESQSUM in RESERVE QSUM
counter 704 cannot be less than zero (0). RESQSUM is supplied to adder 70~ and TQBUS. If the packet is statistical, the input port identification 35 (SRC), packet starting address (SAD) and the WORD COUNT for the packet are stored in statistical queus 705; REAL QSUM counter 703 is 2 0 1 ~ 4 0 1 incremented by the WORD COUNT; and RESERVE QSUM counter 704 is incremented by a value representative of a reserved interval (RI), namely, RI=(k/1-k)(M+1), of packet words.
Reservation factor k, in this example, is representative of the 5 percentage of periodic packets expected to be transmitted from a corresponding output port. The value of reservation factor k can be a predetermined fixed value, a value supplied by a processor based on call set-up or calculated dynamically by reservation factor calculator 716.
Reservation factor calculator 716is responsive to the word complete signal 10 WC and the number of periodic, i.e., Type 1, packet words being transmitted by output port 110 during a predetermined interval to generate the value of reservation factor k. Details of reservation factor calculator 716 are shown in FIG. 10 and described below.
Both periodic queue 702 and statistical queue 705 are, in this 15 example, first in first out (FIFO) registers and interface with next packet unit 706. REAL QSUM counter 703is decremented by one packet word in response to a word complete (WC) signal from byte counter 707. This follows because a packet word has been transmitted. Time unit 708 generates a refence time T, which is arbitrary time, e.g., now. Time 20 unit 708 is also incremented by a packet word interval in response to the WC signal. Since in this packet network node, packets are continuous and contiguous in the byte intervals designated by ENABLE, this is a smooth process.
Adder 70~ combines the REAL QSUM and RESQSUM to obtain 25 TQSUM, namely, TQSUM = REAL QSUM + RESQSUM, (1) where the individual values are in packet word intervals and TQSUM is representative of the queuing delay in the output port. In turn, TQSUM is supplied to adder 710 and TQBUS. Adder 710 is enabled in response to 30 arriving statistical packets at statistical queue 705 to combine TQSUM and time T to obtain the scheduled time of service value STOS for each corresponding statistical packet, namely, STOS = TQSUM ~ T . (2) .~....

. . ' ~

~ 201~401 This operation will become more apparent from the discussion of FIGs. 8 and ~ below.
The STOS values for the arriving statistical packets are stored in scheduled time of service (STOS) queue 711 which, in this example, i~ also a 5 FIFO register. The next scheduled time of service (NSTOS) at the top of the FLFO in STOS queue 711 is supplied to next packet unit 70B. Also supplied to next packet unit is time T and a packet complete (PC) signal from word counter 712. Next packet unit 706 operates to supply the starting address (SAR) and the input port identity (SRC) of the packet to 10 be transmitted to address counter 713 and the total packet length M+1 as indicated by WORD COUNT to word counter 712. If the next packet to be transmitted is a statistical packet, supplying of this information is delayed at least until the scheduled time of service (STOS) occurs or, thereafter, until transmission of a periodic or stuff packet has been completed. If there 15 is no information regarding periodic packets to be transmitted in periodic queue 702 and the next scheduled time of service ~NSTOS) for a statistical packet has not occurred stuff packets are requested by supplying the addres~ of a stuff packet in stuff port 10~ to address counter 713. Next packet unit 70~ supplies as an output a logical 1 STUFF signal when a stuff 20 packet is being transmitted. The STUFF signal is supplied to a corresponding one of output local packet interfaces 11~ (FIG. 1), to REAL
QSUM counter 703 and RESERVE QSUM counter 704. It is noted that the STUFF signal is not required to be supplied to output facility interfaces 111. REAL QSUM counter 703 is responsive to the logical 1 STUFF signal 25 to inhibit its decrement input (-) so that the RF,AL QSUM is not decremented in response to a word complete signal WC. This follows because the REAL QSUM count was not incremented in response to the stuff packet request. The STUFF signal is also supplied to the decrement input of RESERVE QSUM counter 704 and the RESQSUM count is 30 decremented by one packet word in response to the logical 1 STUFF signal. - -Address counter 713 supplies the address of the requested packet word to addresc bus ABUS and, in turn, the identified word in the corresponding one of input ports 104 RAM memory or stuff port 10~ i~ read to data bus DBUS and supplied to word latch 714. Byte converter 715 supplies the 3S packet word~ a byte at a time in respc-~se to ENAB~E OUT from a corresponding output interface. ENABT E OUT is also supplied to byte '; ~ ' . ~ . ~ . . , 201~401 counter 707 which generates a word complete (WC) signal when the appropriate number of bytes have been transmitted. In this example, a packet word includes eight bytes in series and each byte includes eight bits in parallel. The WC signal is also supplied to word counter 712, address 5 counter 713, word latch 714, byte converter 715 and reservation factor calculator 716. Word counter 712 is responsive to WC and the total length of the packet, i. e., WORD COUNT, to generate a packet complete (PC) signal when the number of packet words transmitted equals WORD
COUNT. Packet complete signal PC is supplied to next packet unit 706 to 10 initiate transmission of the next packet. Word counter 712 also supplies a first packet word signal to byte counter 707 which, in response thereto, generates a start of packet (SOP) signal. Address counter 713 is responsive to the WC signal to advance the address by one word and, hence, identify the memory location in the appropriate input port RAM storing the next 15 packet word to be supplied via DBUS to word latch 714. The STUFF and SOP signals are supplied to a corresponding one of output local packet interfaces 112-1 through 112-Y. The STUFF and SOP signals are not supplied to output facility interfaces 111-1 through 111-X because they are - -not needed. It is noted that, through this process, in accordance with an 20 aspect of the invention, any one of output ports 110 can address any packet - -in any one of the RAM memories of input ports 104 during the synchronous polling cycle. Additionally, this feature allows a so-called broadcast mode of operation in cross-connect 103. That is to say, any number of output ports 110 can address the same packet in a particular one of input ports 104 during a polling cycle and, hence, simultaneously supply that same packet as an output. Consequently, any problems of prior packet transmission and/or switching arrangements caused by so-called head of the line blockage is eliminated. This results in greater throughput in cross-connect 103 and, hence, in any network in which it is employed. Output 30 port status unit 717 provides a status indication, i.e., whether the output port is functioning properly or not, to processor 114 of FIG. 1.
Operation of output port 110, in accordance with aspects of the invention, can best be explained by wa~ of examples. Accordingly, FIG. 8 shows a sequence of timing diagrams (a) through (e) .llustrating operation of 35 output port 11C for arriving statistical, periodic and stuff packets. Thus, FIG. 8 (a) shows arrival timss for statistical packets S1, S2, S3, S4 and S5 ; " '' ;. " ~' ' , . . , :

` 201~01 and for periodic packets P1, P2, P3, P4 and P5. The arrival of the stuff packets is not shown because they do not directly affect the calculation of - the scheduled time of service for the statistical packets. It is assumed that upon arrival of statistical packet S1, that transmission has just been 5 completed for either a periodic or stuff packet, and there are no other packets to be transmitted and there is no reserved interval for transmitting periodic packets. Consequently, statistical packet S1 is scheduled for service immediately. This follows from equation (2) since the REAL QSUM
is zero (0) and the RESQSUM is zero (0) and, consequently, TQSUM is zero 10 (O). Therefore, the scheduled time of service for packet S1 is time T or now,a3 shown in FIG. 8(b). The REAL QSUM counter 703 is incremented by the WORD COUNT of S1 labeled S1, and the RESERVE QSUM counter 704 is incremented by (k/1-k)(M+1) of S1 designated (k/1-k)S1, as shown in FIG. 8(c). Upon statistical packet S2 arriving, TQSUM is the value of 15 REAL QSUM, i.e., the total length of packet S1 less the number of packet words which have been transmitted, plus RE~SQS~JM, i.e., (k/1-k) S1.
Therefore, from equation (2) STOS for packet S2 i9 T+TQSUM. T is the time at which S2 arrived, and the R13AL QSUM and, hence, TQSUM has been decremented by the number of packet words which have been 20 transmitted for packet S1, a shown in FIG. 8(b). REAL QSUM
counter 703 is incremented by the WORD COUNT for S2 designated S2, and the RESERVE QSUM counter 704 is incremented by (k/1-k)(M+1) for packet S2, designated (k/1-k)S2, also as shown in FIG. 8(b). This procedure is followed for statistical packet S3. When periodic packet P1 arrives, 25 REAL QSUM counter 703 is incremented by the WORD COUNT for P1 and the RESERVE: QSUM counter 704 is decremented by the total length of P1. This follows because an interval, i.e., time, has been reserved, in accordance with an aspect of the invention, for the transmission of periodic packets and normally the net change in TQSUM should be zero (0) 30 regarding scheduling a time of service for subsequently arriving statistical packets. It is noted, however, that when RESQSUM is zero (0), i.e., no time is re~erved for transmission of periodic packets and there are no statistical packets to be transmitted, the total length of the periodic packet or packets determines, in part, the calculated scheduled time of service for any arriving 35 statistical packets~ see equations (1) and (2). When statistical packets S4 and S5 arrive, each respective scheduled time of service (STCS) is .

~ 2015401 determined as set forth above. The periodic packets P2, P3, P4 and P5 are placed in the periodic queue as they arrive, and the appropriate incrementing of REAL QSUM counter 703 and the decrementing of RESERVE QSUM counter 704 are effected.
The actual service times for the packets are shown in FIG. 8(d), and the actual times of service and departure of the packets are shown in FIG. 8(e). As indicated above, statistical packet S1 was scheduled for service immediately upon its arrival and an interval based on the predetermined relationship to the total length of the statistical packet had 10 been reserved, in accordance with an aspect of the invention, to service periodic packets. Thus, periodic packet P1 presently in the periodic queue is serviced upon completing the transmission of statistical packet S1. Since the transmission of periodic packet P1 is completed prior to the occurrence of the STOS for the next statistical packet S2, and there are no other 15 periodic packets presently in the periodic queue, one or more stuff packets (SP) are transmitted. This is important so that synchronization is maintained in the network and so that information flow is smooth. As noted above, continued synchronization requires that there are continuous and contiguous packets in the network. If there was another periodic 20 packet in the periodic queue it would have been serviced immediately.
However, since periodic packet P2 arrives prior to the STOS for statistical packet S2 (FIG. 8(b)), it will be serviced upon completing the transmission of the current stuff packet. Since the stuff packets are only one packet word in total length, the delay in servicing packet P2 is at most only one 25 packet word interval. Since the total length of periodic packet P2 is greater ~ -than the remainder of reserved interval (k/1-k)S1, the actual time of service -of statistical packet S2 is delayed until transmission of periodic packet P2 is completed, as shown in FIG. 8(d) and (e). Upon completion of transmission of packet S2, periodic packet P3 is serviced. Again, since the transmission 30 of periodic packet P3 is completed before the STOS has occurred for statistical packet S3, stuff packets are transmitted until the STOS for packet S3 occurs. Upon completing the transmission of statistical packet S3, periodic packet P4 is serviced. Since the transmission of periodic packet P4 is completed prior to the occurrence of STOS for statistical S4, and 35 periodic packet P5 is in the periodic queue, it will be serviced immedi~tely upon completing the transmission of periodic packet P4. Service of ..: ,.:

201~401 - 2~-statistical packet S4 i9 delayed until the transmission of periodic packet P5 is completed. Then, statistical packet S4 i9 transmitted. Thereafter, stuff packets are transmitted until the occurrence o~ STOS for statistical packet S5 at which time it is transmitted. Thereafter, stuff packets are 5 transmitted until additional statistical packets and/or periodic packets have arrived at the output port. By employing this unique multi-queue output scheduling arrangement, in accordance with aspects of the invention, statistical packets are serviced without undue delay. Indeed, the longest interval that a statistical packet can be delayed from its scheduled time of 10 service is an interval equal to that required for the transmission of a maximum length periodic packet which, in this example, is 256 packet words. By employing this unique multi-queue strategy, in accordance with an aspect of the invention, delaying of periodic packets i9 minimized, obtaining accurate information for scheduler 113 regarding delays 15 encountered by statistical packets is realized and smoothing is achieved of bursty statistical packets streams.
FIG. ~ shows another sequence of timing diagrams (a) through (e) illustrating operation of output port 110 for another sequence of arriving statistical and periodic packets. FIG. ~(a) again shows arrival times for 20 statistical packets S1, S2, S3, S4 and S5 and periodic packets P1, P2 and P3. It is again assumed that initially the periodic or statistical queues are empty and that there is no reserved interval for transmission of periodic packets. Consequently, from equations (1) and ~2) it is seen that statistical packet S1 is serviced immediately, as described above regarding FIG. 8.
25 The remaining statistical packets S2 through S5 are scheduled for service in the manner as described above in relationship to FIG.8 and their respective STOS's are shown in FIG. ~(b). The corresponding calculated time of service showing intervals reserved for transmission of periodic and/or stuff packets is shown in FIG.~(c). Again, the intervals shown in FIG.~(c) are 30 generated as described above in relation to FIG.8. The actual times of service for the packets and departure of the packets is shown in FIGS. ~(d) and (e). Thus, as shown in this example, statistical packet S1 is first transmitted in a manner as described above regarding FIG.8. Upon completing the transmission of packet S1, periodic packet P1 is transmitted, 35 in a manner as described above regarding FIG. ~. Since periodic packet P2 is in the periodic queue and the STOS for statistical packet S2 has not occurred, it is serviced upon completing transmission of periodic packet P1.
However, as shown in FIG. 9(d), periodic packet P2 is large and exceeds all the reserved intervals RESQSUM for periodic packets in RESERVE QSUM
counter 704. Consequently, upon completing the transmission of periodic 5 packet P~, statistical packets S2 through S5 are consecutively transmitted.
The statistical packets are transmitted in the manner shown in FIG. ~(d) because their corresponding STOS has passed. There is no reserved interval RESQSUM for the transmission of periodic or stuff packets. The time at which each of the statistical packets is to be transmitted is determined in 10 next packet unit 706 in response to time T and NSTOS. Specifically, if the STOS for the next statistical packet has passed, the corresponding statistical packet is transmitted upon completing the transmission of periodic packet P2. Thus, in this example, and from FIG. ~, it is seen that the STOS's for statistical packets S2 through S3 have passed prior to 15 completing the transmission of periodic packet P2 and that the STOS for statistical packet S4 has passed prior to completing the transmission of packet S3. Consequently, packet S4 is transmitted upon completing the transmission of packet S3. Similarly, the STOS for statistical packet S5 passe~ prior to completing transmission of statistical packet S4 and, 20 therefore, statistical packet S5 is transmitted immediately upon completing the transmission of statistical packet S4. Periodic packet P3 is not ~ -transmitted until there is a reserved interval RESQSIJM in RESERVE - ~-QSUM counter 704, or there are no statistical packets to be transmitted. -Thus, the transmission of periodic packet P3 i9 initiated upon completing 25 the transmission of statistical packet S5. In this manner, statistical packets are assured to be transmitted within a reasonable delay interval. Again, it is noted, that transmission of a statistical packet will be delayed, at most, for an interval required to transmit a maximum length periodic packet.
However, in this example, the statistical and periodic packets may ~-30 encounter unexpected delay intervals and, consequently, the desired smoothing is not realized. This underscores the importance of accurately - -estimàting the value of reservation factor k, i. e., the percentage of the available bandwidth allocated for transmission of periodic packets.
FIG. 10 shows details, in ~implified block diagram form, of 35 reservation factor calculator 71~ (FIG.7). Accordingly, word complete signal WC is supplied to word counter 1001. Word counter 100l generates an output pulse I after a predetermined number of packet words have been counted which denotes a predetermined interval. Type 1 counter 1002 is reset by the output pulse I from word counter 1001 and is incremented by signal TYPE 1 to yield a count of the number of type 1 packet words, i.e., 5 periodic packet words, which have been transmitted during the predetermined interval. Output pulse I also enables exponentially mapped past (EMP) average generator 1004 to update its output value k, which is representative of a smooth average of the number of periodic packets transmitted during the predetermined interval. Similarly, output pulse I
10 enables comparator 1003 to compare the new EMP average k to the present reservation factor k and, if there is a differencej to adjust up-down counter 1005 accordingly. The output from up-down counter 1005is the reservation factor k. EMP average generator 1004 generates an exponentially mapped past average k of TYPE 1 packets which have been 5 transmitted in the last I packet words in accordance with:
k'= Wi+(l_ W)k , (3) where j i8 a value representative of the proportion of periodic packets which have been transmitted at the output port during the predetermined interval TI, i.e., the interval needed to transmit I packet words, k is the reservation factor and is a value representative of the proportion of periodic packets expected to be transmitted from the output port and W is a weighting factor having a value between zero(0) and one(1). The values of the predetermined interval TI in packet words and weighting factor W are dependent on the packet transmission rate and the desired averaging time constant, namely r=TI/W.
FIG9.11,12,13,14, and 15 when connected A-A, B-B, C-C, D-D, E-E,F-F, G-G, H-H,I-I,J-J, K-K, and L-L form a flow diagram illustrating operations performed by scheduler 113 (FIG.l). To this end, scheduler 113 interfaces with proce~sor 114, TBUS, TQBUS and SBUS. TBUS supplies packet transport information from input ports 104-1 through 104-(X+Y) to scheduler 113 on a synchronous basis. In this example, the synchronous timing sequence, i.e., input port polling cycle, includes N+1 time slots and has a timing rate such that each polling cycle is completed in less than a packet word interval of packets being supplied at the maximum packet - . 201~401 transmission rate for the packet network node. It is again noted that X+Y=N and that time slot O is used to write certain information into units of input ports 104.. The packet transport in~ormation obtained by scheduler 113 from TBUS is the packet destination(DEST), the packet 5 destination extension (DEST EXT), the WORD COUNT for the packet, the last packet transport word OK (IpkTok), type of packet (TYPE) and starting address (SAD) in the RAM of the corresponding input port. The source (SCR), i.e., input port, of the transport information is known by the time slot of the polling cycle during which the transport information was 10 supplied to TBUS from the corresponding input port. Processor 114 provides information as to the status of the input and output ports and the delay difference (DD) between the primary route and secondary route assigned to each for the packet destination (DEST). Port status is obtainable in well known fashion by, ~or example, transmitting test packets --15 or simply observing whether or not "good" packets are being received. This information is obtained, in part, from statistics port 116. The delay ~ -differences are readily obtained by making delay measurements. The measurements may be obtained by employing so-called loop messages to measure the round trip delay on routes between packet network nodes.
Scheduler 113 also includes a so-called routing memory (RAM) which stores information regarding possible routes for the packet, i.e., - ~ -primary or secondary, assigned to the packet destinàtion. The routing RAM
also includes the delay difference value between the primary and secondary -routes. Also stored in the routing RAM is information indicating if the -~
25 packet has previously been alternate routed, i.e., a so-called rerouted status.
For certain control packets the alternate routed field is employed to indicate status of certain of the input ports. It is noted that the primary output port assigned to the packet designation may be a so-called "real" `
output port or a so-called "logical" output port. In this example, there are ~ -30 N=8 real output ports which are designated 1-8. The so-called logical output ports are designated O and ~-15 and are, in this example, as follows: -O-stuff, ~-not assigned, 10-conditional source (CSRC), 11-conditional extension (CEXT), 12-destination extension (DEST EXT), 13-control (CTL), 14-not assigned and 15-stuff. Thus, if a primary output port is identified as 1-through 8 it is a "real" output port, i.e., an actual one of output ports 110 in this node to which traffic is being directed and if it is identif~led as, for ':
.
, . .
, 201~401 example, 13 it is the one of output ports 110 assigned to control. The routing RAM is indexed by the DEST field of the packet to yield the stored information.
Additionally, scheduler 113 includes a so-called threshold 5 memory unit (R~M) (not shown) which stores information regarding possible threshold values employed in determining the routes of the packets.
Speciflcally, the threshold RAM stores threshold values for queuing delay TD, alternate routing delay TA and re-routing delay TRR. The threshold RAM is indexed by the TYPE field, as indicated above, to select 10 predetermined threshold values TD, TA, and TR~ for the particular packet.
In this example, the selection of the threshold values i~ based on the type of packet, grade of service assigned to the packet and so-called droppability of the packet.
Accordingly, the process of scheduler 113 is entered via start 15 oval 1101. Thereafter, operational block 1102 sets the one of input ports 104 to be polled to one (1). Then, conditional branch point 1103 tests to determine if the status is good for the particular one of input ports 104-1 through 104-(X+Y) being polled. If the test result in step 1103 is NO, the port is not good, i.e., not functioning properly, and operational block 1104 20 causes the packet output information to be supplied to statistics port 11B.
This is achieved by operational block 1105 writing the appropriate packet output information on SBUS identifying statistics port 116 as the output port. The packet output information written on SBUS typically includes the output port addres~, the source of the packet (SRC), the starting 25 address of the packet in RAM of the corresponding input port identified by SRC, the TYPE field and WORD COUNT which is the total length (M+1) of the packet. Thereafter, conditional branch point 1106 tests to determine if input port 104-(X+Y) has been polled. If the test re~ult in step 1107 is NO, operational block 110~ causes the input port to be polled next to be set 30 to the next one, i.e, input port=input port+1. Then, control is returned to step 1103. If the test result in step 110a is YES, the last input port X+Y=N in the polling cycle has been serviced and operational block 1108 causes the polling sequence to wait one (1) time slot. As indicated above, this is time slot 0 in the polling cycle which is employed to 35 write information into several units in each of input ports 104. Thereafter, control is returned t~ step 1102. Returning to step 1103, if the test result is ~ -.
': . ' .. ..

201S40i YES, the input port being polled is good and conditional branch point 110~
tests to determine if the packet being serviced in the particular one of input ports 10ds is a new packet. If the test result in step 1108 is NO, control is returned to step 1106 and appropriate ones of steps 1102 through 110~ are 5 iterated until step 1109 yields a YES result. Then, operational block 1110 causes the new packet transport information to be obtained from TBUS.
Again, it is noted that the routing RAM is indexed by the DEST field to yield the stored information regarding the primary and secondary routes and, hence, the primary and secondary output ports assigned to the packet 10 destination, the delay difference between the routes and the rerouting status or if the output port is a logical output port an indication of appropriate ones of input ports 104 designated for a particular control function. Similarly, the threshold RAM is indexed by the TYPE f~eld to yield values for thresholds TD, TA and TRR. Thereafter, conditional 15 branch point 1111 tests to determine if the packet is good or if it is a stuff packet. If IpkTok=1, the packet is good. If the primary output port for the packet is identified as 0 or 15 from the routing RAM the packet is a stuff packet. If the test result in step 1111 is NO, the packet is either not good, i.e., IpkTok=0, or a stuff packet and operational block 1104 causes 20 the appropriate packet output information to be supplied to statistics --port 11B via step 1105 and SBUS. Thereafter, control is returned to step 1106 and appropriate ones of steps 1102 through 1111 are repeated until step 1111 yields a YES result. If the test result in step 1111 is YES, the packet is good and operational block 1112 obtains the primary and 25 secondary routes assigned to the packet destination (DEST), the delay difference (DD) between the primary and secondary routes, threshold values TD, TA and TRR and re-routing status for the packet, i.e., whether the packet v~as previously alternate routed or not. It is noted that typically the primary route has less fixed transmission delay than the secondary route, 30 however, there may be instances that the delays are substantially equal.
Operational block 1113 obtains from TQBUS the queuing delay at the ones of output ports 110 assigned to the primary and secondary routes, namely, TQSUM (P) and TQSUM (S), respectively, and the interval reserved for the tranamission Gf periodic packets, namely, RESQSUM (P) and 35 RESQ3UM (S), respectively. The status, i.e, good or bad, for the primary -and secc~ndary output ports, namely, status (P) and status (S), respectively, .. . . .

201~401 assigned to the packet destination is obtained from processor 114.
Conditional branch point 1114 tests to determine if the primary output port for the packet is the one of output ports 110 designated the control port. This is obtained from the routiIlg RAM. Specifically, in this 5 example, if the primary output port is designated 13, it is the designated control output port. If the test result in step 1114 is YES, conditional branch point 1115 (FIG. 13) tests to determine whether the status of the output port designated control (CTL) is good. If the test result in step 1115 is NO, control is returned to step 11û4 and appropriate ones of the steps of 10 the process are repeated until either step 1114 yields a NO result or step 1115 yields a YES result. If step 1115 yields a YES result, conditional branch point 1116 tests to determine if the queuing delay, i.e., number of packet words waiting to be transmitted, at the control output port exceeds a predetermined threshold value, namely, whether TQSUM(CTL) > TD, (4) where the value TD is set so that if the packet is going to experience more than an acceptable value of queuing delay, its transmission is terminated at statistics port 116. For example, the value of threshold TD is set such that ~ -if the packet will be overwritten in the RAM in the corresponding one of 20 input ports 104 prior to being transmitted from the assigned output port the packet transmission is essentially terminated. Thus, if the test result in step 1116 is YES, control is returned to step 1104 and the statistics port is designated the output port. Step 1105 (FIG. 15) causes the appropriate packet output information to be written to SBUS which, in turn, supplies it 25 to statistics port 11B. Thereafter, control is returned to step 1106 (FIG. 11).
If the test result, in step 111B is NO, operational block 1117 designates the output port to be the one of output ports 110 assigned to be the control (CTL) output port. Step 1105 causes appropriate packet output information to be supplied to the control output port ~ia SBUS.
30 Thereafter, control is returned to step 110B and appropriate steps of the process are iterated.
Returning to step 1114 (FIG. 12), if the te~t result is NO, the primary output port is not control and conditional branch point 1118 tests to determine if the primary output port is identified as the output port ` - 2015401 assigned to the source (SRC) of the packet, namely, the conditional source (CSRC). This designation essentially loops the packet back to its source.
To this end, conditional branch point 111~ tests to determine if the conditional source (CSRC) is intended to have this packet routed to it.
5 This is realized by evaluating the routing status field to determine if the input port (SRC) which supplied the packet is approved for this function.
If the test result in step 111~ is NO, appropriate ones of steps 111~1117 are repeated to determine if the output port is the control output port or the statistics output port. If the test result in step 1119 is YES, conditional 10 branch point 1120 tests to determine the status of the output port OPSRC
assigned to the particular input port (SRC). If the test result in step 1120 is YES, the status (OPSRC) is good and conditional branch point tests to -determine if the queuing delay at the output port (OPSRC) exceeds a predetermined threshold, namely, whether -TQSUM(OPSRC) > TD . (5) The value of and conditions set for threshold TD are essentially the same as that used in equation (4). If the test rei3ult in step 1121 is YES, the queuing delay is too long and step 1104 (FIG. 11) causes the output port to be statistics port 116. Step 1105 causes the appropriate packet output 20 information to be written on SBUS which, in turn, supplies it to statistics port 116. The packet output information written on SBUS typically includes the output port address, the source of the packet (SRC), the starting address (SAD) of the packet in the RAM of the corresponding input -port identified by SRC, the TYPE field and WORD COUNT. Upon 25 completion of step 1105, control is returned to step 1106 (FIG. 11). If the teqt result in step 1121 is NO, the queuing delay at the output port assigned to OPSRC is satisfactory and operational block 1122 selects the output port to be the one assigned to the particular SRC, i.e., OPSRC. Thereafter, step 1105 writes the packet output information on SBUS which, in turn, supplies 30 it to the output port assigned to OPSRC. It is important to note that this process involves so-called indirect addressing in order to determine which one of output ports 110 is.assigned to the particular one of input ports 104 which is interfaced to the particular signal source (SRC~. This is important because a remote node from which the signal may be transmitted has no ,., ,. : ,.

~; ~i; . ,, . ;,; ,~,,",~ "~ ",~ " " ,~ " " ,,~, information as to such output port assignments in this particular node. The use of the indirect addressing is important for achieving loop transmissions and the like to establish nearest node (neighbor) tables and the like.
Returning to step 1118 (FIG. 12), if the test result is NO, the 5 primary output port is not CSRC and conditional branch point 1123 tests to determine if the primary output port assigned to DEST of the packet is an output port assigned to a so-called conditional extension (CEXT). This is another use of indirect addressing in which it is being determined if the packet is from CEXT, it is sent to the control output port and if the packet 10 is from the control input, it is sent to the output port assigned to conditional extension (CEXT), i.e., to DEST EXT. Thus, if the test result in step 1123 is YES, conditional branch point 1124 tests to determine if the input port is assigned to control (CTL). If the test result in step 1124 is NO, the output port is not DEST EXT and control is returned to step 1115.
15 Steps 111~1117 are repeated to determine if the output port assigned to control (CTL) is good or whether the packet is to be supplied to statistics port 116, as described above. If the test result in step 1124 is YES, conditional branch point 1125 tests to determine if the output port assigned to DEST EXTis "real", i.e., one of the N (N=1-8) actual output ports in 20 this node. If the test re~ult in step 112S is NO, control is returned to step1104 (FIG. 11) and the packet is supplied to statistics port 116, as described above. If the test result in step 1125 is YES, the associated output port is DEST EXT and conditional branch point 1126 tests its status. If the test result in step 1126 is NO, the status (DEST EXT)is not good and control is 25 returned to step 1104 (FIG. 11) and the packet is supplied to statistics port11~, as described above. If the test result in step 1126 is YES, status (DEST
EXT) is good and conditional bra~ch point 1127 tests to determine if the queuing delay at the output port assigned to DEST EXT exceeds a predetermined threshold, namely, whether 30 TQSIJM(DEST EXT) > TD . . (6) The same conditions apply to TD as described above regarding equation (4).
If the test result in step 1127 is YES, the queuing delay is too long and control is returned to step 1104 (FIC~. I1) and the packet is supplied to statistics port 11~, as described above. If the test result in step 1127 is NO, . .

201~401 the queuing delay is below the threshold TD and operational block 1128 selects the output port to be DEST EXT, as identified in bit positions VCID(16~VCID(19) in the packet transport word. Thereafter, step 1105 (FIG. 15) writes the packet output information on SBUS which, in turn, 5 supplies it to the appropriate output port assigned to DEST EXT. Then, control is returned to step 1106. Again, the packet output information written on SBUS typically includes the output port address, the source of the packet (SRC), the starting address (SAD) of the packet in RAM of the corresponding input port identified by SRC, the TYPE field and WORD
10 COUNT which is total length (M+1) of the packet.
Returning to step 1123 (FIG. 12), if the test result is NO, the primary output port is not CEXT and conditional branch point 1129 tests to determine if the primary output port is DEST EXT. If the test result in step 112~ is YES, conditional branch point 1130 tests to determine if the 15 output port assigned to DEST EXT is control (CTL). Again, this is another example of indirect addressing. If the test result in step 1130 is YES, the output port is assigned to control and the process returns to step 1115.
Appropriæte ones of steps 1115-1117 are repeated, as described above, to determine if the packet is supplied to either the control output port or 20 statistics port 116. Returning to step 1130, if the test result is NO, the output port assigned to DEST EXT is not control and conditional branch point 1131 (FIG. 13) tests to determine if the output port assigned to DEST
EXT is assigned to conditional source (CSRC). Again, this is another --example of indirect addressing which i~ used to locate appropriate output 25 ports in this node for packets transmitted from a remote node that does not know the port assignments in this node. If the test result in step 1131 is NO, the output port assigned to DEST EXT is not CSRC, control i~
returned to step 1125 and appropriate ones of steps 112~1128 are repeated to determine if the packet is to be supplied to the output port assigned to 30 DEST EXT or to statistics port 116, as described above. If the test result instep 1131 is YES, appropriate ones of steps 111~-1122 and 1115-1117 are -repeated to determine if the packet is to be supplied to the output port assigned to the conditional source, i.e, OPSRC, to the control (CTL) output port or to statistics port 11~, as described above.

201~401 - 3~-Returning to step 112~, if the test result is NO, the primary output port is not I)EST EXT and conditional branch point 1132 (FIG. 14) tests to determine if the primary output port is "real", i.e., one of the N
(N=1-8) actual output ports in this node. If the test result in step 1132 is 5 NO, control is returned to step 1104 and the packet is supplied to statistics port 116, as described above. If the test result in step 1132 is YES, the primary output port is real and conditional branch port 1133 tests the status of the one of output ports 110 assigned to the primary route, i.e., status (P). If the primary output port status is not good, the test result in 10 step 1133 is NO and conditional branch point 1134 tests the status of the output port assigned to the secondary route, i.e., status (S). If the test result in step 1134 i3 NO, control is returned to step 1104 (FIG. 11) and the packet is supplied to statistics port 116, as described above. If the test result in step 1134 is YES, conditional branch point 1135 tests to determine 15 if the queuing delay, i.e., number of packet words to be transmitted from the secondary output port, exceeds a predetermined delay threshold TD, - -namely, whether TQSUM (S) > TD . (7) Again, the value of TD is set so that if the packet is going to experience ~-20 more than an acceptable amount of delay in being transmitted, its transmission is terminated at statistics port 116. For example, the value of delay threshold TD is set such that, if the packet will be overwritten in the RAM in the corresponding one of input ports 104 prior to being transmitted from the output port its transmission i9 terminated. Consequently, delay 25 threshold TD has a relatively high value. Thus, if the test result in step 1134 is YES, control is returned to step 1104 (FIG. 11) and the packet is supplied to statistics port 11B, as described above. If the test result in step 1135 is NO, the delay i~ acceptable and conditional branch point 1136 tests to determine if the packet ha~ been previou31y alternate routed. This 30 is r0adily determined from the destination of the packet (DEST), which input port (SRC) that the packet was received on and the known system topology. Again, it is important to not alternate route and, if necessary, to terminate transmission of packets that have been previousl~ alternate routed if they will experience too long a delay in transmission Termination ... .

of transmission of such packets minimizes the likelihood that the so-called "funeral effect"can result. As i9 known, the "funeral effect" causes throughput in the system to become increasingly less as the load on the system increases. Therefore, terminating transmission of packets that have 5 been previously alternate routed when the delay in the secondary output port exceeds a predetermined minimum acceptable re-routing threshold TRR increases overall system "good" throughput. Thus, if the test result in step 1136 is N0, the packet has not been previou~ly alternate routed and step 1137 selects the secondary output port to transmit the packet. Step 10 1105 writes the packet output information to SBUS and, then, control is returned to step 1106 (FIG. 11). If the test result in step 1136 is YES, the packet has been previously alternate routed and conditional branch point : -1138 tests to determine if the queuing delay TQSUM(S) at the secondary output port is greater than the predetermined re-routing threshold TRR, 15 namely, whether TQSUM (S) > TRR (8) It is noted that threshold TRR represents some minimal transmission delay ~: -interval at the secondary output port so that if the packet were supplied to the secondary output port it would experience only a minimal delay before 20 being transmitted. Thus, if the test result in step 1138 is YES, the delay is too long, control is returned to step 1104 (FIG. 11) and the packet is supplied to statistics port 11~, as described above. If the test result in step 1138 is N0, the delay is acceptable and step 1137 select~ the secondary output port for transmitting the packet. Thereafter, step 1105 causes the ~-25 packet output information to be written on SBUS and, then, control is returned to step 1106 (FIG. 11).
Returning to step 1133 (FIG. 14), if the primary output port status (P) is good, a YES result is obtained and conditional branch point 113~ tests to determine whether the queuing delay at the primary output 30 port exceeds the delay threshold TD, namely, whether TQSUM (P) ~ TD . (g) Again, the conditions regarding TD are as described above. If the te~t result în step 113~ is YES, control is transferred to conditional branch point 1141. If the test result in step 113~ is NO, control is transferred to conditional branch point 1140 (FIG. 15).
Conditional branch point 1141 (FIG. 14) tests to determine 5 whether the packet is a so-called type 1, i.e., periodic packet. This is achieved by determining if bit position TYPE (1) includes a logical 1. If so, this packet is periodic. This test is important because it is not desirable to terminate transmission of periodic packets. If the test result in step 1141 is NO, the packet is statistical and appropriate ones of steps 1134-1138 and 1104 are performed, i s described above. If the test result in step 1141 is YES, the packet is periodical and conditional branch point 1142 tests to determine if the primary output port assigned to the packet DEST has a reserved interval for the transmission of periodic packets, namely, whether RESQSUM (P) > O . (10) If the test result in step 1142 is YES, operational block 1143 (FIG. 15) selects the primary output port to transmit the packet. Thereafter, operational block 1105 causes the packet output information, as described above, to be written on the SBUS and, then, control is returned to step 110B (FIG. 11).
If the test result in step 1142 is NO, conditional branch point 1144 tests the status of the secondary output port assigned to the packet DEST, namely, status(s). If the test result in step 1144 is NO, the status (S) is not good, control is returned to step 1104 (FIG. 11) and the packet is supplied to statistics port 116, as described above. If the test result in step 1144 i9 YES, the status (S) is good and conditional branch point 1145 tests to determine if the packet is a minimum delay type. This test is achieved by interrogating bit position TYPE (4) to determine whether or not it is a logical 1. A logical 1 indicates that the packet has a minimum delay class of service assinged to it. It is noted that both periodic and statistical packets 30 ean be assigned a class of service requiring minimum delay. If the test result in step 1145 is NO, the packet(FIG. 11) is not a minimum deiay type, control is returned to step 1104, and the packet is supplied to statistics port 11B, as described above. If the test result in step 1145 is YE~S, the packet is a minimum delay type and conditional branch point 1146 tests to determine .

i 201S~Oi if the secondary output port assigned to the packet DEST has a reserved interval for the transmission of periodic packets, namely, whether RESQSUM (S) > O . (11) :

If the test result in step 114B is YES, there is an interval reserved for transmitting periodic packets, control is returned to step 1136 (FIG. 15) and - -appropriate ones of steps 113~1138 (FIG. 19) and 1104 (FIG. 11) are ~- -repeated to determine if the secondary output port is to be selected to transmit the packet or whether the packet i8 supplied to statistics port 116, as described above. In turn, step 1105 causes the packet output : -10 information, as described above, to be written on the SBUS. Thereafter, control is returned to step 1106 (FIG. 11). If the test result in step 1146 is NO, there is no interval reserved for transmitting periodic packeits, control is returned to step 1135 and appropriate ones of steps 113~1138 and 1104 are repeated to determine whether the secondary output port is selected to - -15 transmit the packet or whether the packet is supplied to statistics port 116, as described above. In turn, step 1105 causes the packet output ;nformation to be written on SBUS. Then, control is returned to step 1106 (FIG. 11).
Conditional branch point 1140 (FIG. 15) also tests to determine 20 if the packet is a type 1, i.e., periodic packet, as described above. If the test result in step 1140 is YES, the packet is periodic and conditional branch point 1147 tests to determine if the primary output port assigned to the packet DEST has a reserved interval for the transmission of periodic packets, in accordance with equation (10). If the test result in step 1147 is 25 YES, step 1143 selects the assigned primary output port to transmit the packet, step 1105 writes the packet output information to SBUS, as described above, and control is returned to step 1106 (FIG. 11). If the test result in step 1147 is NO, conditional branch point 1148 tests to determine if the packet is a minimum delay type, as described above. If the test result 30 in step 1148 is NO, steps 1143 and 1105 are effected, as described above, and control i9 returned to step 1106 (FIG. 11). If the test result in step 1148 is YES, conditional branch point 114~ tests the statu~ of t~:e secondary output port assigned to the packet DEST, namely, status (S). If the test re8ult in step 114~ is NO, steps 1143 and 1105 are effected, as de~cribed ,'.

201~401 above, and control is returned to step 1108 (FIG. 11). If the test result in step 114~ is YES, conditional branch point 1150 tests to determine if the secondary output port assigned to the packet DEST has a reserved interval for the transmission of periodic packets in accordance with equation (11). If S the test result in step 1150 is YES, step 1137 selects the secondary output port to transmit the packet, step 1105 writes the packet output information to SBUS and control is returned to step 1106 (FIG. 11). This follows because the secondary output port will have the least delay in transmitting the packet. If the test result in step 1150 is NO, conditional branch point 10 1151 tests to determine which one of the primary and secondary output ports has less delay, in accordance with an aspect of the invention, by comparing the actual queuing delay, i.e., amount of packet information to be transmitted, at each of the primary and secondary output ports relative to a predetermined threshold TA and the delay difference DD between the 15 primary and secondary routes assigned to the packet DEST. The relationship is whether TQSUM (P) - TQSUM (S) ~ TA + DD . (12) -The value of threshold TA is selected to be a value significantly lower than the delay threshold TD and such that the packet is not unnecessarily routed 20 to the secondary route. This minimizes the possibility of the so-called "funeral effect" resulting. Again, the "funeral effect" is a condition that results in lower and lower network throughput because of packets being alternate routed. Consequently, as network loading increases system "good"
throughput decrea~es. If the test result in step 1151 is NO, the primary 25 output port has the least delay, step 1143 selects the primary output port to transmit the packet, step 1105 writei~ the packet output information to SBUS and control is returned to step 110~ (FIG. 11). If the test result in step 1151 is YES, the secondary output port has the least delay, control is returned to step 113~ and appropriate ones of steps 113~1138 and 1104 are 30 repeated to determine whether the secondary output port is selected to transmit the packet or whether the packet is to be supplied to statistics port 11~, as described above. Thereafter, control is returned to step 1106 (F~G. 11).

' 201~9iOl - ~4 Returning to step 1140, if ~he test result is NO, the packet i~
statistical and conditional branch point 1152 tests to determine if the packet is a minimum delay type, in a manner as described above. If the test result in step 1152 is NO, the packet is not a minimum delay type.
5 Step 1143 selects the primary output port to transmit the packet.
Thereafter, step 1105 writes the packet output information to SBUS and control is again returned to step 11~6 (FIG. 11). If the test result in step 1152 is YES, the statistical packet has been assigned a minimum delay grade of service and conditional branch point 1153 tests the secondary - - -10 output port status, i.e., status (S). If the test result in step 1153 is NO, the status (S) is not good and step 1143 selects the primary output port to transmit the packet. This follows because the secondary output port is not available and, hence, the primary route will have the least delay. Again, step 1105 writes the packet output information to SBUS and, thereafter, 15 control is returned to step 1106. If the test result in step 1153 is YES, conditional branch point 1154 tests to determine which one of the primary -and secondary output ports has less delay in accordance with equation (12), described above. If the test result in step 1154is NO, the primary output port ha~ less delay and step 1143 selects it to transmit the packet. Again, 20 step 1105 writes the packet output information to SBUS and, thereafter, control is returned to step 110B. If the test result in step 1154is YES, the secondary output port has less delay, control is transferred to step 1136 and appropriate ones of steps 113~1138 and 1104 are repeated to determine whether the secondary output port is selected to transmit the packet or 25 whether the packet is to be supplied to statistics port 116, as described above. Thereafter, step 1105 writes the packet output information to SBUS
and control i9 then returned to step 110~.
OUTPUT LOCAL PACKET INTERFACE
Output local packet interfaces 112-1 through 112-Y (FIG. 1) are 30 employed to interface output ports 11~(X+1) through 11~(X+Y), respectively, to particular apparatus and/or communications links a~
deslred via output terminals 115-(X+1) through 11~(X+Y),respectively. As indicated above, the apparatus and/or communications links being interfaced, correspond to those interfaced by input local packet 35 interfaces 10~ in packetizers 105-1 through 105-Y. This follows because there is a need for two way communication between the apparatus and/or - 201~401 communication links being interfaced. To this end, each of output ports 11~(X+1) through 110-(X+Y) supplies the packet information a byte at a time along with a start of packet (SOP) signal and a STUFF signal to an associated one of output local packet interfaces 112. Each of output 5 local packet interfaces 112 supplies an ENABLE OUT signal to its associated one of output ports 110. The ENABLE OUT signal is at a packet byte rate and indicates to the associated output port that the output local packet interface is ready to receive a packet byte. Each of output local packet interfaces 112 includes apparatus for depacketizing the 10 supplied packets and for supplying the depacketized information in an appropriate signal format for the apparatus and/or communications link being interfaced. The SOP signal indicates the beginning of the packet so that it can be properly depacketized. The STUFF signal indicates whether the packet could be ignored. Apparatus to be included in individual ones of 15 output local packet interfaces 112 will depend on the particular apparatus or communication link being interfaced and will be apparent to those skilled in the art.
NETWORK
FIG. 16 depicts a network, in simplifi~d form, which ~0 advantageously utilizes aspects of the invention. It is noted that there is two way communication between elements forming the network.
Accordingly, shown are private networks 1601 and 1602, so-called local networks 1603 and 1604 and higher layer network 1605. Although only two Iayers in the public system hierarchy are shown, it will be apparent to those 2S skilled in the art that any number of layers may be employed as needed or desired in the overall network. Each of private networks 1601 and 1602 may include a number of switching and access packet network nodes including aspects of the invention. For example, private networks 1601 and lB02 may be those of a particular transport network user and be located at 30 diverse geographic locations. The broadband packets generated in the -private networks are identical to those described in relation to packet network node 100 and employed in networks used in the public system. A
particular private network i9 assigned a unique reference code word Xref in order to identify its packets and to provide transparency for all other ~5 information being transmitted. The broadband packets supplied to and from private network lB01 and another apparatus and/or communication .
' ' !: ' :. ;"; ; i '' ., j . . ~ , 201~01 links are supplied to an access packet network node (AN) 160B. In turn, access node 1606 supplies packets to and receives packets from a switching packet network node (SN) in local network 1603. As indicated above, the packets from private network 1601 and signals from other interfacing 5 apparatus appear as information and are formatted into broadband packets by a packetizer in access node 1606. These broadband packets are generated using a unique reference code word Xref assigned to local network 1603. The packets in local network 1603 may traverse several switching nodes (SN) or be supplied to some other apparatus, network or transmission 10 facility interfacing local network 1603 via access node 1606 or some other access node (not shown). If the packets are destined for some other local network, for example, network lB04, they will be supplied via gateway node 1607 to higher layer network 1605 and, therein, to a switching node (SN).
In gateway node 1607, a new transport word is appended to each packet 15 which has been generated using a unique reference code word assigned to higher layer network 1605. This appending can be achieved by simply adding another transport word to the packets or by ~tripping off the previous transport word and adding a new one generated in gateway node 1607. Similarly, if packets are being supplied from higher layer network 20 1605 to local network 1603, gateway node 1607 would strip the higher layer network transport word which had been added or if the transport word was replaced dropping the higher layer network $ransport word and adding a transport word generated with the reference code word Xref assigned to local network 1603. If the packets being transmitted in higher layer 25 network 160S are destined for local network 1604, they are supplied thereto via gateway node 1608. Gateway node 1608 performs the same functions as gateway node 1607. In local network 1604, the packets are supplied via one or more switching nodes to access node 160~. Access node 160~ supplies the packets to a specific apparatus, transmission facility or private network 30 lB02. Again, the paokets destined for private network 1602 include transport words generated by using a unique reference code word Xref assigned to the private network tran~port user. Consequently, the packets will be recognized in private network lB02. Therefore, it is seen that the priv~te network packets can be readily identified by use of the unique 35 reference code word and still transmit the private network packets on a transparsnt basis through the broadband packet network hierarchy.

Claims (14)

1. Apparatus for generating a packet including at least a transport word, i.e., header, comprising:
means for generating said transport word including a predetermined number of groups of bit positions each including a predetermined number of bit positions, predetermined ones of said transport word bit positions forming a packet length indicator field, a predetermined number of said transport word bit positions forming a first prescribed parity check field and a predetermined number of said transport word bit positions forming an at least second prescribed parity check field;
means for obtaining the length of said packet;
means for inserting bits representative of said packet length in bit positions of said packet length indicator field;
means for generating a first prescribed parity check from bits in predetermined bit positions of said transport word;
means for generating an at least second prescribed parity check from bits in predetermined bit positions of said transport word;
means for inserting a number of bits representative of said at least first prescribed parity check into said number of bit positions of said at least one prescribed parity check field; and means for inserting a number of bits representative of said at least second prescribed parity check in said number of bit positions of said at least second parity check field, said first prescribed parity check, said at lest second prescribed parity check and said packet length indicator being employed to delimit said packet.
2. The apparatus as defined in claim 1 wherein said means for generating said first prescribed parity check includes means for generating a predetermined number of individual parity check bits forming said first prescribed parity check by computing parity from bits in bit positions of one or more of predetermined ones of said groups of bit positions in said transport word.
3. The apparatus as defined in claim 1 wherein said means for generating said first prescribed parity check includes first means for generating a predetermined number of individual parity check bits forming said first prescribed parity check by computing parity from bits in predetermined similar bit positions of predetermined ones of said groups of bit positions in said transport word.
4. The apparatus as defined in claim 3 wherein said means for generating said at least second parity check includes second means for generating a predetermined number of individual parity check bits forming said at least second prescribed parity check by computing parity from bits in predetermined similar bit positions of predetermined ones of said groups of bit positions in said transport word.
5. The apparatus as defined in claim 4 wherein said means for generating said first prescribed parity check includes means for generating a predetermined number of individual parity check bits forming said first prescribed parity check by computing parity from bits in bit positions of one or more of predetermined ones of said groups of bit positions in said transport word.
6. The apparatus as defined in claim 5 wherein said similar bits in said predetermined bit positions in said groups of bits used to generate said parity check bits forming said at least second prescribed parity check include said parity check bits forming said at least first prescribed parity check.
7. The apparatus as defined in claim 1 further including means for interfacing to apparatus supplying information to be formatted into said packet.
8. The apparatus as defined in claim 7 wherein said means for interfacing to apparatus includes means for interfacing to a transmission facility supplying information to be formatted into said packet.
9. The apparatus as defined in claim i wherein said means for interfacing said packet as an output includes means for interfacing to a packet network node.
10. The apparatus as defined in claim 1 wherein said means for interfacing said packet as an output includes means for interfacing to a packet cross-connect switch.
11. The apparatus as defined in claim 4 wherein said means for interfacing said packet as an output includes means for interfacing to a transmission facility to transmit said packet to a remote location.
12. The apparatus as defined in claim 1 further including a source of a reference code word having a predetermined number of bits, and wherein said first means for generating computes said first prescribed parity check bits by computing said parity in conjunction with predetermined ones of said reference code word bits and said at least second means for generating computes said at least second prescribed parity check bits by computing parity in conjunction with predetermined ones of said reference code word bits, wherein each of said reference code word bits defines the sense, i.e., odd or even, of said parity being computed to obtain a corresponding one of said parity check bits being computed.
13. Apparatus for generating a packet including at least a transport word, i.e., header, comprising means for generating said transport word including a predetermined number of groups of bit positions each including a predetermined number of bit positions, predetermined ones of said transport word bit positions forming a plurality of parity check fields and predetermined others of said transport word bit positions forming data field;
means for generating a plurality of prescribed parity checks from bits in predetermined bit positions of said transport word, wherein each of said bits from said predetermined bit positions in said transport word is used to compute at lest two different parity check bits which form said plurality of prescribed parity checks; and means for inserting said computed parity check bits into bit positions in said plurality of parity check fields in said transport word, wherein said plurality of prescribed parity checks are employed to verify said transport word data fields.
14. The apparatus as defined in claim 13 further including a source of a reference code word having a predetermined number of bits, and wherein said means for generating a plurality of prescribed parity checks includes first means for computing first parity check bits from bits in predetermined bit positions of said transport word in conjunction with predetermined ones of said reference code word bits to form a first parity check and at least second means for computing at least second parity check bits from bits in predetermined bit positions of said transport word in conjunction with predetermined ones of said reference code word bits to form an at least second parity check, wherein each of said reference code word bits defines the sense, i.e., odd or even, of said parity being computed to obtain a corresponding one of said parity check bits being computed and said means for inserting inserts said first parity check bits into a first parity check field and said at least second parity check bits into an at least second parity check field.
CA002015401A 1989-06-23 1990-04-25 Multi-length packet format including check sequence(s) Expired - Fee Related CA2015401C (en)

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US07/371,229 US5020054A (en) 1989-06-23 1989-06-23 Packet format including unique network identity
US371,229 1989-06-23
US07/371,236 US4962498A (en) 1989-06-23 1989-06-23 Multi-length packet format including check sequence(s)

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JPS51123505A (en) * 1975-04-21 1976-10-28 Hitachi Ltd Data transmission system
JPS5720049A (en) * 1980-07-11 1982-02-02 Fujitsu Ltd Data transmission system
JPS5824253A (en) * 1981-08-04 1983-02-14 Nippon Telegr & Teleph Corp <Ntt> Packet synthesizing system
JPS63224443A (en) * 1987-03-13 1988-09-19 Kokusai Denshin Denwa Co Ltd <Kdd> Semi-storing type packet switching system

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