CA1251519A - Method of desmearing holes - Google Patents

Abstract

A B S T R A C T

METHOD OF DESMEARING HOLES

The invention relates to a process of desmearing drilled holes in PCBs with a high aspect ratio through plasma cleaning. The plasma processing is carried out with a CF4/O2 gas mixture. By a re-spective selection of the CF4 contents, the method can be opti-mized with respect to the etching speed and uniformity through the individual drilled hole, across each individual panel and with respect to the entire panel set of the plasma reactor. It was found that an optimum is reached for these parameters with a CF4 contents of 60 Vol.% and the remainder oxygen.

Description

12~519 n E S C P~ I P 1 I

METHOD OF DES~lEARING HOLF~

The invention relates to a method of desmearing holes in printed circuit boards (PCBs) by plasma etching with a CF4-02 gas mixture.

Multilayer PCBs usually consist of a number of planes of conductive copper patterns separated from each other by insulating layers. In modern-day PCB technology boards with dimensicns of e.g. 700 mm x 600 mm and a thickness of up to 4.6 mm comprise up to 22 current supply and signal planes separated by glass fiber-reinforced epoxy resin layers.
Their production consists in that onto a so-called basic component consisting of several layers of prepreg, copper foils are laminated onto both sides, with a circuit being made therein in a subtractive photo-etch process. Subsequent-ly, several layers of prepreg and onto those one respective copper foil are laminated on both sides. Signal lines are provided in a photo-etch process and by semi-additive copper plating. The next step consists of two-sided application of further insulating layers and of a copper foil, and a mask for the drilling of holes is made. To connect the two signal planes holes are drilled with a laser beam, and subsequently signal lines are provided on both sides in a photo-etch process and by means of semi-additive copper plating, with the drilled holes being copper-plated, too. Finally, several such components as well as copper foils on the two external surfaces are ioined in a laminating process . For the interconnection of the individual planes, holes through the PCBs are provided. In PCes ~lith the above mentioned dimensions approximately 40,000 holes with a diameter of approximately 0.4 mm have to be drilled. Such drilling involves the risk D~

lZ~iS~t3 of the abraded matter being pressed by the drill plate against the drill wall, and accumulated there into a solid film. These impurities are very difficult to remove and cause defective contacts behJeen the individual lnner planes.

It has therefore been suggested (GE-OS 17 04 296~ to use a compressed air jet for the speedy removal of the abraded matter which is to be blown out of the contact holes during or after drilling. However, this process was not successful.
German Patent 26 06 984 describes a method of chemically cleaning contact holes in multilayer PCBs by means of an aggressive acid as cleaning medium dissolving epoxy resin smears in the drill wall, as well as a devise for carrying out this process. According thereto the PCB, after the drilling of the contact holes, is moved with a constant speed horizontally and in a closed chamber over a processing path formed by a slotted tube arranged beneath the transport path and vertically to the transport direction, from which exits concentrated sulfuric acid under pressure which intensively rinses the contact holes of the PCB. Subsequent-ly, the PCB is exposed to a strong air jet, and rinsed. The disadvantage of this method consists in that for removing the drilled hole smears corroding chemicals have to be used which are disadvantageous for the environment. Analogously, US-Patent 4,155,775 describes a method for cleaning holes in multilayer PCBs with high aspect ratio of holes. In this process, cleaning of the hole surfaces with chrome-sulfuric acid is preceded by cleaning by means of vapor blasting, and a removal of the loose fibers with a suitable solvent.

US-Patent 4,012,307 describes a plasma processing for cleaning holes in PCBs, using lcw pressures and low temperatures, and oxygen or a mixture of oxygen and ~,E 985 005 1.~5151~

carbon tetrafluoride as ,oases. This method is stated to be superinr to all wet cleaning processes, but it was found that it provides only a part-cleaning of the drilled holes because the plasma does not completely penetrate the holes.
A certain improvement was achieved by the transition from a reactor with ring electrodes to a reactor with a parallel plate electrode configuration. In a further improvement (PCT
Application h'0 80/02353) the copper surfaces of the drilled PC~s themselves are used as electrodes which generate the plasma and determine its shape in the environment of the holes to be cleaned. Furthermore, in order to improve the uniformity of the epoxy etchina, over the surface of a PCB, dielectric field suppressors of a polymeric material were positioned at the four edges of the PCB. The disadvantage of this rethod is that if there is a short circuit in the surface of a PCB no plasma whatever is produced. This kind of reactor has therefore not been used in PCB manufacture.

In recent years, numerous wet chemical etching processes have been replaced by dry processes~ e.g. by gas plasma etching. In these processes, molecules in the plasma are ionized, many others separate and form free radicals, i.e.
molecular fragments are formed which comprise unpaired electrons not participating in bonds. Due to the presence of ions and particularly of free radicals the plasma gets extremely reactive. Typical uses include the etching of surfaces of organic material which can be implemented at low temperatures and low pressure. The devices for generating and using plasmas at low temperature and low pressure are relatively uncomplicated and avoid many disadvantaaes encountered in wet chemical processes. To give an example, the plasma reaction products are gaseous so that after plasma etching no solid residues will remain. Typical gases used in plasma etching are oxygen (2)~ or a mixture of oxyoen and carbon tetrafluoride (CF4), with the carbon tetrafluoride serving as a source for atomic fluorine.

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In the electronics industry, plasma etching processes were used for the blanket etching of surfaces nf organic mate-rial. US-Patent 3,806,365, to give an example, describes the removal of photoresist materials from semiconductor surfaces by means of a plas~a of cxygen and organo-halogen compounds.
In US-Patents 3,816,196 and 3,816,1~8 the use of an oxygen plasma is described for etching patterns in synthetic films through a photoresist mask in semiconductor production.
US-Patent 3,615,956 describes the use of an oxygen and carbon tetrafluoride plasma for polishins and cleaning semi-conductor wafers.

The above mentioned US-Patent 4,012,307 covers a plasma etching process for desmearing holes drilled in PCBs. For that purpose, a gas mixture of oxygen and carbon tetra-fluoride is used. Literature agrees that mixtures with a contents of approximately 15 to 30 Vol.% CF4, and a pressure of approximately 0.267 mbar are among the quickest etching mixtures for the removal of expoxy resin smears in holes drilled in PCBs. Therefore, mixtures containing 30 Vol.~
carbon tetrafluoride with the remainder oxysen, have former-ly been successfully used for cleaning PCBs with an aspect ratio of approximately 1:1 up to 1:3. With respect to etching uniformity however there were problems when the boards to be cleaned were very large, e.g. 600 x 700 mm, and when they had a high aspect ratio of approximately 1:11 up to 1:13.

It was found that the etching uniformity with reference to the individual panel and the uniformity from panel to panel did not suffice in those cases where a parallel panel reactor was loaded with several panels of the above dimen-sions, and the above mentioned aspect ratio. If an etching gas containina ~0 Vol.% CF4 is used, the etching speed is highest at the h~,le entrances but decreases towards their 1251Si9 middle. The same applies to the individual panel, where the etching speed is higher at the edge of the panel than in its center.

Obiect of the invention is a method of desmearing holes by means of plasma etching with a CF4-02 gas mixture, where the CF4 concentration is selected in such a manner that the individual holes with a high aspect ratio are cleaned of the epoxy smears, with a simultaneous etch uniformity through each individual hole, within the panel in the individual cells and within the entire cell set of the plasma reactor.

The cbject of the invention is achieved by a method in accordance with patent claim 1.

As described below, the effectiveness of the plasma cleaning process was studied on the basis of measurings in order to get information on the removal of the epoxy smear (high etching rate); the etch uniformity referring to the inside of a hole; the etch uniformity referring to the individual panel, and the etch uniformity from panel to panel. The CF4 contents of the etching gas varied between 2 and 80 Vol.%, with the rest being oxygen in each case. All other para-meters remained unaltered. The etch back in the holes was measured by means of samples which wgre inserted into the panels . ~lith the CF4 contents which provided the most advantageous epcxy etch backs and etch uniformities more tests were carried out with respect to reproducibility. The influence of the CF4 contents on the panel temperature was examined, too.

Figures 1 tG 6 represent the following:
ig. 1 a parallel plate reactor, with cells 2 to 9 being cccupied (electrodes not shownj;

GE 985 nO5 l~5~S:l~

Fig. 2 a PCB with inserted samples in positions A and E;

Figs. 3A a representation of the examination to 3E method with inserted samples;

Fig. 4 epoxy etch back and etch uniformity in cell 6;

Fig. 5 epoxy etch back and etch uniformity in cell 8;

Fig. 6 epoxy etch back and etch uniformity from cell 6 to cell 8.

All tests were implemented in a multicell parallel plate plasma reactor of the type 7415 produced by Branson/IPC
Inc., Hayward, CA. with a 13.5 Mc/s generator. The process parameters and the process sequence for all plasma test series were the same, with the exception of the different CF4 contents:

total gas flow: 1.2 l/min.
pressure: 0.3333 mbar power: 3500 Watt loading: 8 boards of 600 x 700 mm.

In order to keep the board temperature during plasma pro-cessing with high frequency below the epoxy Tg-point of approximately 128C, the following sequence was used:

25 minutes plasma processing, 10 minutes reactor door open to cool ccwn boards and equipment9 ~;E 985 005 25 minutes plasma processina.

The CF4 content was varied at the gas inTet in the range from 2 to 8C Vol.'. High and low CF4 contents were alter-natively applied in order to eliminate system failures due to loading changes, equipment unreliability or process instabilities:

CF4 contents CF4 flow Run Vol.% l/min. ~lo.

2 0.024 11 0. 120 6 0 . 240 9 0 . 360 7 0.480 5 O. 6Q0 3 0 . 720 0 . 840 2 0 . 960 4 Owing to the low epoxy etch back in the two outer cells of the parallel plate reactor which can usually be loaded with 10 boards, only the 8 inner cells were loaded with boards for etching. To determine the etch uniformity across all 8 board-loaded cells of the reactor, the epoxy etch back was determined on the board in the cell with the highest etch back, i.e. cell 6, and on the bcard in the cell with the lowest etch back, i.e. in cell 8. The fact that the highest etch back of epoxy resin smears takes place in cell 6 is most probably due to the asymmetrical supply of electric pnwer to the electrode pairs, and to a corresponding te~,perature distribution in the reactor. The gas flow lZ~15~3 direction could be of some importarce, too. In all test runs, the PCBs were arranged in a floatirg mocle between the boards of the parallel board reactor. Fig. 1 depicts a reactor loaded in cells 2 to 9, with the electrodes being not shown.

The etch uniformity across cells 2 to 9 was determined by specifying the epoxy etch back in the holes of the boards in cells 6 and 8 at the maximum etch position (marked A) at the outer board side, and at the minimum etch position (marked E) in the middle of the board. These cells were loaded with prepared PCBs 1 into which samples 2 were inserted at points A and E (Fig. 2). The remainder of the cells was loaded with unprepared boards.

The examination of the etch uniformi~y across the boards by means of the inserted samples is described with reference to Figs. 3A to 3E (see also IBM-TDB Vol. 25, No. 1, June 1982, pp. 284-285, W. D. Ruh, Test Specimen for Plasma Etch Process). For the tests, samples 31 dimensioned 25 mm x 25 mm and masks 33 dimensioned 10 mm x 25 mm are cut of drilled boards . Samples 31 therefore contain drilled through holes 32. One respective face of the sample and mask is polished to make sure that both fit closely one upon the other. The pnlished surface of mask 33 has slots 34 to simulate through holes (34a) (Fig. 3B) when sample 31 and mask 33 are put together with their polished surfaces. During etching through the masks, recesses 34b of approximately the same width as the diameter of the drilled through holes are made in the sample. The mask-sample pairs are inserted for etching into the ~lindows of a board 37 in accordance with Fig. 3C. ~s shown in an enlarged representation in Fig. 3B
they are inserted. by means of wedges 35~ and pressed tosether. Each ~ample-mask pair is covered on both sides with 3 copper coating 36. ~alf of the through holes 32 in ~E g85 005 ~25~S~3 sample 31 are covered during etching with an aluminum foil 38. During plasma etching, the epoxy resin of sample 31 is etched on the polished surface in the area OT the simulated through holes 34a through the reactive species, and recesses

3~b are formed in the sample without the glass fibers and copper planes being noticeably etched at the same time. At the etched samples, the epoxy etch back can be determined by means of a surface analyzer, the tracing track (39) of the stylus extending in the direction shGwn in Fig. 3D. From the tracing tracks of the epoxy etch back, the etching speeds and etching uniformity along the etched recesses 34b can be calculated.

At the same time, the samples with their drilled through holes 32 can be used for comparing plasma- cleaned and uncleaned holes on the basis of flat and cross sections after the copper plating of the through holes. For that purpose, as specified above, half of the through holes 32 drilled in sample 31 were covered on both sides with self-adhesive aluminum foil 38 in order to prevent plasma in-fluence during the process (Figs. 3B and 3E). An advantage of the cross-section test n;ethod is that it can be implemented at the processed board itself for evaluating the product quality. The disadvantage is however that the resolution is low because the lowest value detectable of the epoxy etch back at the glass fiber is approximately 3 llm only owing to the low 250-fold enlargement with the microscope, and to the roughened structure of the o'rilled hole walls. The above described method of determining the epoxy etch back by means of the inserted samples however has a resolution of approxi-mately 0.2 ,um which is due to the polished surface of the sample, and the high resolution of the mechanical surface analyzer (approximately 5,000-fold). This high resolution permits the very precise fixing of an etch back profile along the recesses 34b, with the surfaces of the internal BE g85 005 .~515~f3 copper planes and of the glass fibers serving as reference lines for rreasuring the epoxy etch back profiles with the surface analyzer. This method was used to determine the epoxy etch back profile in recesses 34a in positions A and E
nf the PCBs in cell 6 and cell 8. The etch uniformity was determined across cells 6 and 8 and across the entire cell set, i.e. boards 2 to 9.

The panel temperature during plasma etching was measured in both cells at the panels in the vicinity of the four inserted samples. Temperatures of approximately 74 to 121C were observed which were recorded in steps of 5 to 6C. Self-adhesive aluminum foils covered the stripes used for measuring the temperature to protect them against the pl asrna .

With reference to Figs. 4 to 6 the experimental results will be discussed below. As specified above, the maximum epoxy etch back will always occur at the hole entrances in the external zores of the PC8 in position A (Fig. 2), and the lowest in the middle of the holes in position E ir- the board center. To give an example: with a mixture of 20 Vol.% CF4, with the remainder oxygén, at the hole entrances of the PCB
in cell 6 in position A epoxy etch backs 6AHE of 18.9 ~irri and 17.1 ~!m, i.e. an average value of 6AHE of 18.0 um will be obtained. The mirimum value for the etch back ~lill be obtained with the same gas mixture in cell 6 in the middle of the panel in position E, i.e. a value 6EHM of 1.1 um.

Figs. 4 and 5 bepict for cells 6 and 8 of the plasma reactor the values for the epoxy etch back as a mean value 6AI~E
and 8~H-E of the two values measured at thetwo hole entrances in position A, and the values for the epoxy etch back in th middle c~ he hole in positicn E, 6Et,~1 and 8Ep~fi, and the corresponding etch uniformity acrnss the panel Sl.9 ~H~ or ~EHM

aaainst the CF4 contents of the etch gas (of 2 to 80 Vol.CO), with the remainder oxygen. Apart from the CF4 contents Fig.

4 also shows the sequence of the measurings with the various CF4 concentrations.

The etch uniformity across a cell, i.e. across a panel as a function of the CF4 contents strongly depends on the epoxy etch back at the hole entrances (position A). In the cell 6 which has the highest etching speed (Fig. 4) the epoxy etch back at the hole entries 6AHE strongly increases with rising contents of the etch gas of CF4 to approximately 30 Vol.%
and decreases again, as follows:

6AH~ 3.6 9.0 18.0 28.3 26.5 22.8 10.7 3.0 1.4 (~m) The epoxy etch back in the middle of the hole (position E) also increases with rising CF4 contents, but much less quickly:

6~HM 1.6 0.4 1.1 1.4 2.6 4.7 6.1 2.51.3 It reaches its peak value with a CF4 contents of the etch nas of approximately 60 Vol.,~.

The etch uniformity across the panel is calculated by dividing the value for the etch back in the hole middle ~51519 by the mean value for the etch back at the hole entrances:

-- 0.44 0.044 0.061 0.049 0.0098 0.206 n.57 0.83 0.92 These values reveal the fact that with CF~ concentra-tions of less than 10 Vol.O approximately the etch uniformity in the cell is very high. As the fluorine contents in the etch gas is very low and oxygen supplies the etching species there is scarcely any accelerated etching at the hole entrances. The highest etch back in the middle of the hole is effected at 60 Vol,% CF4, whereas owing te passivation the etch back at the hole entrances has already decreased very considerably with this CF4 content. Therefore this CF4 concentration permits a high etch uniformitv of 0.57. Upon the t~ansition to still higher CF4 contents the etch uniformity increases still further but the etch back decreases simultaneously.

In cell 8, i,e, the cell with the lowest etching rate of the plasma reactor the epoxy etch back also increases with rising CF4 etch gas contents, but on the whole its increase is much lower than that of cell 6. The maximum for the etch back at the hole entrances 8 ~ of 24 ,um (Fig, 5) is only achieved with CF4 contents of 40 Vol.~'c (in cell 6 with 30 Vol,/O), In the middle of the hole the maximum for the etch back 8E~1 of 2,5 llm, as in cell 6, is also reached with 60 Vol.,O CF4. The values for the etch uniformity at 40 or 60 Vol.,O CF4, respective-ly, in cell 8 are 0.0,35 and 0.231. The fact that the epoxy etch back ;n cell 8 is on the whole lower than in cell 6 m.7y be due to difterent panel temperatures GE 9&5 005 - ]3 -during plasma etching, because it has been found that the panel te~perature in cell 8 is al~Jays lower than in cell 6. The panel temperature increases in each cell with a risising CF4 etch gas content which is a maximun of approximately 121C in cell 6 at 50 to 60 Vol.,' CF4, and in cell 8 a maxi~u~ of approximately 108C at 60 Vol.% CF4.

The curve for the epoxy etch back can be explained with a mechanism suggested for etching polymeric materials with the plas~a system 02/CF4. According to this mechanism, the relative concentration of fluorine atoms on the epoxy surface first increases with a rising CF4 concentration. The fluorine ato~s react with the epoxy and crack existing bonds, forming active centers for the attack of the etching medium. With higher CF4 concentrations, on the other hand, mostly CFX bonds form on the epoxy surface hhich cause a surface passi-vation and an epoxy etch back decrease. These findings can be used for cleaning drilled holes with a high aspect ratio. There, an increasing CF4 etch gas content effects a strong etch back of the epoxy at the hole entrances, using up all available fluorine. Due to the simultaneous depletion of active fluorine there is a lower epoxy etch back in the middle of the drilled holes. The surface passivation encountered with higher CF4 contents explains the etch decrease at the hole entrances and the etch increase in the hole middle due to the active fluorine which is again available in higher quantities there. With a still further in-creasing CF4 contents there is a surface passivation also in the hole middle so that the etch backs in the hole middle and at the hole entrances are roughly balanced, and there is an increase of the etch uni-for~,itv across the cell. In cell 6, to give an example, ~Sl Sl~

there is a cell uniformity of 0.75 with a CF4 contents nf 6n Vol./O. ~lith 70 Vol.,O CF4 contents there is a uniformity across the cell of 0.83 owing to the surfacc passivation also in the hole middle.

Fig. 6 represents the etch uniformity across the plasma reactor from cell 6 to cell 8, and the point of lowest etch back in both cells, i.e. the etch back in the hole middle in the panel center of cell 8 (position E), as a function of the CF4 concentration. The overall etch uniformity is calculated by dividing the values for the etch back in the hole middle from cell 8 8EH~l by the values for the etch back at the hole entrances from cell 6 6 ~ . ~lith 70 Vol.% CF4 an etch uniformity of 0.48 is achieved, but with a lower epoxy etch back rate.

Table 2 shows all etch uniformities ~ith a gas mixture of 60 Vol.%O CF4, and the remainder oxygen.

~E 985 005 ~251~9 T~LE 2 X EFoxy etch back uniformity ~anel position A 6 E/A E E/A 6 eo E

uniformit~
of the hole: HE .798 .626 .793 .403 uniformity HM .555 .ZOO
of the cell: AHE

uniformit~ of cell 8EMH 199 the reactor: cell 6HHE -lt can be concluded that the influence of the CF4 contents on the epoxy etch back and the etch uniformity of drilled holes in PCBs wiih a high aspect ratio of hole diameter to panel thickness of approximately 1:11 to 1:13 in a Branson 7415 multicell parallel plate reactor could be tested by means of inserted samples.
With respect to a mean value of the epoxy etch back, to the uniformity within the drilled holes, the unifo mity across the individual panel, and the uniformity across the entire plasma reactor the plasma cleaning process with 60 Vol.C,~ CF4 and the remainder oxygen revealed optimum results. A CF4 content of approximately 10 Vol.Cb and less also brought an improved etch uniformity, but the epoxy etch back with this CF4 ccncentration was considerahly reduced ccmpared with 60 Vol.,~ CF4.

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hlith the inserted sa~ples it was furthermore found that the CF4 contents of the etch gas deter~ines the etch front through the drilled hole so that depending on the CFa content the cross-section of drilled walls can be concave, straight or convex.

Claims (8)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:

1. A method for uniformly desmearing holes in freely electrically suspended PCBs with a high aspect ratio of drilled hole diameter to board thickness through plasma etching with a CF4/O2 mixture, comprising the steps of:
(a) loading a plasma reactor with the freely electrically suspended PCBs to be cleaned, said PCBs having a plurality of drilled holes with an aspect ratio of hole diameter to board thickness of at least 1:10, and evacuating said plasma reactor to a first predetermined pressure;
(b) supplying a gas mixture consisting of approximately 50 to 80 Vol.% CF4 and 50 to 20 Vol.% O2 until a second predetermined pressure has been reached;
(c) switching on a high frequency generator connected to substantially parallel electrodes of the plasma reactor for the generation of a plasma;
(d) maintaining the plasma for a predetermined period;
(e) switching off the high frequency generator, supplying air and discharging the plasma reactor;
and (f) repeating steps b) through e) at least 10 minutes after the first performance of step e); so that uniformity of etching all interior portions of said drilled holes, uniformity of etching all drilled holes and uniformity of etching all PCBs are ensured.

2. Method as claimed in claim 1, wherein the plasma reactor is evacuated to a first pressure of approximately 0.066 mbar.

3. Method as claimed in claim 1 wherein the plasma cleaning process is effected with a gas mixture of approximately 55 to 70 Vol.% CF4 and 45 to 30 Vol.%
oxygen, with a pressure between approximately 0.1 and 1 mbar and an overall gas flow of approximately 1.2 1/min.

4. Method as claimed in claim 1 wherein the plasma cleaning process is effected with a gas mixture of 60 Vol.% CF4 and 40 Vol.% oxygen, with a pressure of 0.333 mbar and an overall gas flow of 1.2 1/min.

5. Method as claimed in any one or several of claims 1, 2 or 3 wherein the output of the high frequency generator is between approximately 3 and 6 kW, preferably 3.5 kW.

6. Method as claimed in claim 1 wherein the temperature during plasma processing is maintained at a level between approximately 80 and 150°C.

7. Method as claimed in claim 1 wherein the temperature during plasma processing is maintained at value less than approximately 128°C.

8. The method of claim 1 wherein said predetermined time period is at least 25 minutes.