CA1236889A - Amplifier arrangement - Google Patents
Amplifier arrangementInfo
- Publication number
- CA1236889A CA1236889A CA000504110A CA504110A CA1236889A CA 1236889 A CA1236889 A CA 1236889A CA 000504110 A CA000504110 A CA 000504110A CA 504110 A CA504110 A CA 504110A CA 1236889 A CA1236889 A CA 1236889A
- Authority
- CA
- Canada
- Prior art keywords
- transistor
- emitter
- base
- current source
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/26—Push-pull amplifiers; Phase-splitters therefor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0211—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the supply voltage or current
- H03F1/0244—Stepped control
Abstract
ABSTRACT:
Amplifier arrangement.
A high-efficiency amplifier of the class-G type comprises a first transistor (T1), whose collector is connected to a first supply voltage (V1) via a first diode (D1), and a second transistor (T2), which is connected in series with said first transistor and which has its collector connected to a second supply voltage (V2).
The first transistor (T1) is driven via a third transistor (T3), which is arranged as an emitter follower by means of a first current source (5), the input voltage (Vi) being applied to this third transistor. For a low input voltage (Vi) the second transistor (T2) is cut off and the first transistor (T1) is connected to the first supply voltage (V1) via the first diode (D1). Above a specific inputvoltage (Vi) the second transistor (T2) is driven into conduction by means of a driver circuit, so that the first transistor (T1) is connected to the second supply voltage (V2). This driver circuit comprises a first current path which is arranged between the second supply voltage (V2) and the emitter of the third transistor (T3) and which comprises the series arrangement of a second current source (7), the emitter-collector path of a fourth transistor (T5) and a second diode (D4), and a second current path which is arranged between the junction point (3) between the first transistor and the second transistor (T1, T2) and the common point (11) and which comprises the series arrangement of a third diode (D3), a fourth diode (D4) and a third current source (8). The base of the fourth tran-sistor (T4) is connected to the junction point (9) between the third diode and the fourth diode (D2, D3) and the collector of the fourth transistor (T5) is connected to the third current source (8) by means of a fifth diode (D5).
By means of such a driver circuit it is possible to drive the output (2) to the value of the second supply voltage (V2) minus substantially one base-emitter voltage.
Fig. 1.
Amplifier arrangement.
A high-efficiency amplifier of the class-G type comprises a first transistor (T1), whose collector is connected to a first supply voltage (V1) via a first diode (D1), and a second transistor (T2), which is connected in series with said first transistor and which has its collector connected to a second supply voltage (V2).
The first transistor (T1) is driven via a third transistor (T3), which is arranged as an emitter follower by means of a first current source (5), the input voltage (Vi) being applied to this third transistor. For a low input voltage (Vi) the second transistor (T2) is cut off and the first transistor (T1) is connected to the first supply voltage (V1) via the first diode (D1). Above a specific inputvoltage (Vi) the second transistor (T2) is driven into conduction by means of a driver circuit, so that the first transistor (T1) is connected to the second supply voltage (V2). This driver circuit comprises a first current path which is arranged between the second supply voltage (V2) and the emitter of the third transistor (T3) and which comprises the series arrangement of a second current source (7), the emitter-collector path of a fourth transistor (T5) and a second diode (D4), and a second current path which is arranged between the junction point (3) between the first transistor and the second transistor (T1, T2) and the common point (11) and which comprises the series arrangement of a third diode (D3), a fourth diode (D4) and a third current source (8). The base of the fourth tran-sistor (T4) is connected to the junction point (9) between the third diode and the fourth diode (D2, D3) and the collector of the fourth transistor (T5) is connected to the third current source (8) by means of a fifth diode (D5).
By means of such a driver circuit it is possible to drive the output (2) to the value of the second supply voltage (V2) minus substantially one base-emitter voltage.
Fig. 1.
Description
~368~39 PHN.11.324 l 16.7.85 Amplifier arrangement.
The invention relates to an amplifier arrangement, comprising:
- a first transistor having an emitter which is coupled to a first terminal for connection to a load which is coupled to a reference point, and having a collector which is coupled by means of a first semiconductor junction to a second terminal for a first supply voltage, - a second transistor having a collector-emitter path which is arranged in series with the collector-emitter path of the first transistor, and having a collector which is coupled to a third terminal for a second supply voltage which is higher than the first supply voltage, and - a third transistor arranged as an emitter-follower and having a base for receiving an input signal and having an emitter which is coupled to the base of the first transistor.
The invention also relates to a push-pull amplifier equipped with such an amplifier arrangement.
Such an amplifier arrangement of the class-G
type may be employed as a power amplifier for audio signals.
A class-G amplifier is to be understood to mean an amplifier in which the effective supply voltage increases in a number of steps depending on the input signal. This results in an 25 amplifier having a high efficiency.
Such an amplifier arrangement is disclosed in United States Patent Specification 3,961,280. In this known arrangement the input signal is applied to the bases of the first transistor and the second transistor via a third transistor arranged as an emitter follower. For low input voltages the second transistor is cut off, so that the first transistor is connected to the first supply voltage.
~68~3 PHN.11.324 2 16.7.85 If the input voltage becomes higher than the first supply voltage, the second transistor is turned on, so that the first supply voltage is disconnected and the first transistor is connected to the second supply voltage.
When the second transistor does not conduct, the voltage across the base-emitter junction of this transistor is at the most equal to substantially the full first supply voltage. In order to preclude breakdown of the base-emitter junction as the result of this voltage, a diode misarranged 10 in the base line of the second transistor. In order to prevent the first transistor from being bottomed and there-by producing distortion when the second transistor is not yet fully conductive, two series-connected diodes are arranged in the base line of the first transistor.
However, a drawback of these diodes is that they limit the swing of the output signal and, consequently, the efficiency of the amplifier arrangement. For the maximum output the voltage on the base of the third transistor is substantially equal to the second supply voltage. The voltage 20 on the output is then equal to the second supply voltage minus the sum of the base-emitter voltage of the first transistor and the third transistor and the diode voltage across the two diodes arranged in the base line of the first transistor.
It is the object of the invention to provide a class-G-type amplifier arrangement which has an improved output-voltage swing in comparison with the known arrangement. In accordance with the invention an amplifier arrangement of the type defined in the opening paragraph is 30 characterized in that - the third transistor is of a conductivity type opposite to that of the first transistor and the second transistor and its emitter is coupled to the third terminal by means of a first current source, - a first current path is arranged between the third terminal and an electrode of the third transistor which carries the input signal, which first current path come proses the series arrangement of at least a second current ~Z368~33 PHN.11.324 3 owe source, the emitter-collector path of a fourth transistor of the same conductivity type as the third transistor, and a second semiconductor junction, - the emitter of the fourth transistor is coupled to the base of the second transistor, - a second current path is arranged between the second terminal and the reference point and comprises the series arrangement of a third semiconductor junction, a fourth semiconductor junction and a third current source, 0 - a point between the collector of the fourth transistor and the second semiconductor junction is connected to the third current source by means of a fifth semiconductor junction, and - the base of the fourth transistor is connected to a point between the third semiconductor junction and the fourth semiconductor junction.
With such an amplifier arrangement it is possible to drive the output a voltage equal to the second supply voltage minus the sum of one base-emitter voltage and two saturation 20 voltages, which yields a substantially improved output voltage swing and hence a substantially improved efficiency.
The amplifier arrangement also has the advantage that it can be fully integrated.
In an amplifier arrangement in accordance with 25 the invention, the first transistor and the second transistor are each preferably constituted by a Arlington pair.
The maximum output voltage swing is then one base-emitter voltage lower than in the case of single first and second transistors. In this case the maximum output voltage swing 30 can be increased by one base-emitter voltage by boots trapping. In accordance with a further embodiment the amplifier arrangement may then be characterized in that the first current source and the second current source are connected to the third terminal by means of a first resistor and the first terminal is connected to that end of the first resistor which is not connected to the third terminal by means of a capacitor This embodiment may be characterized ~1.;236~3~9 PHN.11.324 4 16.7.85 in that the first current source and the second current source are constituted by a second resistor and a third resistor, respectively.
An amplifier arrangement in accordance with a further embodiment of the invention may be characterized in that the second semiconductor junction is the emitter-base junction of a sixth transistor arranged as an emitter follower. This preclude the occurrence of distortion as a result of the sudden decrease in input resistance of the arrangement when the second transistor is turned on.
An amplifier arrangement in accordance with the invention is very suitable for use in a push-pull amplifier which comprises two complementary amplifier arrangements in which the emitters of the complementary first transistors are connected to a common first terminal for connection to a common load. This push-pull amplifier may be characterized further in that the third current sources of the two come elementary amplifier arrangements are communed to form one common current source and in that the collectors of the third transistors are coupled to the common first terminal, Embodiments of the invention will now be described in more detail, by way of example, with reference to the accompanying drawings, in which:
Fig. 1 is the basic diagram of an amplifier arrangement in accordance with the invention, Fig. 2 shows a modification of the arrangement of Fig. 1, Fig. 3 shows an extended version of the amplifier arrangement of Fig. 1, Fig. 4 shows a push-pull amplifier in accordance with a first embodiment of the invention, Fig. 5 shows a push-pull amplifier in accordance with a second embodiment of the invention, Fig. 6 shows a push-pull amplifier in accordance with a third embodiment of the invention, and Fig. 7 shows a push-pull amplifier in accordance with a fourth embodiment of the invention.
1;Z 368~
PHN.11.324 5 16.7.85 Fig, 1 shows the basic diagram of an amplifier arrangement in accordance with the invention. The arrangement comprises a first NUN transistor To, whose emitter is con-netted to the output 2 to which a load AL is connected.
By means of a diode Do the collector of the transistor To is connected to a terminal 4 for a first supply voltage V1.
The collector-emitter path of a second NUN transistor To is arranged in series with the collector-emitterpath of the transistor To and the collector of this transistor T
lo is connected to a terminal 10 for a second supply voltage V2 which is higher than the first supply voltage V1.
The base of the transistor To is connected to the emitter of a PUP transistor To, arranged as an emitter follower.
The emitter of this transistor is connected to the terminal 10 for the supply voltage V2 by means of a first current source 5 supplying a current It. The current source 5 comprises a PUP transistor To whose base is at a reference voltage OR. The collector of the transistor To is connected to the terminal 11 which is common to the first supply voltage V1 and the second supply voltage V2. The input signal Vi is applied to the base 6 of the transistor To.
A first current path is arranged between the terminal 10 for the supply voltage V2 and the emoter of the transistor To and comprises the series arrangement of a second current source 7, the emitter-collector path of a PUP transistor To and a diode Do, which current source supplies a current It and comprises a PUP transistor To whose base is at the reference voltage OR. The emitter of the transistor To is connected to the base of the transistor To. A second current path is arranged between the junction point 3 between the transistor To and the transistor To and the common terminal 11 and comprises the series arrangement of a diode Do, a diode Do and a current source 8. The current It carried by this current source is smaller than the current It supplied by the current source 7. The base of the transistor To is connected to the junction point 9 between the diodes Do and Do and its collector is connected to the current source 8 by means of a diode Do, 1~6~3~39 PHN.11.324 6 16.7.85 The arrangement operates as follows. or low input voltages Vi the transistor To receives the current It from the current source 5 directly and the current It from the current source 7 via the collector-emitter path of the transistor To and the diode Do. If the base current of the transistor To is ignored the current It carried by the current source 8 is furnished by the first power supply voltage V1 via the diodes Do, Do and Do. In this situation the diode Do is cut off. The voltage between the base and lo the emitter of the transistor To is substantially O V, because this voltage is equal to the difference between the base-emitter voltage of the transistor To and the voltage across the diode Do. Consequently, the transistor To is cut off, so that for low input voltages the lo collector of the transistor To is connected to the power supply voltage V1 via the diode Do. The input signal Vi is applied to the base of the transistor To via the emitter-follower transistor To. This input signal Vi also appears on the anode of the diode Do. The voltage on the cathode of the diode Do is three diode voltages lower than the supply voltage V1. Therefore, the diode Do is turned on for a specific input voltage Vi. A part of the input voltage Vi then appears on the cathode of the diode Do.
As the input voltage Vi increases further the diode Do will become less conductive, so that the current for the current source 8 through the diode Do decreases and that through the diode Do increases. Above a specific input voltage the diode Do is turned off, so that substantially the entire current It flows through the diode Do. Then only the base current of the transistor To flows through the diode Do. The voltage on the base of the transistor To follows the voltage Vi via the base-emitter junction of the transistor To, the diodes Do, Do and Do and the base-emitter junction of the transistor To. As this input voltage increases further the transistor To is therefore turned on, so that the voltage on the junction point 3 is also increases. At a specific input voltage the diode Do ~36~3~39 PHN.11.3~4 7 16.7.85 is cut off, so that the collector of the transistor To is connected to the high supply voltage V2 via the collector-emitter path of the transistor To. As the input voltage V
increases further the transistor To will be bottomed, so that the voltage on the base of the transistor To cannot increase any further. Subsequently the transistor To is bottomed and the diode Do is cut off. The entire current from the current source 5 then flows into the base of the transistor To, so that there is no current in the transistor To.
The maximum output voltage is then reached.
The voltage V0 on the output 2 is now equal to:
OMAN = V2 - (VCEST4 + VBET2 VCEST1) (1) where VcEsT4 = the collector-emitter voltage of the tray-sister To during saturation, VCEsT1 = the collector-emitter voltage of the tray-sister To during saturation, and VBET2 = the base-emitter voltage of the transistor To.
As the voltage VCEsT4 and VcEsT1 are substantially 100 my, it follows from the above equation that the output 2 can be driven to the value of the second supply voltage V2 minus substantially one base-emitter voltage (I owe V).
As a result of this large output voltage swing the amplifier 25 arrangement has a high efficiency.
Fig. 2 is a modification of the arrangement shown in Fugue, in which identical parts bear the same reference numerals as in Fugue. During the change-over from the first supply voltage V1 to the second supply voltage V2 the 30 voltage between the collector and the base of the transistor To in the arrangement shown in Fig. 1 is equal to one diode voltage, namely the sum of the voltages across the diodes Do, Do, Do and the base-emitter junctions of the transistors To and To. This means that during change-over tote second supply voltage V2 the first transistor To is not yet driven into full conduction. In the embodiment shown in Fugue, the diode Do is replaced by the base-emitter junction of a 688~
PHN.11.324 8 16.7.85 transistor T30, which has its emitter connected to the collector of the transistor To, its base to the base of the transistor To, and its collector to the common terminal 11. During the change-over from the first supply voltage V
to the second supply voltage V2 a voltage of zero volts appears between the collector and the base of the transistor To, so that changing over is effected at the instant at which the transistor To will be saturated. As a result of this, the transistor To is driven over the entire range of lo the first supply voltage V1~ which leads to an increased efficiency. Otherwise, the operation and the output voltage swing of the arrangement are the same as for the arrangement shown in Foggily.
The principle of two supply voltages as explained lo with reference to Fig. 1 and 2 may be extended to an arbitrary number of supply voltages. Fugue shows an amplifier arrangement with three supply voltages, in which Figure identical parts bear the same reference numerals as in Foggily.
A transistor T21 has its collector-emitter path connected 20 in series with the collector-emitter path of the transistor To and has its collector connected to a third supply voltage V3. The collector of the transistor To is now connected to the second supply voltage V2 via a diode D21 and the current source 7 is connected to the third supply voltage V3.
25 The driver circuit for the transistor T21 is of the same type as that for the transistor To. A current source 27 supplying a current I20 is arranged between the third power supply voltage V3 and the base of the transistor T21.
This current source 27 comprises a transistor T24, whose 30 hose is at a reference voltage OR. The base of the transistor T21 is connected to the base of the transistor To by the series arrangement of the emitter-collector path of a transistor T25 and a diode D24. The series arrangement of two diodes D22, D23 and a current source 28 carrying a current I23 is arranged between the junction point 33 between the emitter of the transistor T21 and the collector of the transistor To and the common terminal 11. The base of the transistor T25 is connected to the junction point 29 .8~39 PHN.11 .324 9 16.7.85 between the diode D22 and the diode D23 and the collector of the transistor T25 is connected to the current source 28 by means of a diode D25.
The operation of the circuit arrangement can be explained very simply by means of the principle described with reference to Fugue. For low input voltages Vi the transistor To is coupled to the first supply voltage V1.
The transistors To and T21 and the diodes Do and D25 are cut off. The current I20 from the current source 27 flows 10 to the emitter of the transistor To via the emitter-collector path of the transistor T25 and the diode D24 and further to the emitter of the transistor To via the emitter-collector path of the transistor To and the diode Do.
The current I23 carried by the current source 28 is lo derived from the supply voltage V2 via the diodes D23, D22 and D21. At increasing input voltages Vi the transistor To is driven into conduction and the first supply voltage V
is disconnected as described with reference to Fugue.
At a further increase the transistor To is driven further into conduction. Above a specific input voltage Vi the diode D25 is turned on. As a result of this, the transistor T21 is turned on and the diode D22 is turned off, so that above a specific input voltage the second supply voltageV2 is disconnected and the collector of the transistor To is coupled to the third supply voltage V3. As the input voltage Vi increases further the transistor T24 is bottomed.
The voltage on the base of the transistor T21 then cannot increase any further. If the input voltage Vi increases even further, the diode D24 is cut off, after which the transistor To is bottomed, in which situation the voltage on the base of the transistor To can increase until the transistor To is bottomed. Subsequently, the diode Do is cut off and the transistor To is saturated. As a result of this, there is no current in the transistor To, so that the maximum output voltage is reached. The maximum voltage VOW on the output 2 is then equal to:
VOMAX v3 (VCEST24 + VBET21 + VCEST2 + VCEST1) (2) ~68~3 PHN.11.324 10 16.7.85 where VCEsT24 = the collector-emitter voltage of the transistor T2l~ in the case of saturation.
It is to be noted that in the present embodiment the diode Do may be connected to the collector of the transistor To instead of to the emitter. As a result of this, the change-over from the second supply voltage V2 to the third supply voltage V3 is effected at the instant at which the transistor To is saturated, so that the transistor To is driven to an optimum extent.
The amplifier arrangement in accordance with the invention is very suitable for use in a push-pull amplifier, of which Fig. 4 shows a first embodiment. The push-pull amplifier comprises an input stage, which in the present embodiment has its simplest form and comprises two tray-15 sisters T11 and T12 arranged as a differential pair, whose common emitter terminal is connected to the positive second supply voltage ~V2 by means of a current source comprising a transistor T10 whose base is at a reference voltage OR.
The input signal Vii of the push-pull amplifier is applied button the bases of the transistors T11 and T12.
The collector of the transistor T12 is connected directly to the output of the input stage and the collector of the transistor T11 is connected to the said output by means of a current mirror comprising the transistors T13 and T14, wish output is connected to the input of a Miller stage.
In the present example, this Miller stage comprises a transistor T15, whose emitter is connected to the negative supply voltage -V2. A frequency compensation capacitor C1 is arranged between the collector and the emitter of this transistor T15.The collector of the transistor T15 is con-netted to the positive supply voltage +V2 by the series arrangement of two diodes Do and Do and a current source comprising the transistor Tug, whose base is at a reference voltage OR. The output stage comprises two complementary circuits, which are each substantially identical to the circuit arrangement shown in Fig. 1. Therefore, identical parts bear the same reference numerals as in Fig. 1, the complementary parts being denoted by primes. The arrangement ~3~889 PUN . 1 1 . 324 1 1 1 6 . ,' . 85 differs from that shown in Fig. 1 with respect to the following points The transistor To and the transistor To are arranged as a Arlington pair, a resistor R1 being arranged between the base and the emitter of the transistor 5 To to provide a rapid turn-off of the Arlington pair.
A resistor or a diode may be arranged between the base and the emitter of the transistor To for protection purposes, and in the case of a diode its forward direction should be opposite to that of the base-emitter junction of the tray-lo sister To. Similarly, the transistor To forms a Darlingtonpair with a transistor To. The emitters of the complementary output transistor To and To' are connected to the common output 2, to which the load AL is connected. A resistor R2 arranged between the emitters of the transistors To and To' lo has the same function as the resistor R1. The current source 8 is a current source which is common to the two complement-cry circuits.
The collectors of the transistors To and To are interconnected and are also connected to the output 2.
20 It is to be noted that the collectors of the transistors To and To' may alternatively be connected to the emitter of the transistor To and the emitter of the transistor To, respectively or, if resistors having low resistance values are arranged in the emitter lines of the transistors To and 25 To to the emitter of the transistor To' and the emitter of the transistor To, respectively. The output signal of the Miller stage is applied to the bases of the transistors To and To'. The diodes Do and Do between the bases of the transistors To and To provide a class-AB bias for the 30 output stage. The push-pull principle is known per so and is therefore not explained here. Since the transistor To and the transistor To are arranged as a Arlington pair, the maximum output voltage swing is now equal to:
3 VOMAx = + V2 -(vcEsT4+vBETg+vgET2~vcEsT1) Consequently, the maximum output voltage is one base-emitter voltage lower than for the arrangement in Ego.
The minimum output voltage lies equally far above the P;~368~
PHN.11.324 12 16.7.85 negative supply voltage -V2 as the maximum output voltage lies below the positive supply voltage +V2.
A second example of a push-pull amplifier in accordance with the invention is described with reference to Fugue. For simplicity only the output stage, which is relevant to the invention is shown, and identical parts bear the same reference numerals as in Fugue. The emitters of the transistors To and To are connected to the terminal 10 for the supply voltage +V2 by means of a resistor R3.
A capacitor C2 is arranged between the output 2 and the end 15 of the resistor R3 which is not connected to the terminal 10. By means of the capacitor C2 the output signal is boot-strapped, so that the voltage on the collectors of the transistors To and To can be raised above the supply voltage ~V2 . As far as the operation of the arrangement is concerned this results in the transistor To instead of the transistor To being saturated when the transistors To and To are turned on as a result of an increasing input signal. The collector of the transistor To is now connected to the supply voltage +V2, whilst as a result of boots-trapping the base of the transistor To can be driven beyond this supply voltage. Therefore, the maximum output voltage becomes equal to:
VOMAX V2 (VcEsT8+vBET2+vcEsTl) (4) where VCEsT8 = the collector-emitter voltage of the tray-sister To in the case of saturation.
Bootstrapping results in an increase of the maximum output voltage swing of the arrangement by one base-emitter voltage. It is to be noted that in the present em-bodiment the current-source transistor T10 of the input stage (see Fugue) is connected directly to the positive second supply voltage +V2 and that the emitters of the transistors T13, T14 all T15 are connected directly to the negative supply voltage -V2.
A third embodiment of a push-pull amplifier is described with reference to Fugue, in which identical parts bear the same reference numerals as in Fugue.
1~368139 PHN.11.324 13 16.7.85 In the present embodiment the current-source transistors To and To are replaced by a resistor R4 and a resistor R5, respectively. As a result of bootstrapping the same signal voltage appears on the base of the transistor To and on the cathode of the diode Do as on point 15 Consequently, a constant voltage is obtained across these resistors that the resistors R4 and R5 again operate as current sources.
Fugue shows a push-pull amplifier in accordance with the fourth embodiment of the invention, and identical 10 parts bear the same reference numerals as in Fugue.
This embodiment differs from that shown in Fugue in that the diode Do is replaced by an emitter-follower transistor T16, whose emitter is connected to the collector of the transistor To, whose collector is connected to the negative supply voltage -V2, and whose base is connected to the emitter of the transistor To. When in the embodiment shown in Fugue the transistors To, To are turned on the resistance at the emitter of the transistor To decreases suddenly because the resistance which is seen at the base of the MU transistor To is connected in parallel with the resistance which is seen at the base of the transistor To. This results in a sudden decrease of the input resistance of the arrangement, which leads to distortion of the input signal.
By replacing the diodes Do by a transistor T16, the 25 resistance which is connected in parallel with the input resistance of the transistor To when the transistors To, To are turned on is increased by a factor equal to the current-gain factor of the transistor T16. Thus, when the transit-ions To, To are turned on the decrease in the input nests-30 resistance of the transistor To is substantially smaller, so that the resulting distortion is also reduced sub-staunchly. It is to be noted that the emitter-follower transistor T16 may also be used in the embodiments shown in Fig. 1, 2 and 3.
The invention is not limited to the embodiments shown. Within the scope of the invention many modifications are obvious to those skilled in the art. For example, the 1~3~ 39 PHN.11.324 14 owe diodes in the present embodiments may be replaced by diode-connected transistors. Further, all or some of the bipolar transistors in the arrangement may be replaced by MOW transistors, in which case "emitter", "collector"
and "base" should read: "source", "drain" and "gate", respectively.
Finally, it is to be noted that the embodiments shown in jigs. 4, 5, Rand 7 may also be equipped with the amplifier arrangement shown in ~ig.3.
The invention relates to an amplifier arrangement, comprising:
- a first transistor having an emitter which is coupled to a first terminal for connection to a load which is coupled to a reference point, and having a collector which is coupled by means of a first semiconductor junction to a second terminal for a first supply voltage, - a second transistor having a collector-emitter path which is arranged in series with the collector-emitter path of the first transistor, and having a collector which is coupled to a third terminal for a second supply voltage which is higher than the first supply voltage, and - a third transistor arranged as an emitter-follower and having a base for receiving an input signal and having an emitter which is coupled to the base of the first transistor.
The invention also relates to a push-pull amplifier equipped with such an amplifier arrangement.
Such an amplifier arrangement of the class-G
type may be employed as a power amplifier for audio signals.
A class-G amplifier is to be understood to mean an amplifier in which the effective supply voltage increases in a number of steps depending on the input signal. This results in an 25 amplifier having a high efficiency.
Such an amplifier arrangement is disclosed in United States Patent Specification 3,961,280. In this known arrangement the input signal is applied to the bases of the first transistor and the second transistor via a third transistor arranged as an emitter follower. For low input voltages the second transistor is cut off, so that the first transistor is connected to the first supply voltage.
~68~3 PHN.11.324 2 16.7.85 If the input voltage becomes higher than the first supply voltage, the second transistor is turned on, so that the first supply voltage is disconnected and the first transistor is connected to the second supply voltage.
When the second transistor does not conduct, the voltage across the base-emitter junction of this transistor is at the most equal to substantially the full first supply voltage. In order to preclude breakdown of the base-emitter junction as the result of this voltage, a diode misarranged 10 in the base line of the second transistor. In order to prevent the first transistor from being bottomed and there-by producing distortion when the second transistor is not yet fully conductive, two series-connected diodes are arranged in the base line of the first transistor.
However, a drawback of these diodes is that they limit the swing of the output signal and, consequently, the efficiency of the amplifier arrangement. For the maximum output the voltage on the base of the third transistor is substantially equal to the second supply voltage. The voltage 20 on the output is then equal to the second supply voltage minus the sum of the base-emitter voltage of the first transistor and the third transistor and the diode voltage across the two diodes arranged in the base line of the first transistor.
It is the object of the invention to provide a class-G-type amplifier arrangement which has an improved output-voltage swing in comparison with the known arrangement. In accordance with the invention an amplifier arrangement of the type defined in the opening paragraph is 30 characterized in that - the third transistor is of a conductivity type opposite to that of the first transistor and the second transistor and its emitter is coupled to the third terminal by means of a first current source, - a first current path is arranged between the third terminal and an electrode of the third transistor which carries the input signal, which first current path come proses the series arrangement of at least a second current ~Z368~33 PHN.11.324 3 owe source, the emitter-collector path of a fourth transistor of the same conductivity type as the third transistor, and a second semiconductor junction, - the emitter of the fourth transistor is coupled to the base of the second transistor, - a second current path is arranged between the second terminal and the reference point and comprises the series arrangement of a third semiconductor junction, a fourth semiconductor junction and a third current source, 0 - a point between the collector of the fourth transistor and the second semiconductor junction is connected to the third current source by means of a fifth semiconductor junction, and - the base of the fourth transistor is connected to a point between the third semiconductor junction and the fourth semiconductor junction.
With such an amplifier arrangement it is possible to drive the output a voltage equal to the second supply voltage minus the sum of one base-emitter voltage and two saturation 20 voltages, which yields a substantially improved output voltage swing and hence a substantially improved efficiency.
The amplifier arrangement also has the advantage that it can be fully integrated.
In an amplifier arrangement in accordance with 25 the invention, the first transistor and the second transistor are each preferably constituted by a Arlington pair.
The maximum output voltage swing is then one base-emitter voltage lower than in the case of single first and second transistors. In this case the maximum output voltage swing 30 can be increased by one base-emitter voltage by boots trapping. In accordance with a further embodiment the amplifier arrangement may then be characterized in that the first current source and the second current source are connected to the third terminal by means of a first resistor and the first terminal is connected to that end of the first resistor which is not connected to the third terminal by means of a capacitor This embodiment may be characterized ~1.;236~3~9 PHN.11.324 4 16.7.85 in that the first current source and the second current source are constituted by a second resistor and a third resistor, respectively.
An amplifier arrangement in accordance with a further embodiment of the invention may be characterized in that the second semiconductor junction is the emitter-base junction of a sixth transistor arranged as an emitter follower. This preclude the occurrence of distortion as a result of the sudden decrease in input resistance of the arrangement when the second transistor is turned on.
An amplifier arrangement in accordance with the invention is very suitable for use in a push-pull amplifier which comprises two complementary amplifier arrangements in which the emitters of the complementary first transistors are connected to a common first terminal for connection to a common load. This push-pull amplifier may be characterized further in that the third current sources of the two come elementary amplifier arrangements are communed to form one common current source and in that the collectors of the third transistors are coupled to the common first terminal, Embodiments of the invention will now be described in more detail, by way of example, with reference to the accompanying drawings, in which:
Fig. 1 is the basic diagram of an amplifier arrangement in accordance with the invention, Fig. 2 shows a modification of the arrangement of Fig. 1, Fig. 3 shows an extended version of the amplifier arrangement of Fig. 1, Fig. 4 shows a push-pull amplifier in accordance with a first embodiment of the invention, Fig. 5 shows a push-pull amplifier in accordance with a second embodiment of the invention, Fig. 6 shows a push-pull amplifier in accordance with a third embodiment of the invention, and Fig. 7 shows a push-pull amplifier in accordance with a fourth embodiment of the invention.
1;Z 368~
PHN.11.324 5 16.7.85 Fig, 1 shows the basic diagram of an amplifier arrangement in accordance with the invention. The arrangement comprises a first NUN transistor To, whose emitter is con-netted to the output 2 to which a load AL is connected.
By means of a diode Do the collector of the transistor To is connected to a terminal 4 for a first supply voltage V1.
The collector-emitter path of a second NUN transistor To is arranged in series with the collector-emitterpath of the transistor To and the collector of this transistor T
lo is connected to a terminal 10 for a second supply voltage V2 which is higher than the first supply voltage V1.
The base of the transistor To is connected to the emitter of a PUP transistor To, arranged as an emitter follower.
The emitter of this transistor is connected to the terminal 10 for the supply voltage V2 by means of a first current source 5 supplying a current It. The current source 5 comprises a PUP transistor To whose base is at a reference voltage OR. The collector of the transistor To is connected to the terminal 11 which is common to the first supply voltage V1 and the second supply voltage V2. The input signal Vi is applied to the base 6 of the transistor To.
A first current path is arranged between the terminal 10 for the supply voltage V2 and the emoter of the transistor To and comprises the series arrangement of a second current source 7, the emitter-collector path of a PUP transistor To and a diode Do, which current source supplies a current It and comprises a PUP transistor To whose base is at the reference voltage OR. The emitter of the transistor To is connected to the base of the transistor To. A second current path is arranged between the junction point 3 between the transistor To and the transistor To and the common terminal 11 and comprises the series arrangement of a diode Do, a diode Do and a current source 8. The current It carried by this current source is smaller than the current It supplied by the current source 7. The base of the transistor To is connected to the junction point 9 between the diodes Do and Do and its collector is connected to the current source 8 by means of a diode Do, 1~6~3~39 PHN.11.324 6 16.7.85 The arrangement operates as follows. or low input voltages Vi the transistor To receives the current It from the current source 5 directly and the current It from the current source 7 via the collector-emitter path of the transistor To and the diode Do. If the base current of the transistor To is ignored the current It carried by the current source 8 is furnished by the first power supply voltage V1 via the diodes Do, Do and Do. In this situation the diode Do is cut off. The voltage between the base and lo the emitter of the transistor To is substantially O V, because this voltage is equal to the difference between the base-emitter voltage of the transistor To and the voltage across the diode Do. Consequently, the transistor To is cut off, so that for low input voltages the lo collector of the transistor To is connected to the power supply voltage V1 via the diode Do. The input signal Vi is applied to the base of the transistor To via the emitter-follower transistor To. This input signal Vi also appears on the anode of the diode Do. The voltage on the cathode of the diode Do is three diode voltages lower than the supply voltage V1. Therefore, the diode Do is turned on for a specific input voltage Vi. A part of the input voltage Vi then appears on the cathode of the diode Do.
As the input voltage Vi increases further the diode Do will become less conductive, so that the current for the current source 8 through the diode Do decreases and that through the diode Do increases. Above a specific input voltage the diode Do is turned off, so that substantially the entire current It flows through the diode Do. Then only the base current of the transistor To flows through the diode Do. The voltage on the base of the transistor To follows the voltage Vi via the base-emitter junction of the transistor To, the diodes Do, Do and Do and the base-emitter junction of the transistor To. As this input voltage increases further the transistor To is therefore turned on, so that the voltage on the junction point 3 is also increases. At a specific input voltage the diode Do ~36~3~39 PHN.11.3~4 7 16.7.85 is cut off, so that the collector of the transistor To is connected to the high supply voltage V2 via the collector-emitter path of the transistor To. As the input voltage V
increases further the transistor To will be bottomed, so that the voltage on the base of the transistor To cannot increase any further. Subsequently the transistor To is bottomed and the diode Do is cut off. The entire current from the current source 5 then flows into the base of the transistor To, so that there is no current in the transistor To.
The maximum output voltage is then reached.
The voltage V0 on the output 2 is now equal to:
OMAN = V2 - (VCEST4 + VBET2 VCEST1) (1) where VcEsT4 = the collector-emitter voltage of the tray-sister To during saturation, VCEsT1 = the collector-emitter voltage of the tray-sister To during saturation, and VBET2 = the base-emitter voltage of the transistor To.
As the voltage VCEsT4 and VcEsT1 are substantially 100 my, it follows from the above equation that the output 2 can be driven to the value of the second supply voltage V2 minus substantially one base-emitter voltage (I owe V).
As a result of this large output voltage swing the amplifier 25 arrangement has a high efficiency.
Fig. 2 is a modification of the arrangement shown in Fugue, in which identical parts bear the same reference numerals as in Fugue. During the change-over from the first supply voltage V1 to the second supply voltage V2 the 30 voltage between the collector and the base of the transistor To in the arrangement shown in Fig. 1 is equal to one diode voltage, namely the sum of the voltages across the diodes Do, Do, Do and the base-emitter junctions of the transistors To and To. This means that during change-over tote second supply voltage V2 the first transistor To is not yet driven into full conduction. In the embodiment shown in Fugue, the diode Do is replaced by the base-emitter junction of a 688~
PHN.11.324 8 16.7.85 transistor T30, which has its emitter connected to the collector of the transistor To, its base to the base of the transistor To, and its collector to the common terminal 11. During the change-over from the first supply voltage V
to the second supply voltage V2 a voltage of zero volts appears between the collector and the base of the transistor To, so that changing over is effected at the instant at which the transistor To will be saturated. As a result of this, the transistor To is driven over the entire range of lo the first supply voltage V1~ which leads to an increased efficiency. Otherwise, the operation and the output voltage swing of the arrangement are the same as for the arrangement shown in Foggily.
The principle of two supply voltages as explained lo with reference to Fig. 1 and 2 may be extended to an arbitrary number of supply voltages. Fugue shows an amplifier arrangement with three supply voltages, in which Figure identical parts bear the same reference numerals as in Foggily.
A transistor T21 has its collector-emitter path connected 20 in series with the collector-emitter path of the transistor To and has its collector connected to a third supply voltage V3. The collector of the transistor To is now connected to the second supply voltage V2 via a diode D21 and the current source 7 is connected to the third supply voltage V3.
25 The driver circuit for the transistor T21 is of the same type as that for the transistor To. A current source 27 supplying a current I20 is arranged between the third power supply voltage V3 and the base of the transistor T21.
This current source 27 comprises a transistor T24, whose 30 hose is at a reference voltage OR. The base of the transistor T21 is connected to the base of the transistor To by the series arrangement of the emitter-collector path of a transistor T25 and a diode D24. The series arrangement of two diodes D22, D23 and a current source 28 carrying a current I23 is arranged between the junction point 33 between the emitter of the transistor T21 and the collector of the transistor To and the common terminal 11. The base of the transistor T25 is connected to the junction point 29 .8~39 PHN.11 .324 9 16.7.85 between the diode D22 and the diode D23 and the collector of the transistor T25 is connected to the current source 28 by means of a diode D25.
The operation of the circuit arrangement can be explained very simply by means of the principle described with reference to Fugue. For low input voltages Vi the transistor To is coupled to the first supply voltage V1.
The transistors To and T21 and the diodes Do and D25 are cut off. The current I20 from the current source 27 flows 10 to the emitter of the transistor To via the emitter-collector path of the transistor T25 and the diode D24 and further to the emitter of the transistor To via the emitter-collector path of the transistor To and the diode Do.
The current I23 carried by the current source 28 is lo derived from the supply voltage V2 via the diodes D23, D22 and D21. At increasing input voltages Vi the transistor To is driven into conduction and the first supply voltage V
is disconnected as described with reference to Fugue.
At a further increase the transistor To is driven further into conduction. Above a specific input voltage Vi the diode D25 is turned on. As a result of this, the transistor T21 is turned on and the diode D22 is turned off, so that above a specific input voltage the second supply voltageV2 is disconnected and the collector of the transistor To is coupled to the third supply voltage V3. As the input voltage Vi increases further the transistor T24 is bottomed.
The voltage on the base of the transistor T21 then cannot increase any further. If the input voltage Vi increases even further, the diode D24 is cut off, after which the transistor To is bottomed, in which situation the voltage on the base of the transistor To can increase until the transistor To is bottomed. Subsequently, the diode Do is cut off and the transistor To is saturated. As a result of this, there is no current in the transistor To, so that the maximum output voltage is reached. The maximum voltage VOW on the output 2 is then equal to:
VOMAX v3 (VCEST24 + VBET21 + VCEST2 + VCEST1) (2) ~68~3 PHN.11.324 10 16.7.85 where VCEsT24 = the collector-emitter voltage of the transistor T2l~ in the case of saturation.
It is to be noted that in the present embodiment the diode Do may be connected to the collector of the transistor To instead of to the emitter. As a result of this, the change-over from the second supply voltage V2 to the third supply voltage V3 is effected at the instant at which the transistor To is saturated, so that the transistor To is driven to an optimum extent.
The amplifier arrangement in accordance with the invention is very suitable for use in a push-pull amplifier, of which Fig. 4 shows a first embodiment. The push-pull amplifier comprises an input stage, which in the present embodiment has its simplest form and comprises two tray-15 sisters T11 and T12 arranged as a differential pair, whose common emitter terminal is connected to the positive second supply voltage ~V2 by means of a current source comprising a transistor T10 whose base is at a reference voltage OR.
The input signal Vii of the push-pull amplifier is applied button the bases of the transistors T11 and T12.
The collector of the transistor T12 is connected directly to the output of the input stage and the collector of the transistor T11 is connected to the said output by means of a current mirror comprising the transistors T13 and T14, wish output is connected to the input of a Miller stage.
In the present example, this Miller stage comprises a transistor T15, whose emitter is connected to the negative supply voltage -V2. A frequency compensation capacitor C1 is arranged between the collector and the emitter of this transistor T15.The collector of the transistor T15 is con-netted to the positive supply voltage +V2 by the series arrangement of two diodes Do and Do and a current source comprising the transistor Tug, whose base is at a reference voltage OR. The output stage comprises two complementary circuits, which are each substantially identical to the circuit arrangement shown in Fig. 1. Therefore, identical parts bear the same reference numerals as in Fig. 1, the complementary parts being denoted by primes. The arrangement ~3~889 PUN . 1 1 . 324 1 1 1 6 . ,' . 85 differs from that shown in Fig. 1 with respect to the following points The transistor To and the transistor To are arranged as a Arlington pair, a resistor R1 being arranged between the base and the emitter of the transistor 5 To to provide a rapid turn-off of the Arlington pair.
A resistor or a diode may be arranged between the base and the emitter of the transistor To for protection purposes, and in the case of a diode its forward direction should be opposite to that of the base-emitter junction of the tray-lo sister To. Similarly, the transistor To forms a Darlingtonpair with a transistor To. The emitters of the complementary output transistor To and To' are connected to the common output 2, to which the load AL is connected. A resistor R2 arranged between the emitters of the transistors To and To' lo has the same function as the resistor R1. The current source 8 is a current source which is common to the two complement-cry circuits.
The collectors of the transistors To and To are interconnected and are also connected to the output 2.
20 It is to be noted that the collectors of the transistors To and To' may alternatively be connected to the emitter of the transistor To and the emitter of the transistor To, respectively or, if resistors having low resistance values are arranged in the emitter lines of the transistors To and 25 To to the emitter of the transistor To' and the emitter of the transistor To, respectively. The output signal of the Miller stage is applied to the bases of the transistors To and To'. The diodes Do and Do between the bases of the transistors To and To provide a class-AB bias for the 30 output stage. The push-pull principle is known per so and is therefore not explained here. Since the transistor To and the transistor To are arranged as a Arlington pair, the maximum output voltage swing is now equal to:
3 VOMAx = + V2 -(vcEsT4+vBETg+vgET2~vcEsT1) Consequently, the maximum output voltage is one base-emitter voltage lower than for the arrangement in Ego.
The minimum output voltage lies equally far above the P;~368~
PHN.11.324 12 16.7.85 negative supply voltage -V2 as the maximum output voltage lies below the positive supply voltage +V2.
A second example of a push-pull amplifier in accordance with the invention is described with reference to Fugue. For simplicity only the output stage, which is relevant to the invention is shown, and identical parts bear the same reference numerals as in Fugue. The emitters of the transistors To and To are connected to the terminal 10 for the supply voltage +V2 by means of a resistor R3.
A capacitor C2 is arranged between the output 2 and the end 15 of the resistor R3 which is not connected to the terminal 10. By means of the capacitor C2 the output signal is boot-strapped, so that the voltage on the collectors of the transistors To and To can be raised above the supply voltage ~V2 . As far as the operation of the arrangement is concerned this results in the transistor To instead of the transistor To being saturated when the transistors To and To are turned on as a result of an increasing input signal. The collector of the transistor To is now connected to the supply voltage +V2, whilst as a result of boots-trapping the base of the transistor To can be driven beyond this supply voltage. Therefore, the maximum output voltage becomes equal to:
VOMAX V2 (VcEsT8+vBET2+vcEsTl) (4) where VCEsT8 = the collector-emitter voltage of the tray-sister To in the case of saturation.
Bootstrapping results in an increase of the maximum output voltage swing of the arrangement by one base-emitter voltage. It is to be noted that in the present em-bodiment the current-source transistor T10 of the input stage (see Fugue) is connected directly to the positive second supply voltage +V2 and that the emitters of the transistors T13, T14 all T15 are connected directly to the negative supply voltage -V2.
A third embodiment of a push-pull amplifier is described with reference to Fugue, in which identical parts bear the same reference numerals as in Fugue.
1~368139 PHN.11.324 13 16.7.85 In the present embodiment the current-source transistors To and To are replaced by a resistor R4 and a resistor R5, respectively. As a result of bootstrapping the same signal voltage appears on the base of the transistor To and on the cathode of the diode Do as on point 15 Consequently, a constant voltage is obtained across these resistors that the resistors R4 and R5 again operate as current sources.
Fugue shows a push-pull amplifier in accordance with the fourth embodiment of the invention, and identical 10 parts bear the same reference numerals as in Fugue.
This embodiment differs from that shown in Fugue in that the diode Do is replaced by an emitter-follower transistor T16, whose emitter is connected to the collector of the transistor To, whose collector is connected to the negative supply voltage -V2, and whose base is connected to the emitter of the transistor To. When in the embodiment shown in Fugue the transistors To, To are turned on the resistance at the emitter of the transistor To decreases suddenly because the resistance which is seen at the base of the MU transistor To is connected in parallel with the resistance which is seen at the base of the transistor To. This results in a sudden decrease of the input resistance of the arrangement, which leads to distortion of the input signal.
By replacing the diodes Do by a transistor T16, the 25 resistance which is connected in parallel with the input resistance of the transistor To when the transistors To, To are turned on is increased by a factor equal to the current-gain factor of the transistor T16. Thus, when the transit-ions To, To are turned on the decrease in the input nests-30 resistance of the transistor To is substantially smaller, so that the resulting distortion is also reduced sub-staunchly. It is to be noted that the emitter-follower transistor T16 may also be used in the embodiments shown in Fig. 1, 2 and 3.
The invention is not limited to the embodiments shown. Within the scope of the invention many modifications are obvious to those skilled in the art. For example, the 1~3~ 39 PHN.11.324 14 owe diodes in the present embodiments may be replaced by diode-connected transistors. Further, all or some of the bipolar transistors in the arrangement may be replaced by MOW transistors, in which case "emitter", "collector"
and "base" should read: "source", "drain" and "gate", respectively.
Finally, it is to be noted that the embodiments shown in jigs. 4, 5, Rand 7 may also be equipped with the amplifier arrangement shown in ~ig.3.
Claims (11)
- THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
An amplifier arrangement, comprising:
- a first transistor having an emitter which is coupled to a first terminal for connection to a load which is coupled to a reference point, and having a collector which is coupled by means of a first semiconductor junction to a second terminal for a first supply voltage - a second transistor having a collector-emitter path which is arranged in series with the collector-emitter path of the first transistor, and having a collector which is coupled to a third terminal for a second supply voltage which is higher than the first supply voltage, and - a third transistor arranged as an emitter-follower and having a base for receiving an input signal and having an emitter which is coupled to the base of the first transistor, characterized in that - the third transistor is of a conductivity type opposite to that of the first transistor and the second transistor and its emitter is coupled to the third -terminal by means of a first current source, - a first current path is arranged between the third terminal and an electrode of the third transistor which carries the input signal, which first current path comprises the series arrangement of at least a second current source, the emitter-collector path of a fourth transistor of the same conductivity type as the third transistor, and a second semiconductor junction, - the emitter of the fourth transistor is coupled to the base of the second transistor, - a second current path is arranged between the second terminal and the reference point and comprises the series arrangement of a third semiconductor junction, a fourth semi-conductor junction and a third current source, - a point between the collector of the fourth transistor and the second semiconductor junction is connected to the third current source by means of a fifth semiconductor junction, and - the base of the fourth transistor is connected to a point be-tween the third semiconductor junction and the fourth semicon-ductor junction. - 2. An amplifier arrangement as claimed in Claim 1, char-acterized in that the second semiconductor junction is coupled to the emitter of the third transistor.
- 3. An amplifier arrangement as claimed in Claim 1, charac-terized in that the second semiconductor junction is the base-emitter junction of a fifth transistor of the same conductivity type as the third transistor, whose base is connected to the base of the third transistor and whose emitter is coupled to the col-lector of the fourth transistor.
- 4. An amplifier arrangement as claimed in Claim 1 or 2, characterized in that the first transistor and the second tran-sistor are each constituted by a Darlington pair.
- 5. An amplifier arrangement as claimed in Claim 1, charac-terized in that the first current source and the second current source are connected to the third terminal by means of a first resistor and the first terminal is connected, by means of a capa-citor, to that end of the first resistor which is not connected to the third terminal.
- 6. An amplifier arrangement as claimed in Claim 5, charac-terized in that the first current source and the second current source are constituted by a second resistor and a third resistor, respectively.
- 7. An amplifier arrangement as claimed in Claim 1, 2 or 3, characterized in that the second semiconductor junction is the emitter-base junction of a further transistor arranged as an emit-ter follower.
- 8. A push-pull amplifier, characterized in that it com-prises two complementary amplifier arrangements as claimed in Claim 1, in which the emitters of the complementary first tran-sistors are connected to a common first terminal for connection to a common load.
- 9. A push-pull amplifier as claimed in Claim 8, charac-terized in that the third current sources of the two complementary amplifier arrangements are commoned to form one common current source.
- 10. A push-pull amplifier as claimed in Claim 8 or 9, char-acterized in that the collectors of the third transistors are coupled to the common first terminal.
- 11. A modification of a circuit as claimed in Claim 1, 2 or 3 wherein one or more of the bipolar transistors are replaced by field effect transistors.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL8500768 | 1985-03-18 | ||
| NL8500768A NL8500768A (en) | 1985-03-18 | 1985-03-18 | AMPLIFIER CIRCUIT. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1236889A true CA1236889A (en) | 1988-05-17 |
Family
ID=19845694
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000504110A Expired CA1236889A (en) | 1985-03-18 | 1986-03-14 | Amplifier arrangement |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US4706039A (en) |
| EP (1) | EP0196131B1 (en) |
| JP (1) | JPS61214605A (en) |
| KR (1) | KR950000161B1 (en) |
| CA (1) | CA1236889A (en) |
| DE (1) | DE3671685D1 (en) |
| HK (1) | HK89191A (en) |
| NL (1) | NL8500768A (en) |
| SG (1) | SG59791G (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0630103B1 (en) * | 1993-06-17 | 2000-09-27 | Sony Corporation | Emitterfollower circuit and analog to digital converter using such circuit |
| US5387876A (en) * | 1993-12-20 | 1995-02-07 | Peavey Electronics Corporation | High efficiency amplifier with reduced switching distortion |
| JP3191606B2 (en) * | 1995-02-28 | 2001-07-23 | 安藤電気株式会社 | Binary output circuit |
| KR19990087054A (en) * | 1996-12-20 | 1999-12-15 | 요트.게.아. 롤페즈 | Amplifier with Improved Output Voltage Swing |
| US7339997B2 (en) * | 2001-03-09 | 2008-03-04 | Agere Systems Inc. | Line driver and method of operating the same |
| WO2002095934A1 (en) * | 2001-05-22 | 2002-11-28 | Elantec Semiconductor, Inc. | A compensation method in a class-g amplifier output stage |
| JP4820544B2 (en) * | 2004-10-27 | 2011-11-24 | 株式会社エヌエフ回路設計ブロック | Linear operation power amplifier circuit and power amplifier |
| US20080265822A1 (en) * | 2007-04-25 | 2008-10-30 | Acutechnology Semiconductor Inc. | Class G motor drive |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5045549A (en) * | 1973-08-25 | 1975-04-23 | ||
| US4001707A (en) * | 1974-01-11 | 1977-01-04 | Hitachi, Ltd. | Amplifier circuit |
| JPS52112261A (en) * | 1976-03-18 | 1977-09-20 | Nippon Gakki Seizo Kk | Power amplifier circuit |
| JPS58111507A (en) * | 1981-12-25 | 1983-07-02 | Nippon Gakki Seizo Kk | Power amplifier |
-
1985
- 1985-03-18 NL NL8500768A patent/NL8500768A/en not_active Application Discontinuation
-
1986
- 1986-03-11 US US06/838,729 patent/US4706039A/en not_active Expired - Fee Related
- 1986-03-12 EP EP86200396A patent/EP0196131B1/en not_active Expired - Lifetime
- 1986-03-12 DE DE8686200396T patent/DE3671685D1/en not_active Expired - Lifetime
- 1986-03-14 CA CA000504110A patent/CA1236889A/en not_active Expired
- 1986-03-15 KR KR1019860001904A patent/KR950000161B1/en not_active IP Right Cessation
- 1986-03-15 JP JP61056106A patent/JPS61214605A/en active Granted
-
1991
- 1991-07-25 SG SG597/91A patent/SG59791G/en unknown
- 1991-11-07 HK HK891/91A patent/HK89191A/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| NL8500768A (en) | 1986-10-16 |
| JPH0580162B2 (en) | 1993-11-08 |
| JPS61214605A (en) | 1986-09-24 |
| EP0196131A1 (en) | 1986-10-01 |
| KR860007776A (en) | 1986-10-17 |
| EP0196131B1 (en) | 1990-05-30 |
| US4706039A (en) | 1987-11-10 |
| SG59791G (en) | 1991-08-23 |
| KR950000161B1 (en) | 1995-01-10 |
| HK89191A (en) | 1991-11-15 |
| DE3671685D1 (en) | 1990-07-05 |
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| MKEX | Expiry |