CA1230671A - Reduced-noise ccd camera with single-sampled output - Google Patents
Reduced-noise ccd camera with single-sampled outputInfo
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- CA1230671A CA1230671A CA000518441A CA518441A CA1230671A CA 1230671 A CA1230671 A CA 1230671A CA 000518441 A CA000518441 A CA 000518441A CA 518441 A CA518441 A CA 518441A CA 1230671 A CA1230671 A CA 1230671A
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Abstract
Abstract of the Disclosure The output signal from the CCD output register of a semiconductor image having a floating gate or floating-diffusion type of output stage is applied to a differentiator circuit. The response of the differentiator circuit to the introduction of charge under the gloating element is synchronously detected at output register clock rate to obtain video samples with low reset noise. This is a single sampling process, which avoids the double sampling required in a known, correlated double sampling process to reduce reset noise, and which can provide for horizontal peaking.
Description
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1- RCA 79,994/80,596 Diva This appllcati~n is a division of Canadian Application No. 460,881, filed 8 August 1984.
The present invention relates to reducing noise accompanying the image response of a COD camera, while avoiding double sampling.
BACKGROU~ OF THE INVENTION
In this text, description of a charge transfer device uses -the following convention: a semiconductor substrate surface, on which gate electrodes of the device are disposed, is described as the devices "top" surface, even -though the gate electrodes actually may be differently oriented with respect to the substrate surface. Additionally, words, such as "under" and "over", are used in the text in accordance with this convention.
Typically, a floating diffusion output stage of a COD incorporates a metal-insulator-semiconductor field effect transistor (MISFIT) having a gate electrode connected to the floating diffusion. The transistor is operated in common-drain (or cor~mon-source) conficJuration as-an electrometer, in order to measure the potential on the floating diffusion. This potential is indicative of charge in a potential well "under" the floating diffusion.
The potential measurements takes place during respective signal-sampling intervals, which are interspersed by reset intervals.
During such a reset interval, the floating diffusion is clamped by MISFIT action to a reference potential at a reset drain. More particularly, the floating diffusion is a virtual source in this MISFIT, action, and -the MISFIT action occurs in response to potential applied to a reset gate electrode, which is disposed between the floating diffusion and thy resew drain. It is accepted practice to interpose an additional gate electrode Boone the floating diffusion and the reset electrode and to apply direct potential to this additional crate electrode, in order to prevent potential aye
1- RCA 79,994/80,596 Diva This appllcati~n is a division of Canadian Application No. 460,881, filed 8 August 1984.
The present invention relates to reducing noise accompanying the image response of a COD camera, while avoiding double sampling.
BACKGROU~ OF THE INVENTION
In this text, description of a charge transfer device uses -the following convention: a semiconductor substrate surface, on which gate electrodes of the device are disposed, is described as the devices "top" surface, even -though the gate electrodes actually may be differently oriented with respect to the substrate surface. Additionally, words, such as "under" and "over", are used in the text in accordance with this convention.
Typically, a floating diffusion output stage of a COD incorporates a metal-insulator-semiconductor field effect transistor (MISFIT) having a gate electrode connected to the floating diffusion. The transistor is operated in common-drain (or cor~mon-source) conficJuration as-an electrometer, in order to measure the potential on the floating diffusion. This potential is indicative of charge in a potential well "under" the floating diffusion.
The potential measurements takes place during respective signal-sampling intervals, which are interspersed by reset intervals.
During such a reset interval, the floating diffusion is clamped by MISFIT action to a reference potential at a reset drain. More particularly, the floating diffusion is a virtual source in this MISFIT, action, and -the MISFIT action occurs in response to potential applied to a reset gate electrode, which is disposed between the floating diffusion and thy resew drain. It is accepted practice to interpose an additional gate electrode Boone the floating diffusion and the reset electrode and to apply direct potential to this additional crate electrode, in order to prevent potential aye
-2- RCA 79,994/80,596 responses to the reset pulses from being induced on -the floating diffusion.
The resetting process of periodically clamping the floating diffusion to the potential at the reset drain S is undesirably accompanied by a type of noise called "reset" noise. Reset noise arises as variations in the potential left upon the floating diffusion from one reset interval to another. Reset noise is a problem in charge transfer devices having floating gate output stages, as well as ones with floating-diffusion output stages. Reset noise is the predominant noise in the upper-video frequencies of the output signals of charge transfer devices such as COD images. Reset noise typically is about 8 dub larger than noise in the MISFIT electrometer stage following the floating diffusion. At lower video frequencies, flicker (or of noise predominates.
Flicker noise arises in the MISFIT electrometer stage.
It is known to supply the image output signals to a sample-and-hold circuit. Such a circuit samples during the sample intervals in the image output signal and then holds the samples through the intervals between samples. The response of the sample and hold circuit has increased base band (or first harmonic spectral) content and decreased higher harmonic spectral content, as compared to the image output signal it receives. The duty factors of the image output signal and of noise admixed during subsequent amplification processes are made alike through sampling and holding. Consequently, signal-to-noise does not suffer as greatly during such amplification. This procedure is denominated "single sampling" in this disclosure.
The desire to reduce both flicker and reset noise has lid to the practice of correlated double sampling. In this procedure, in each clocking cycle of the COD image output register, the signal on the floating diffusion is sampled a first time when charge dependent upon reset noise, but not upon signal, is present in the potential well induced "under" the floating diffusion.
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The resetting process of periodically clamping the floating diffusion to the potential at the reset drain S is undesirably accompanied by a type of noise called "reset" noise. Reset noise arises as variations in the potential left upon the floating diffusion from one reset interval to another. Reset noise is a problem in charge transfer devices having floating gate output stages, as well as ones with floating-diffusion output stages. Reset noise is the predominant noise in the upper-video frequencies of the output signals of charge transfer devices such as COD images. Reset noise typically is about 8 dub larger than noise in the MISFIT electrometer stage following the floating diffusion. At lower video frequencies, flicker (or of noise predominates.
Flicker noise arises in the MISFIT electrometer stage.
It is known to supply the image output signals to a sample-and-hold circuit. Such a circuit samples during the sample intervals in the image output signal and then holds the samples through the intervals between samples. The response of the sample and hold circuit has increased base band (or first harmonic spectral) content and decreased higher harmonic spectral content, as compared to the image output signal it receives. The duty factors of the image output signal and of noise admixed during subsequent amplification processes are made alike through sampling and holding. Consequently, signal-to-noise does not suffer as greatly during such amplification. This procedure is denominated "single sampling" in this disclosure.
The desire to reduce both flicker and reset noise has lid to the practice of correlated double sampling. In this procedure, in each clocking cycle of the COD image output register, the signal on the floating diffusion is sampled a first time when charge dependent upon reset noise, but not upon signal, is present in the potential well induced "under" the floating diffusion.
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-3- RCA 79, 994/80, 596 The signal is then sampled a second time when charge dependent upon both that reset noise and signal is present on the floating diffusion. Each pair of samples is then differentially combined to generate samples dependerlt substantially only on signal, with reset noise being suppressed.
Correlated double sampling becomes less practical as the sampling rate of the charge transfer device output stage increases. Pulse widths become narrower, and pulse spacing is lessened towards the limit imposed by the time needed for charge equilibration under the floating-diffusion or floating-gate output. As output register clock rate rises to more than a few megahertz, the correlated double sampling technique becomes difficult to employ. The inventor has observed that although with correlated double sampling 20db noise reduction is obtainable at 100 kHz clock rate in an image system, at a clock rate of 1 My more than three to six dub noise reduction is obtained only with difficulty.
LEN. Davy in his United States Patent No.
Correlated double sampling becomes less practical as the sampling rate of the charge transfer device output stage increases. Pulse widths become narrower, and pulse spacing is lessened towards the limit imposed by the time needed for charge equilibration under the floating-diffusion or floating-gate output. As output register clock rate rises to more than a few megahertz, the correlated double sampling technique becomes difficult to employ. The inventor has observed that although with correlated double sampling 20db noise reduction is obtainable at 100 kHz clock rate in an image system, at a clock rate of 1 My more than three to six dub noise reduction is obtained only with difficulty.
LEN. Davy in his United States Patent No.
4,330,753 issued 18 May 1982 and entitled "METHOD AND
APPARATUS FOR RECOVERING SIGNAL FROM A CHARGE TRANSFER
DEVICE" describes a method for obtaining information signals, which he characterizes as relatively noise free from the output stage of a charge transfer device. In the method Davy describes, the output signal from the regularly-sampling electrometer stage is passed through a band pass filter to separate double sideband amplitude-modulation sidebands flanking a harmonic of the clocking frequency of the electrometer stage. The separate sidebands are then synchronously detected, using a switching demodulator operated at the harmonic of that clocking frequency. The base band spectrum of the synchronously detected AM sidebands is separated from the associated harmonic spectra. This base band spectrum is used as the output signal from the charge transfer device, rather than the base band spectral of -the image output ~23~
-4- RCA 79,994/80,596 signal, which is suppressed by the band-pass filtering before synchronous detection.
The method Davy describes is effective in suppressing the flicker noise in the electrometer stage, which noise resides principally in the base band.
Reset noise is ignored by Davy; but, as noted above, reset noise is a primary source of noise in a semiconductor image with a floating gate or floating diffusion output stage. Reset noise is sideband and extends through the harmonic frequency spectra of the video samples supplied at the semiconductor image output.
Consequently, reset noise is a major contributor to noise, even when synchronous detection of the sidebands surrounding a clocking frequency harmonic it used to recover video signal from the image output samples. (It is to be understood that in this discussion reset noise does not refer to the simple feed through of reset pulses, the reduction of which feed-through Davy does concern himself with.) The present inventor has discerned that when the COD image output signal is high-pass-filtered or differentiated before sampling-and-holding, then the sample and hold circuit converts harmonic spectrum components of the image output signal to base band spectrum components, which are in the frequency domain in a synchronous detection. Consequently, low frequency content of the image is recovered, despite high pass filtering of the image output signal. Furthermore, the holding process is responsive to the peaks of the harmonic spectrum content of the image output signal, not to the average absolute value. Consequently, conversion efficiency of the presently contemplated procedure is significantly higher than in the synchronous detection process described by Davy. These processes use sampling followed directly, without holding, by low-pass-filtering to smooth detection response.
WIFE. Kosonocky and JOE. Cannes of RCA
Corporations David Sarnoff Research Center described the I
APPARATUS FOR RECOVERING SIGNAL FROM A CHARGE TRANSFER
DEVICE" describes a method for obtaining information signals, which he characterizes as relatively noise free from the output stage of a charge transfer device. In the method Davy describes, the output signal from the regularly-sampling electrometer stage is passed through a band pass filter to separate double sideband amplitude-modulation sidebands flanking a harmonic of the clocking frequency of the electrometer stage. The separate sidebands are then synchronously detected, using a switching demodulator operated at the harmonic of that clocking frequency. The base band spectrum of the synchronously detected AM sidebands is separated from the associated harmonic spectra. This base band spectrum is used as the output signal from the charge transfer device, rather than the base band spectral of -the image output ~23~
-4- RCA 79,994/80,596 signal, which is suppressed by the band-pass filtering before synchronous detection.
The method Davy describes is effective in suppressing the flicker noise in the electrometer stage, which noise resides principally in the base band.
Reset noise is ignored by Davy; but, as noted above, reset noise is a primary source of noise in a semiconductor image with a floating gate or floating diffusion output stage. Reset noise is sideband and extends through the harmonic frequency spectra of the video samples supplied at the semiconductor image output.
Consequently, reset noise is a major contributor to noise, even when synchronous detection of the sidebands surrounding a clocking frequency harmonic it used to recover video signal from the image output samples. (It is to be understood that in this discussion reset noise does not refer to the simple feed through of reset pulses, the reduction of which feed-through Davy does concern himself with.) The present inventor has discerned that when the COD image output signal is high-pass-filtered or differentiated before sampling-and-holding, then the sample and hold circuit converts harmonic spectrum components of the image output signal to base band spectrum components, which are in the frequency domain in a synchronous detection. Consequently, low frequency content of the image is recovered, despite high pass filtering of the image output signal. Furthermore, the holding process is responsive to the peaks of the harmonic spectrum content of the image output signal, not to the average absolute value. Consequently, conversion efficiency of the presently contemplated procedure is significantly higher than in the synchronous detection process described by Davy. These processes use sampling followed directly, without holding, by low-pass-filtering to smooth detection response.
WIFE. Kosonocky and JOE. Cannes of RCA
Corporations David Sarnoff Research Center described the I
-5- RCA 79,994/80,596 floating-diffusion amplifier in their paper entitled "Basic Concepts of Charge-Coupled Devices" and published September 1975 in RCA Review, Vol. 36, pp. 566-593~ The paper suggests resetting of the gloating diffusion to the S barrier potential afforded by a Nate, which is biased with direct potential and interposed between the floating diffusion and a gate operative as a reset gate. That is, the floating diffusion is reset to a channel potential within the charge transfer channel in which the floating diffusion is disposed, rather than to the drain potential at the end of the charge transfer channel. This approach to rèsetking the floating diffusion has for the most part been discarded as impractical by those skilled in the art, because the approach introduces a pronounced low-frequency distortion in the modulation transfer function (MTF).
Smearing of the trailing edges of bright areas into darker areas is noted in television displays based on the video samples from COD images having floating diffusion output stages reset to in-channel voltages rather than to drain ZOO voltages, when the output stages have their output samples processed conventionally and a sample-and-hold output circuit is used to suppress clock feed through.
The present inventor has discovered that the low-frequency distortion in the Kosonocky and Cannes resetting procedure adversely affects only the base band portion of the frequency spectrum of the COD image output signal. If the base band (or at least the lower frequencies in which distortion appears is suppressed before sample and holding -to recover a signal free of spaces, then distortion to the Kosonocky and Cannes procedure does not appear in the sample and hold output response.
The present inventor has discovered that reset noise can also be suppressed, if reset pulses are appropriately timed, even though the floating diffusion is reset to reset drain potential following each picture element sample being clocked to be "under" the diffusion for electrometer measurement. Furthermore, this reset can I
Smearing of the trailing edges of bright areas into darker areas is noted in television displays based on the video samples from COD images having floating diffusion output stages reset to in-channel voltages rather than to drain ZOO voltages, when the output stages have their output samples processed conventionally and a sample-and-hold output circuit is used to suppress clock feed through.
The present inventor has discovered that the low-frequency distortion in the Kosonocky and Cannes resetting procedure adversely affects only the base band portion of the frequency spectrum of the COD image output signal. If the base band (or at least the lower frequencies in which distortion appears is suppressed before sample and holding -to recover a signal free of spaces, then distortion to the Kosonocky and Cannes procedure does not appear in the sample and hold output response.
The present inventor has discovered that reset noise can also be suppressed, if reset pulses are appropriately timed, even though the floating diffusion is reset to reset drain potential following each picture element sample being clocked to be "under" the diffusion for electrometer measurement. Furthermore, this reset can I
-6- RCA 79,994/80,596 be achieved without the need to sample more than once during each pixel scan interval.
It is observed that following reset, there is an interval which precedes the introduction of the next charge packet under the floating element of -the electrometer COD output stage. The reset noise level during this preceding interval is the same as the reset noise level during the ensuing interval after introduction of charge and before subsequent reset. This phenomenon is exploited in correlated double sampling.
Considering this phenomenon somewhat differently, the inventor notes: that the transition in signal, which is caused by introduction of a charge packet under the floating element may be superposed on a reset noise pedestal; and that such a noise pedestal changes only from pixel-to-pixel. The inventor notes that differentiation with respect to time of the COD image output signal, in accordance with the present invention, suppresses response to reset noise pedestals with respect to responses to those transitions which are caused by introduction of charge packets under the floating element.
Synchronous detection of the differential output signal then can take place over sampling periods which extend over respective fixed portions ox the decaying responses to these transitions. The resulting output signal exhibits good signal to reset noise ratio.
SMEAR OF THE INVENTION
The present invention is embodied in a reduced noise camera having COD imagery or its like, with a recurrently reset floating element (e.g.
floating-diffusion or floating-gate) output electrometer stage, followed by a differentiation circuit and then by a sample-and-hold circuit.
I
It is observed that following reset, there is an interval which precedes the introduction of the next charge packet under the floating element of -the electrometer COD output stage. The reset noise level during this preceding interval is the same as the reset noise level during the ensuing interval after introduction of charge and before subsequent reset. This phenomenon is exploited in correlated double sampling.
Considering this phenomenon somewhat differently, the inventor notes: that the transition in signal, which is caused by introduction of a charge packet under the floating element may be superposed on a reset noise pedestal; and that such a noise pedestal changes only from pixel-to-pixel. The inventor notes that differentiation with respect to time of the COD image output signal, in accordance with the present invention, suppresses response to reset noise pedestals with respect to responses to those transitions which are caused by introduction of charge packets under the floating element.
Synchronous detection of the differential output signal then can take place over sampling periods which extend over respective fixed portions ox the decaying responses to these transitions. The resulting output signal exhibits good signal to reset noise ratio.
SMEAR OF THE INVENTION
The present invention is embodied in a reduced noise camera having COD imagery or its like, with a recurrently reset floating element (e.g.
floating-diffusion or floating-gate) output electrometer stage, followed by a differentiation circuit and then by a sample-and-hold circuit.
I
-7- RCA 79,994/80j596 BRIEF DESCRIPTION OF DRAWING
In the drawing:
FIGURE 1 is a schematic diagram of the signal recovery system of the present invention, shown used with a COD image of the field transfer type;
FIGURE 2 is a potential profile descriptive of resetting the floating diffusion to reset drain potential;
FIGURES 3, 4 and 5 are potential profiles descriptive of different representative ways in which resetting of a floating diffusion to an in-channel potential, rather than to reset drain potential, may be accomplished as an element of the invention; and FIGURE 6 is a timing diagram descriptive of the preferred timing of resetting the floating diffusion to reset drain potential per FIGURE 2.
DETAILED DISCRETE ON
In FIGURE 1 the signal recovery system of the invention is shown being used with a semiconductor imagery By way of example, image is a COD image 10 of field transfer type. COD image 10 includes an image (or A) register if, a field storage (or B) register 12, and a parallel-input-serial-output (or C) register 13. output signal samples are generated from the charge packets transferred to the right end of C register 13, using a floating-diffusion type of charge-to-voltage conversion stage, by way of example. In such a conversion stage charge packets are regularly clocked forward from -the output of C register 13 to a potential well disposed under floating diffusion 14. The magnitude of charge in each packet in the potential well is then determined by an electrometer. The electrometer includes a cascade collection of source-follower metal-insulator-semiconductor field effect transistors 15 and 16. A further MISFIT 17 is connected as a constant~current-generator source load for MISFIT 15.
Off-chip resistor 28 provides a source load for MISFIT 16.
:~23~7~
In the drawing:
FIGURE 1 is a schematic diagram of the signal recovery system of the present invention, shown used with a COD image of the field transfer type;
FIGURE 2 is a potential profile descriptive of resetting the floating diffusion to reset drain potential;
FIGURES 3, 4 and 5 are potential profiles descriptive of different representative ways in which resetting of a floating diffusion to an in-channel potential, rather than to reset drain potential, may be accomplished as an element of the invention; and FIGURE 6 is a timing diagram descriptive of the preferred timing of resetting the floating diffusion to reset drain potential per FIGURE 2.
DETAILED DISCRETE ON
In FIGURE 1 the signal recovery system of the invention is shown being used with a semiconductor imagery By way of example, image is a COD image 10 of field transfer type. COD image 10 includes an image (or A) register if, a field storage (or B) register 12, and a parallel-input-serial-output (or C) register 13. output signal samples are generated from the charge packets transferred to the right end of C register 13, using a floating-diffusion type of charge-to-voltage conversion stage, by way of example. In such a conversion stage charge packets are regularly clocked forward from -the output of C register 13 to a potential well disposed under floating diffusion 14. The magnitude of charge in each packet in the potential well is then determined by an electrometer. The electrometer includes a cascade collection of source-follower metal-insulator-semiconductor field effect transistors 15 and 16. A further MISFIT 17 is connected as a constant~current-generator source load for MISFIT 15.
Off-chip resistor 28 provides a source load for MISFIT 16.
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-8- RCA 79,994/80,596 The COD image 10 output signal samples appear across resistor 28. A direct potential, ODE is applied to the drains of Misfits 15 and 16 to condition Misfits 15 and 16 for source follower operation. The source of MISFIT 16 connects to the output signal terminal 27 of COD image 10 and thence through load resistor 28 to a ground connection.
Output signal samples supplied at the output terminal 27 of COD image 10 are applied to the input connection of a low-noise voltage amplifier 29. The output connection of amplifier 29 supplies input signal samples to a differentiator 30. Amplifier 29 buffers the input connection of differentiator 30 from source-follower MISFIT 16. Amplifier 29 preferably has a bandwidth sufficiently restricted to roll off higher video frequencies somewhat. With such roll-off, differentiator 30: (a) responds to the signal transitions having lowered slew rate to generate pulses with greater energy content, and (b) does not introduce into final video response excessive-amplitude spikes, which otherwise would be present as the result of clocking signal feed through. The differentiated with respect--to-time video response of differentiator 30 is supplied as input signal to a wide-band low-noise amplifier 35.
After each charge packet is measured, the potential on floating diffusion I is reset responsive to a 'or pulse. The or pulse is applied to a reset gate 18 and conventionally is somewhat narrower than the clocking pulse applied to the last clocked gate (not specifically shown) of C register 13. The or pulse occurs within the time that the clocking pulse appears. Reset gate 18 is disposed "over" a charge transfer channel 19, which extends through the C register 13 and beyond to include floating diffusion 14 and a reset drain 20. More particularly, reset gate 18 is disposed "over" charge -transfer channel 19 between floating diffusion 14 and reset drain 20 and is preceded by a d-c gate 21. A direct 3~36~
I RCA 79,994/80,596 potential, RUG, is applied to gate 21. Gate 21 is preferably a short gate, in order to reduce the amount of stored charge thereunder. Gate 21 is used to prevent the or pulses applied to reset gate 18 from being coupled electrostatically to floating diffusion 14.
A clock generator 25 is shown in FIGURE 1 supplying respective sets of three-phase clocking signals to A register 11, to B register 12 and to C register 13 as customary for a CCV image of field transfer type. Other well-known clocking schemes using two-, four-, single- or virtual-phase clocking could be used instead. Clock generator 25 generates or pulses as described above, for application to gate electrode 18 of the floating-diffusion output stage.
Clock generator 25 also supplies us pulses, at a repetition rate equal to the clocking frequency of C
register 13 during serial line read-out. Such I pulses are applied via a line 26 to a synchronous detector 40.
The I pulses are used as carrier for controlling the times that signal supplied to synchronous detector 40 from the output connection of wide-band low noise amplifier 35 is sampled in the synchronous detection process.
Amplifier 35 provides voltage gain which raises signal level such that its accompanying noise it larger than that introduced by the synchronous detection process to follow;
the noise attributable to amplifier 35 is negligible compared to the 1/f noise generated within COD image 10.
Differentiator 30 is shown yin FIGURE 1 as a simple ARC high-pass filter comprising a series-arm capacitor 31 and a shun-t-leg resistor 32. The ARC time constant is chosen to suppress at least as much of the base band frequency spectrum of the COD image 10 output samples as is accompanied by flicker or lo noise that is substantially large, as compared to background thermal noise. This suppression of base band frequency spectrum is manifested in the output response of diferentiator 30 supplied to synchronous detector 40. The time constant is -the reciprocal of a corner frequency lo as expressed I
-10- RCA 79,994/80,59~
in radians per second, amplitude components at which frequency lo are suppressed 3dB by the ARC filter.
Frequency lo may be considered as a frequency of demarcation between substantial suppression and substantial non-suppression of frequencies present in the input signal of differentiator 30, but only selectively present in its output signal.
A 430 picofarad capacitor 31 and a 75-ohm resistor 32 have been used by the present inventor in a signal recovery system with 7.5 MHz C register 13 clocking frequency. The ARC high-pass filter has a thirty-five nanosecond time constant, or I, which provides for a 5 MHz corner frequency. The upper frequencies of the base band spectrum of the CC~ image 10 output samples from differentiator 30 combine with the demodulated first harmonic spectrum in synchronous detector 40 output signal to provide video high-frequency peaking. (The base band signal remnants and the demodulated first-harmonic-spectrum signal are correlated and add algebraically, while the noise components from the respective bands are uncorrelated and add victrola.
Consequently, signal-to~noise advantages accrue with this form of video hiyh-frequency peaking.) A switching demodulator followed by low-pass filtering could be used in place of synchronous detector 40. However, such switching demodulators perform average detection, providing demodulator output signal in which the recovered base band is accompanied by strong harmonic spectra. It is preferable -to use a synchronous detection process, which is peak detection by nature, to reduce the strength of the harmonic spectra remnant from the detection process relative to the recovered base band spectrum. A sample-and-hold circuit performs as such a synchronous detector here.
FIGURE 1 shows a simple sample-and~hold circuit 40 comprising MISFIT 41 and capacitor 42. The channel of MISFIT 41, when conductive, admits a respective sample to capacitor 42, which holds the admit-ted sample. The gate ~L~3~6'~
RCA 79,994/80,596 of MISFIT 41 receives from line 26 the I pulses, which are supplied at a rate equal to the C register clocking frequency. The channel of MISFIT 41 is rendered conductive responsive to each I pulse. MISFIT 41 operates as a transmission gate of a type in which control signals (us pulses from line 26) do not feed through to any appreciable extent to the conductive channel. The output circuit of this form of synchronous detector is not balanced with respect to input signals supplied to the conductive channel. The remnants of base band spectrum applied to -the input of this synchronous detector appear at its output, which allows passage of higher frequency components of the base band spectrum. This provides for some video high-frequency peaking.
The detected output signal, from sample-and-hold circuit 40 (unlike a signal taken directly from a switching demodulator) is a usable video signal and does not need filtering beyond that afforded by video amplifier cut-off. The detected output signal from detector 40 is shown applied to a buffer amplifier 50 and thence to a smoothing filter 51. Filter 51 is preferably a low pass filter that removes clocking frequency remnants so as to supply a low-noise video signal that is also free of aliasing on image details. This low-noise video will usually be directed to a video processing amplifier (not shown where synchronizing and equalizing pulses will be inserted at times coordinated with the timing of clock generator 25.
The phasing of the pulses supplied via line 26 from clock generator 25 to the gate of MISFIT 41 is arranged so that the channel of that transistor is conductive during the decaying portions of differentiator 30 spike responses to certain transitions in COD image 10 output signal level. Those certain transitions are attributable -to the introduction of charge packets under floating diffusion 14. Those transitions are not accompanied by reset noise. However, there is remnant reset noise from the decaying portions of differentiator ~3~7~
-12- RCA 79,994/80,596 30 spike responses to transitions in COD image 10 output signal at the leading and trailing edges of the or reset pulses. Consequently, the latter transitions do have reset noise components. Such noise components arise respectively prom the previous pixel, ail from the current pixel, as will be treated in greater detail further on.
Synchronous detection of the decaying portions of spike responses to the trailing edges of the or can be reduced by arranging for a shorter ARC time constant in differentiator 30. However, such arrangement seduces the amount of horizontal peaking obtainable from the passing remnant base band spectrum Avoiding synchronous detection of transitions at the leading and trailing edges ox the or pulses can be made easier by giving special attention to the timing with which or reset pulses are applied to reset gate electrode 18 of the floating-diffusion COD image output stage. The intricacies of this reset procedure will be explained later with the aid of the potential profile diagram of FIGURE 2 and the timing diagram of FIGURE 6.
Each of potential profile diagrams of FIGURES 2, 3, 4 and 5 has it its top stylized representations of the structures encountered by charge packets in moving from left to right in the charge transfer channel. In the profile, more positive potentials will be more downward in the diagram. The diagram will assume empty potential well under floating diffusion I For the sake of simplicity, fringing field effects will be ignored. Consideration of fringing field effects is not essential to understanding operation of the invention.
FIGURE 2 potential profile diagram is descriptive of resetting floating diffusion I to reset drain potential ROD, which is applied to reset drain 20.
Pi is the phase of C register clocking applied during line read-out to the last clocked gate 61 of C register 13. C
register 13 has a final gate 62 following clocked gate 61, to which final gate a direct potential BY is applied.
Potential BY establishes a barrier height to block the I
-13- RCA 79,994/80,596 passage ox charge from a potential well under clocked gate 61 to a potential well under floating diffusion 14, except for those intervals when I pulses lower gate 61 to less positive potential. Gate 21 has a potential RUG applied to it such that the channel potential under gate 21 is as positive as, or more positive than, the drain potential RD. Fringing field effects will strongly affect the actual in-channel potential under gate 21, which is normally made very short to reduce charge sharing with the floating diffusion lg. pry ranges between: (a) during charge measurement time, a voltage sufficiently negative to erect an unsurmountable barrier to passage of charge from floating diffusion 14 -to reset drain 20 diffusion and (b) during reset time, a voltage sufficiently positive to allow the charge level under floating diffusion 14 to drain to ROD potential as shown. Consequently floating diffusion 14 is reset to reset drain potential RD.
The ARC time constant of the portion of the charge transfer in which floating diffusion 14 is disposed is short in this reset scheme. This is so, because the C
portion of the time constant is the small capacitance of substrate of floating diffusion 14 and because the R
portion is the low resistance offered by the channel of the cascade field-effect-transistor action (which extends between floating diffusion 14 and reset drain 20 when positive-going pulse or is applied to reset gate 18).
Resetting to the final value of thermal noise variations superposed on reset drain potential ROD occurs, because this time constant is too fast to integrate out the noise variations. This is a sample-and-hold process, which extends the duration of the last value of thermal noise variation until the next reset interval, and thereby creates reset noise.
The inventor has found a method by which the reset noise encountered in operating the RCA Corporation 403-column COD image can be reduced from a 100-electron or so level to a level less than the electron or so level. Noise at this latter level is attributable to I
-14- RCA 79,994/80,596 Misfits 15, 16, 17. This method will be explained with the aid of FIGURE 6.
In FIGURE 6, timing diagram waveform (a) is the clocking signal applied to the last clocked gate electrode 61 of C register 13. This last-clocked gate electrode per conventional practice is immediately followed by a gate electrode 62. Gate 62 is biased with direct potential, and is subsequently followed by the floating diffusion 14.
For purposes of illustration, three-phase clocking is assumed. The clock cycle is of 133 no. duration in a 403-column-image-register COD image of field transfer type, which is to be operated to furnish a component of NTSC broadcast television signal. When the clock voltage applied to the last clocked gate electrode 61 of C
register 13 goes negative, a charge packet sampling an image picture element is transferred under floating diffusion 14. This transfer is represented in waveform of FIGURE 6 (a) by an arrow on the voltage transition.
Waveform (b) of FIGURE 6 illustrates the timing of the positive-going reset pulse or applied to reset gate 18. An initial or pulse Al is shown in waveform (b) hollowed by or pulses or 2 and or I these pulses are in a succession of pry pulses. Each such or reset pulse conventionally would be applied shortly before the negative-going transition in waveform (a) when correlated double sampling is not used. However, as shown in waveform (b), the or reset pulse used here, is applied well before the negative-going transition of a respective clocking pulse. Each clocking pulse is of length of time t, which is at least no-t appreciably shorter than I, the ARC' time constant. This timing arrangement allows -the spike response of difEerentiator 30 (-to transitions generated at leading and trailing edges of pry pulses) to be substantially completed by the time a ups pulse occurs (to render the channel of MISFIT 41 conductive, in the process of sampling the spike response of differentia-tor 30 to the transition associated with introduction of a charge packet under floating diffusion 14). Such early I
-15- RCA 79,994/80,596 occurrence of or reset pulses is used in operation with correlated double sampling as well, but for purposes which are different from purposes of the present invention.
FIGURE 6 waveform (c) shows the resulting potential variation on floating diffusion 14. The same potential variation, perhaps of different direct bias level, appears at the source electrode of MISFIT 16 and across the load resistor 28 of thy COD image 10. A range of variation, R, attributable to reset noise, appears in unclamped portions of waveform (c) between the reset pulses 'Prowl and 'Pry shown in waveform (b).
A range of variation R', also attributable to reset noise, appears in portions of waveform (c) occurring during the time between the reset pulses or 2 and pry 3 shown in waveform (b). The ranges of variation R and R' are of similar amplitude, but the amplitude variations in ranges R and R' are not correlated. The introduction of a charge packet under floating diffusion 14 following the reset pulse pry 2 creates a sample height on which reset noise in the R' range is superposed.
FIGURE 6 waveform (d) is an idealization of the voltage samples appearing at -the output of amplifier 35 following differentiator 30. Clocking noise is not considered. The differentiator 30 suppresses low frequency content in its response, which response will be analyzed by superposition of responses to transition edges. The differentiation of the range of amplitudes of the transition of waveform (c) at the leading edge of the reset pulse pry, as accompanied by reset noise of range R
amplified by the voltage gain G of amplifier 35, causes an initial value of GO within the range of reset noise appearing in waveform (d) during the pry 2 pulse. This initial value of GO decays exponentially -to GO exp 1(dl 1) during the duration d of pry 2 pulse. The differentiation of the transition of waveform (c) at the trailing edge of the pry 2 pulse, which is accompanied by reset noise of range R' and is amplified by the voltage gain G of amplifier 35, increments GO exp Ed 1) by non-correlated :~Z~G71 16- RCA 79,99g/80,596 reset noise GO'. This incrementing gives an initial value N for the exponentially decaying range of total reset noise in the period between 2 and ~r-3 pulses. The sum of these non-correlated reset noise components is such that N on average substantially equals GROWER
exp Ed l)] at the trailing edge of the ~r-2 pulse.
At a time t duration later, when a charge packet is introduced under floating diffusion 14, reset noise will be reduced to a value N [exp lo 1)]. At this time the response of voltage amplifier 35 to differentiated sample height has a value of Go. Signal-to-noise ratio at this time has a value, then, of I reoccupy Ed l)] expiate 1). Since both Go sample and M/[exp(t~ 1)] reset noise decay exponentially, this signal-to-noise ratio remains substantially constant as the Go sample decays.
FIGURE 6 waveform (e) shows a representative phasing of two (sly and us 2) of the succession of us sampling pulses, which are applied via line 26 to the gate electrode of the n-channel MISFIT 41 and are used as the sample switch in synchronous detector 40. Although circuit 40 is considered as being sample-and-hold in nature, it more accurately is described as being track-and-hold in nature, with the last value of each sample being held throughout the ensuing hold period. In this last context, the amplitude of sample-and-hold circuit 40 output response is increased, if sampling is done with a narrower pulse sooner after the Go negative transition.
Since the component of reset noise owing to the previous pixel and the component of reset noise owing to the current pixel are not correlated and tend to be on average the same amplitude, shortening d as much as possible for given value of dot, tends to reduce reset noise. Making d 33 nanoseconds and t 40 nanoseconds was compared to the 35 nanosecond time constant I of filter 30) reduces reset noise by a factor of three compared to resettling just before admission of charge under floating ~23~
-17- RCA 79,994/80,596 diffusion 14. In terms of the operation of the circuit specifically described using the RCA Corporation 403-column COD imagery this reduces reset noise to less than the 35-electron amplifier noise.
As noted above, reset noise results when the reset of floating diffusion 14 is by hard clamp to reset drain 20, by reason of the attendant short ARC time constant on the voltage appearing at floating diffusion 14 allowing reset to thermal noise. Reset noise alternatively may be lowered by taking measures to lengthen the ARC time constant on the floating diffusion 14. This can be done by resetting the floating diffusion, not to reset drain potential, but to an in-channel potential. Such resetting introduces an accumulation process. The accumulation process provides time integration of the charge under the floating diffusion 14.
Such integration lengthens the effective ARC -time constant associated with floating diffusion 14. Alternative modes of resetting using these principals are set forth later in this description.
Other differentiator circuits than -the resistor 31, capacitor 32 high-pass ARC network can be used to implement the invention, of course.
The extension of the decaying response to the leading edges of reset pulses to overlap the response to the measurement of the ensuing pixel sample has a pronounced effect on video peaking (in line scan direction) of the synchronously detected COD image output signal. This will be explained with the aid of FIGURE
I-The loss of d-c baseline reference during passage of the COD image 10 output signal through differen-tiator 30 cooperates with the lack of d-c restoration except during line retrace to produce the following effect. The decaying exponential response to the leading edge of each reset pulse has a tail with an amplitude component that depends to on the value of the image sample admitted under floating diffusion 14 prior to 3~7~
~18- RCA 79,994/80,596 that reset pulse. The lower frequency components of that previous image sample are similar to thaw of the next image sample admitted under floating diffusion 14 after that reset pulse. Consequently, the positive decaying exponential response to the leading edge of the reset pulse opposes the negative decaying exponential response to that next image sample. This opposed relationship reduces the lower-frequency modulation of each harmonic of C resister clocking frequency in image 10 output signal.
These opposed-relationship, higher frequency components of the two image samples are dissimilar, so that the cancellation effect is less pronounced. This increases the amplitude of higher-modulating-frequency sidebands of the harmonics of C register clocking frequency relative to the amplitude of their lower-modulating-frequency sidebands.
The factor by which the synchronous detector 40 output signal is peaked at each frequency is substantially constant despite variations in reset pulse amplitude or variations in the difference between amplitudes of successive pixel samples. The amount of peaking depends primarily on the degree to which the tail of the exponentially decaying positive response to difference of successive pixel samples is reduced in its overlap with the exponentially decaying negative response to the later pixel sample. The amount of tail amplitude reduction depends on the expired time between the leading edge of reset pulse and the admission of succeeding image sample charge under floating diffusion 14. In other words, the amount of tail amplitude reduction depends on -the sum (dot) of the duration d of the reset pulse and the interval t between the trailing edge of the reset pulse and that admission of charge.
The duration d of the reset pulse can be chosen to provide flat video response at the output connection of synchronous detector I (or, for that matter, to provide rolled-off or peaked video response if one so desires).
The length of interval t can be adjusted to a degree to ~3~36~
-19- RCA 79,994/80,596 affect peaking as well. As noted above, this adjustment is constrained by the desire to avoid reset noise.
Quantities dot, and may be selected so as to provide for over-peaked video response, then the video response may be trimmed as desired, using a variable resistance inserted in series with the channel of MISFIT 41 to introduce a varying degree of roll-off.
The use of differentiator 30 prior to synchronous detector 40 solves another problem encountered in COD images. During the parallel transfer of charge packets from the B register 12 to the C register 13~ a -transient change occurs in the substrate bias. This transient causes a level shift in COD image to response.
The level shift is manifested as an initially pronounced decaying over brightness in the first few video samples clocked out of C register 13 in each line of video. This over brightness "hook" at edge of picture decays at a rate pixel-to-pixel slow enough to be suppressed substantially entirely in differentiator 30 response. A similar effect, which is manifested at the top of the displayed image, results from A register-to-B register transfer during the vertical retrace interval. This manifestation also is substantially reduced entirely by differentiator 30.
The earlier-mentioned, alternative modes of resetting are considered next. The difference between resetting floating diffusion 14 to reset drain potential and resetting to an in-channel potential will now be explained with the aid of potential profile diagrams, FIGURES 3, 4 and 5.
FIGURE 3 is a potential profile diagram descrip-live of resetting floating diffusion 14 to an in-channel potential. The in-channel potential is established by the most positive excursion of I which is not so positive as RD. This most positive excursion presents a lowered barrier height which will be surmounted by charge carriers in the region of floating diffusion 14 and under gate 21, until a potential level somewhat more positive than the barrier height is established on the floating diffusion 3~6~l 20- RCA 79,994/80,596 I This potential is less positive than RD. Reset is to the barrier height with a small offset owing to dark current flowing responsive to thermal excitation of charge carriers. (Variation in the offset owing to this thermal excitation is a principal cause of the low-frequency peak up of the base-band ox the modulation transfer function when reset is to an in-channel potential.) FIGURE 4 is a potential profile diagram of a preferred way of resetting floating diffusion 14 to an in-channel potential. Reset gate 18 is operated over a range including reset drain potential I The positive excursion of or is not the in-channel potential to which floating diffusion 14 is reset. Rather, the direct potential RUG applied to d-c gate 21, which direct potential is easily filtered to remove noise therefrom, is made less positive than reset drain voltage RD. A
potential barrier 63 is erected under d-c gate 21, and floating diffusion 14 resets to the barrier potential 63, with a slight positive offset. The offset occurs because the flow ox charge proceeds only until the barrier potential can no longer be surmounted.
FIGURE 5 is a potential profile diagram of resetting to floating diffusion 14 barrier potential under d-c gate 21 when reset gate 18 has a further d-c gate 64 interposed between it and reset drain 20. Such a further d-c gate 64 is found in the COD images presently manufac-lured by RCA Corporation. This further d-c gate 64 is internally connected to d-c gate 21 in these devices. The strongly preferred direction of flow of charge from under reset gate 18, when gate 18 is no longer positively pulsed, is towards reset drain 20. This is because the barrier potential under d-c gate 21 tends to be less easily surmounted than the barrier potential under d-c gate I owing -to fringing field from reset drain 20 reducing the barrier height under d-c gate 64.
While the invention has been described in connection with a field transfer type of COD imagery lo I
21- RCA 79,994/80,596 it is equally useful in other types of COD images such as those of interline-transfer or line-transfer types.
Output signal samples supplied at the output terminal 27 of COD image 10 are applied to the input connection of a low-noise voltage amplifier 29. The output connection of amplifier 29 supplies input signal samples to a differentiator 30. Amplifier 29 buffers the input connection of differentiator 30 from source-follower MISFIT 16. Amplifier 29 preferably has a bandwidth sufficiently restricted to roll off higher video frequencies somewhat. With such roll-off, differentiator 30: (a) responds to the signal transitions having lowered slew rate to generate pulses with greater energy content, and (b) does not introduce into final video response excessive-amplitude spikes, which otherwise would be present as the result of clocking signal feed through. The differentiated with respect--to-time video response of differentiator 30 is supplied as input signal to a wide-band low-noise amplifier 35.
After each charge packet is measured, the potential on floating diffusion I is reset responsive to a 'or pulse. The or pulse is applied to a reset gate 18 and conventionally is somewhat narrower than the clocking pulse applied to the last clocked gate (not specifically shown) of C register 13. The or pulse occurs within the time that the clocking pulse appears. Reset gate 18 is disposed "over" a charge transfer channel 19, which extends through the C register 13 and beyond to include floating diffusion 14 and a reset drain 20. More particularly, reset gate 18 is disposed "over" charge -transfer channel 19 between floating diffusion 14 and reset drain 20 and is preceded by a d-c gate 21. A direct 3~36~
I RCA 79,994/80,596 potential, RUG, is applied to gate 21. Gate 21 is preferably a short gate, in order to reduce the amount of stored charge thereunder. Gate 21 is used to prevent the or pulses applied to reset gate 18 from being coupled electrostatically to floating diffusion 14.
A clock generator 25 is shown in FIGURE 1 supplying respective sets of three-phase clocking signals to A register 11, to B register 12 and to C register 13 as customary for a CCV image of field transfer type. Other well-known clocking schemes using two-, four-, single- or virtual-phase clocking could be used instead. Clock generator 25 generates or pulses as described above, for application to gate electrode 18 of the floating-diffusion output stage.
Clock generator 25 also supplies us pulses, at a repetition rate equal to the clocking frequency of C
register 13 during serial line read-out. Such I pulses are applied via a line 26 to a synchronous detector 40.
The I pulses are used as carrier for controlling the times that signal supplied to synchronous detector 40 from the output connection of wide-band low noise amplifier 35 is sampled in the synchronous detection process.
Amplifier 35 provides voltage gain which raises signal level such that its accompanying noise it larger than that introduced by the synchronous detection process to follow;
the noise attributable to amplifier 35 is negligible compared to the 1/f noise generated within COD image 10.
Differentiator 30 is shown yin FIGURE 1 as a simple ARC high-pass filter comprising a series-arm capacitor 31 and a shun-t-leg resistor 32. The ARC time constant is chosen to suppress at least as much of the base band frequency spectrum of the COD image 10 output samples as is accompanied by flicker or lo noise that is substantially large, as compared to background thermal noise. This suppression of base band frequency spectrum is manifested in the output response of diferentiator 30 supplied to synchronous detector 40. The time constant is -the reciprocal of a corner frequency lo as expressed I
-10- RCA 79,994/80,59~
in radians per second, amplitude components at which frequency lo are suppressed 3dB by the ARC filter.
Frequency lo may be considered as a frequency of demarcation between substantial suppression and substantial non-suppression of frequencies present in the input signal of differentiator 30, but only selectively present in its output signal.
A 430 picofarad capacitor 31 and a 75-ohm resistor 32 have been used by the present inventor in a signal recovery system with 7.5 MHz C register 13 clocking frequency. The ARC high-pass filter has a thirty-five nanosecond time constant, or I, which provides for a 5 MHz corner frequency. The upper frequencies of the base band spectrum of the CC~ image 10 output samples from differentiator 30 combine with the demodulated first harmonic spectrum in synchronous detector 40 output signal to provide video high-frequency peaking. (The base band signal remnants and the demodulated first-harmonic-spectrum signal are correlated and add algebraically, while the noise components from the respective bands are uncorrelated and add victrola.
Consequently, signal-to~noise advantages accrue with this form of video hiyh-frequency peaking.) A switching demodulator followed by low-pass filtering could be used in place of synchronous detector 40. However, such switching demodulators perform average detection, providing demodulator output signal in which the recovered base band is accompanied by strong harmonic spectra. It is preferable -to use a synchronous detection process, which is peak detection by nature, to reduce the strength of the harmonic spectra remnant from the detection process relative to the recovered base band spectrum. A sample-and-hold circuit performs as such a synchronous detector here.
FIGURE 1 shows a simple sample-and~hold circuit 40 comprising MISFIT 41 and capacitor 42. The channel of MISFIT 41, when conductive, admits a respective sample to capacitor 42, which holds the admit-ted sample. The gate ~L~3~6'~
RCA 79,994/80,596 of MISFIT 41 receives from line 26 the I pulses, which are supplied at a rate equal to the C register clocking frequency. The channel of MISFIT 41 is rendered conductive responsive to each I pulse. MISFIT 41 operates as a transmission gate of a type in which control signals (us pulses from line 26) do not feed through to any appreciable extent to the conductive channel. The output circuit of this form of synchronous detector is not balanced with respect to input signals supplied to the conductive channel. The remnants of base band spectrum applied to -the input of this synchronous detector appear at its output, which allows passage of higher frequency components of the base band spectrum. This provides for some video high-frequency peaking.
The detected output signal, from sample-and-hold circuit 40 (unlike a signal taken directly from a switching demodulator) is a usable video signal and does not need filtering beyond that afforded by video amplifier cut-off. The detected output signal from detector 40 is shown applied to a buffer amplifier 50 and thence to a smoothing filter 51. Filter 51 is preferably a low pass filter that removes clocking frequency remnants so as to supply a low-noise video signal that is also free of aliasing on image details. This low-noise video will usually be directed to a video processing amplifier (not shown where synchronizing and equalizing pulses will be inserted at times coordinated with the timing of clock generator 25.
The phasing of the pulses supplied via line 26 from clock generator 25 to the gate of MISFIT 41 is arranged so that the channel of that transistor is conductive during the decaying portions of differentiator 30 spike responses to certain transitions in COD image 10 output signal level. Those certain transitions are attributable -to the introduction of charge packets under floating diffusion 14. Those transitions are not accompanied by reset noise. However, there is remnant reset noise from the decaying portions of differentiator ~3~7~
-12- RCA 79,994/80,596 30 spike responses to transitions in COD image 10 output signal at the leading and trailing edges of the or reset pulses. Consequently, the latter transitions do have reset noise components. Such noise components arise respectively prom the previous pixel, ail from the current pixel, as will be treated in greater detail further on.
Synchronous detection of the decaying portions of spike responses to the trailing edges of the or can be reduced by arranging for a shorter ARC time constant in differentiator 30. However, such arrangement seduces the amount of horizontal peaking obtainable from the passing remnant base band spectrum Avoiding synchronous detection of transitions at the leading and trailing edges ox the or pulses can be made easier by giving special attention to the timing with which or reset pulses are applied to reset gate electrode 18 of the floating-diffusion COD image output stage. The intricacies of this reset procedure will be explained later with the aid of the potential profile diagram of FIGURE 2 and the timing diagram of FIGURE 6.
Each of potential profile diagrams of FIGURES 2, 3, 4 and 5 has it its top stylized representations of the structures encountered by charge packets in moving from left to right in the charge transfer channel. In the profile, more positive potentials will be more downward in the diagram. The diagram will assume empty potential well under floating diffusion I For the sake of simplicity, fringing field effects will be ignored. Consideration of fringing field effects is not essential to understanding operation of the invention.
FIGURE 2 potential profile diagram is descriptive of resetting floating diffusion I to reset drain potential ROD, which is applied to reset drain 20.
Pi is the phase of C register clocking applied during line read-out to the last clocked gate 61 of C register 13. C
register 13 has a final gate 62 following clocked gate 61, to which final gate a direct potential BY is applied.
Potential BY establishes a barrier height to block the I
-13- RCA 79,994/80,596 passage ox charge from a potential well under clocked gate 61 to a potential well under floating diffusion 14, except for those intervals when I pulses lower gate 61 to less positive potential. Gate 21 has a potential RUG applied to it such that the channel potential under gate 21 is as positive as, or more positive than, the drain potential RD. Fringing field effects will strongly affect the actual in-channel potential under gate 21, which is normally made very short to reduce charge sharing with the floating diffusion lg. pry ranges between: (a) during charge measurement time, a voltage sufficiently negative to erect an unsurmountable barrier to passage of charge from floating diffusion 14 -to reset drain 20 diffusion and (b) during reset time, a voltage sufficiently positive to allow the charge level under floating diffusion 14 to drain to ROD potential as shown. Consequently floating diffusion 14 is reset to reset drain potential RD.
The ARC time constant of the portion of the charge transfer in which floating diffusion 14 is disposed is short in this reset scheme. This is so, because the C
portion of the time constant is the small capacitance of substrate of floating diffusion 14 and because the R
portion is the low resistance offered by the channel of the cascade field-effect-transistor action (which extends between floating diffusion 14 and reset drain 20 when positive-going pulse or is applied to reset gate 18).
Resetting to the final value of thermal noise variations superposed on reset drain potential ROD occurs, because this time constant is too fast to integrate out the noise variations. This is a sample-and-hold process, which extends the duration of the last value of thermal noise variation until the next reset interval, and thereby creates reset noise.
The inventor has found a method by which the reset noise encountered in operating the RCA Corporation 403-column COD image can be reduced from a 100-electron or so level to a level less than the electron or so level. Noise at this latter level is attributable to I
-14- RCA 79,994/80,596 Misfits 15, 16, 17. This method will be explained with the aid of FIGURE 6.
In FIGURE 6, timing diagram waveform (a) is the clocking signal applied to the last clocked gate electrode 61 of C register 13. This last-clocked gate electrode per conventional practice is immediately followed by a gate electrode 62. Gate 62 is biased with direct potential, and is subsequently followed by the floating diffusion 14.
For purposes of illustration, three-phase clocking is assumed. The clock cycle is of 133 no. duration in a 403-column-image-register COD image of field transfer type, which is to be operated to furnish a component of NTSC broadcast television signal. When the clock voltage applied to the last clocked gate electrode 61 of C
register 13 goes negative, a charge packet sampling an image picture element is transferred under floating diffusion 14. This transfer is represented in waveform of FIGURE 6 (a) by an arrow on the voltage transition.
Waveform (b) of FIGURE 6 illustrates the timing of the positive-going reset pulse or applied to reset gate 18. An initial or pulse Al is shown in waveform (b) hollowed by or pulses or 2 and or I these pulses are in a succession of pry pulses. Each such or reset pulse conventionally would be applied shortly before the negative-going transition in waveform (a) when correlated double sampling is not used. However, as shown in waveform (b), the or reset pulse used here, is applied well before the negative-going transition of a respective clocking pulse. Each clocking pulse is of length of time t, which is at least no-t appreciably shorter than I, the ARC' time constant. This timing arrangement allows -the spike response of difEerentiator 30 (-to transitions generated at leading and trailing edges of pry pulses) to be substantially completed by the time a ups pulse occurs (to render the channel of MISFIT 41 conductive, in the process of sampling the spike response of differentia-tor 30 to the transition associated with introduction of a charge packet under floating diffusion 14). Such early I
-15- RCA 79,994/80,596 occurrence of or reset pulses is used in operation with correlated double sampling as well, but for purposes which are different from purposes of the present invention.
FIGURE 6 waveform (c) shows the resulting potential variation on floating diffusion 14. The same potential variation, perhaps of different direct bias level, appears at the source electrode of MISFIT 16 and across the load resistor 28 of thy COD image 10. A range of variation, R, attributable to reset noise, appears in unclamped portions of waveform (c) between the reset pulses 'Prowl and 'Pry shown in waveform (b).
A range of variation R', also attributable to reset noise, appears in portions of waveform (c) occurring during the time between the reset pulses or 2 and pry 3 shown in waveform (b). The ranges of variation R and R' are of similar amplitude, but the amplitude variations in ranges R and R' are not correlated. The introduction of a charge packet under floating diffusion 14 following the reset pulse pry 2 creates a sample height on which reset noise in the R' range is superposed.
FIGURE 6 waveform (d) is an idealization of the voltage samples appearing at -the output of amplifier 35 following differentiator 30. Clocking noise is not considered. The differentiator 30 suppresses low frequency content in its response, which response will be analyzed by superposition of responses to transition edges. The differentiation of the range of amplitudes of the transition of waveform (c) at the leading edge of the reset pulse pry, as accompanied by reset noise of range R
amplified by the voltage gain G of amplifier 35, causes an initial value of GO within the range of reset noise appearing in waveform (d) during the pry 2 pulse. This initial value of GO decays exponentially -to GO exp 1(dl 1) during the duration d of pry 2 pulse. The differentiation of the transition of waveform (c) at the trailing edge of the pry 2 pulse, which is accompanied by reset noise of range R' and is amplified by the voltage gain G of amplifier 35, increments GO exp Ed 1) by non-correlated :~Z~G71 16- RCA 79,99g/80,596 reset noise GO'. This incrementing gives an initial value N for the exponentially decaying range of total reset noise in the period between 2 and ~r-3 pulses. The sum of these non-correlated reset noise components is such that N on average substantially equals GROWER
exp Ed l)] at the trailing edge of the ~r-2 pulse.
At a time t duration later, when a charge packet is introduced under floating diffusion 14, reset noise will be reduced to a value N [exp lo 1)]. At this time the response of voltage amplifier 35 to differentiated sample height has a value of Go. Signal-to-noise ratio at this time has a value, then, of I reoccupy Ed l)] expiate 1). Since both Go sample and M/[exp(t~ 1)] reset noise decay exponentially, this signal-to-noise ratio remains substantially constant as the Go sample decays.
FIGURE 6 waveform (e) shows a representative phasing of two (sly and us 2) of the succession of us sampling pulses, which are applied via line 26 to the gate electrode of the n-channel MISFIT 41 and are used as the sample switch in synchronous detector 40. Although circuit 40 is considered as being sample-and-hold in nature, it more accurately is described as being track-and-hold in nature, with the last value of each sample being held throughout the ensuing hold period. In this last context, the amplitude of sample-and-hold circuit 40 output response is increased, if sampling is done with a narrower pulse sooner after the Go negative transition.
Since the component of reset noise owing to the previous pixel and the component of reset noise owing to the current pixel are not correlated and tend to be on average the same amplitude, shortening d as much as possible for given value of dot, tends to reduce reset noise. Making d 33 nanoseconds and t 40 nanoseconds was compared to the 35 nanosecond time constant I of filter 30) reduces reset noise by a factor of three compared to resettling just before admission of charge under floating ~23~
-17- RCA 79,994/80,596 diffusion 14. In terms of the operation of the circuit specifically described using the RCA Corporation 403-column COD imagery this reduces reset noise to less than the 35-electron amplifier noise.
As noted above, reset noise results when the reset of floating diffusion 14 is by hard clamp to reset drain 20, by reason of the attendant short ARC time constant on the voltage appearing at floating diffusion 14 allowing reset to thermal noise. Reset noise alternatively may be lowered by taking measures to lengthen the ARC time constant on the floating diffusion 14. This can be done by resetting the floating diffusion, not to reset drain potential, but to an in-channel potential. Such resetting introduces an accumulation process. The accumulation process provides time integration of the charge under the floating diffusion 14.
Such integration lengthens the effective ARC -time constant associated with floating diffusion 14. Alternative modes of resetting using these principals are set forth later in this description.
Other differentiator circuits than -the resistor 31, capacitor 32 high-pass ARC network can be used to implement the invention, of course.
The extension of the decaying response to the leading edges of reset pulses to overlap the response to the measurement of the ensuing pixel sample has a pronounced effect on video peaking (in line scan direction) of the synchronously detected COD image output signal. This will be explained with the aid of FIGURE
I-The loss of d-c baseline reference during passage of the COD image 10 output signal through differen-tiator 30 cooperates with the lack of d-c restoration except during line retrace to produce the following effect. The decaying exponential response to the leading edge of each reset pulse has a tail with an amplitude component that depends to on the value of the image sample admitted under floating diffusion 14 prior to 3~7~
~18- RCA 79,994/80,596 that reset pulse. The lower frequency components of that previous image sample are similar to thaw of the next image sample admitted under floating diffusion 14 after that reset pulse. Consequently, the positive decaying exponential response to the leading edge of the reset pulse opposes the negative decaying exponential response to that next image sample. This opposed relationship reduces the lower-frequency modulation of each harmonic of C resister clocking frequency in image 10 output signal.
These opposed-relationship, higher frequency components of the two image samples are dissimilar, so that the cancellation effect is less pronounced. This increases the amplitude of higher-modulating-frequency sidebands of the harmonics of C register clocking frequency relative to the amplitude of their lower-modulating-frequency sidebands.
The factor by which the synchronous detector 40 output signal is peaked at each frequency is substantially constant despite variations in reset pulse amplitude or variations in the difference between amplitudes of successive pixel samples. The amount of peaking depends primarily on the degree to which the tail of the exponentially decaying positive response to difference of successive pixel samples is reduced in its overlap with the exponentially decaying negative response to the later pixel sample. The amount of tail amplitude reduction depends on the expired time between the leading edge of reset pulse and the admission of succeeding image sample charge under floating diffusion 14. In other words, the amount of tail amplitude reduction depends on -the sum (dot) of the duration d of the reset pulse and the interval t between the trailing edge of the reset pulse and that admission of charge.
The duration d of the reset pulse can be chosen to provide flat video response at the output connection of synchronous detector I (or, for that matter, to provide rolled-off or peaked video response if one so desires).
The length of interval t can be adjusted to a degree to ~3~36~
-19- RCA 79,994/80,596 affect peaking as well. As noted above, this adjustment is constrained by the desire to avoid reset noise.
Quantities dot, and may be selected so as to provide for over-peaked video response, then the video response may be trimmed as desired, using a variable resistance inserted in series with the channel of MISFIT 41 to introduce a varying degree of roll-off.
The use of differentiator 30 prior to synchronous detector 40 solves another problem encountered in COD images. During the parallel transfer of charge packets from the B register 12 to the C register 13~ a -transient change occurs in the substrate bias. This transient causes a level shift in COD image to response.
The level shift is manifested as an initially pronounced decaying over brightness in the first few video samples clocked out of C register 13 in each line of video. This over brightness "hook" at edge of picture decays at a rate pixel-to-pixel slow enough to be suppressed substantially entirely in differentiator 30 response. A similar effect, which is manifested at the top of the displayed image, results from A register-to-B register transfer during the vertical retrace interval. This manifestation also is substantially reduced entirely by differentiator 30.
The earlier-mentioned, alternative modes of resetting are considered next. The difference between resetting floating diffusion 14 to reset drain potential and resetting to an in-channel potential will now be explained with the aid of potential profile diagrams, FIGURES 3, 4 and 5.
FIGURE 3 is a potential profile diagram descrip-live of resetting floating diffusion 14 to an in-channel potential. The in-channel potential is established by the most positive excursion of I which is not so positive as RD. This most positive excursion presents a lowered barrier height which will be surmounted by charge carriers in the region of floating diffusion 14 and under gate 21, until a potential level somewhat more positive than the barrier height is established on the floating diffusion 3~6~l 20- RCA 79,994/80,596 I This potential is less positive than RD. Reset is to the barrier height with a small offset owing to dark current flowing responsive to thermal excitation of charge carriers. (Variation in the offset owing to this thermal excitation is a principal cause of the low-frequency peak up of the base-band ox the modulation transfer function when reset is to an in-channel potential.) FIGURE 4 is a potential profile diagram of a preferred way of resetting floating diffusion 14 to an in-channel potential. Reset gate 18 is operated over a range including reset drain potential I The positive excursion of or is not the in-channel potential to which floating diffusion 14 is reset. Rather, the direct potential RUG applied to d-c gate 21, which direct potential is easily filtered to remove noise therefrom, is made less positive than reset drain voltage RD. A
potential barrier 63 is erected under d-c gate 21, and floating diffusion 14 resets to the barrier potential 63, with a slight positive offset. The offset occurs because the flow ox charge proceeds only until the barrier potential can no longer be surmounted.
FIGURE 5 is a potential profile diagram of resetting to floating diffusion 14 barrier potential under d-c gate 21 when reset gate 18 has a further d-c gate 64 interposed between it and reset drain 20. Such a further d-c gate 64 is found in the COD images presently manufac-lured by RCA Corporation. This further d-c gate 64 is internally connected to d-c gate 21 in these devices. The strongly preferred direction of flow of charge from under reset gate 18, when gate 18 is no longer positively pulsed, is towards reset drain 20. This is because the barrier potential under d-c gate 21 tends to be less easily surmounted than the barrier potential under d-c gate I owing -to fringing field from reset drain 20 reducing the barrier height under d-c gate 64.
While the invention has been described in connection with a field transfer type of COD imagery lo I
21- RCA 79,994/80,596 it is equally useful in other types of COD images such as those of interline-transfer or line-transfer types.
Claims (6)
1. A camera having a CCD imager therein for generating a series of spaced image-response samples at a clocked rate, wherein:
an electrometer output stage has a floating element for supplying said series of spaced image-response samples, said floating element being periodically reset responsive to pulses at said clocked rate;
a differentiator circuit differentiates said image response samples with respect to time, and suppresses certain frequencies in differentiated image samples produced thereby which certain frequencies are lower than a corner frequency, and which contain all substantial energy of flicker noise; and a sample-and-hold circuit, to which are supplied the differentiated image response samples from said differentiator circuit, samples and holds those supplied samples responsive to sampling pulses at said clocked rate, in order to provide an image response without spaces.
an electrometer output stage has a floating element for supplying said series of spaced image-response samples, said floating element being periodically reset responsive to pulses at said clocked rate;
a differentiator circuit differentiates said image response samples with respect to time, and suppresses certain frequencies in differentiated image samples produced thereby which certain frequencies are lower than a corner frequency, and which contain all substantial energy of flicker noise; and a sample-and-hold circuit, to which are supplied the differentiated image response samples from said differentiator circuit, samples and holds those supplied samples responsive to sampling pulses at said clocked rate, in order to provide an image response without spaces.
2. A camera as set forth in Claim 1 wherein applications of reset pulses precede the respective times at which charges packets are introduced under said floating element by intervals not appreciably shorter than the reciprocal of said corner frequency in radians per unit time.
3. camera as set forth in Claim 1 or 2, wherein said floating element is reset to an in-channel potential of a charge transfer channel of said output state for reducing noise associated with resetting.
4. A camera as set forth in anyone of Claims 1 or 2, wherein the corner frequency of said differentiator circuit is chosen within the baseband frequency spectrum of said image response samples, in order to provide video peaking of the image response of said sample-and-hold circuit.
5. A camera as set forth in anyone of Claims 1 or 2, wherein said differentiator circuit comprises a high-pass filter comprising a series-arm capacitor and a shunt-leg resistor.
6. A camera as set forth in anyone of Claims 1 or 2, wherein said sample and hold circuit comprises:
an insulated-gate field effect transistor, which is responsive to the clocked rate sampling pulses at a gate thereof, for admitting samples from said differentiator circuit; and a capacitor is used to hold admitted sampled image response at the output of said sample-and-hold circuit.
an insulated-gate field effect transistor, which is responsive to the clocked rate sampling pulses at a gate thereof, for admitting samples from said differentiator circuit; and a capacitor is used to hold admitted sampled image response at the output of said sample-and-hold circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CA000518441A CA1230671A (en) | 1983-08-22 | 1986-09-17 | Reduced-noise ccd camera with single-sampled output |
Applications Claiming Priority (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US52549183A | 1983-08-22 | 1983-08-22 | |
| US525,491 | 1983-08-22 | ||
| US59004484A | 1984-03-15 | 1984-03-15 | |
| US590,044 | 1984-03-15 | ||
| CA000460881A CA1219337A (en) | 1983-08-22 | 1984-08-13 | Reduced-noise ccd camera with single-sampled output |
| CA000518441A CA1230671A (en) | 1983-08-22 | 1986-09-17 | Reduced-noise ccd camera with single-sampled output |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000460881A Division CA1219337A (en) | 1983-08-22 | 1984-08-13 | Reduced-noise ccd camera with single-sampled output |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1230671A true CA1230671A (en) | 1987-12-22 |
Family
ID=27167457
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000518441A Expired CA1230671A (en) | 1983-08-22 | 1986-09-17 | Reduced-noise ccd camera with single-sampled output |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1230671A (en) |
-
1986
- 1986-09-17 CA CA000518441A patent/CA1230671A/en not_active Expired
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