CA1155236A - Transistor having improved turn-off time and second breakdown characteristics - Google Patents
Transistor having improved turn-off time and second breakdown characteristicsInfo
- Publication number
- CA1155236A CA1155236A CA000331749A CA331749A CA1155236A CA 1155236 A CA1155236 A CA 1155236A CA 000331749 A CA000331749 A CA 000331749A CA 331749 A CA331749 A CA 331749A CA 1155236 A CA1155236 A CA 1155236A
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- 230000001976 improved effect Effects 0.000 title abstract description 9
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- 230000002093 peripheral effect Effects 0.000 claims 3
- 239000002800 charge carrier Substances 0.000 abstract description 3
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- 208000003251 Pruritus Diseases 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000007803 itching Effects 0.000 description 2
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- 230000009467 reduction Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0804—Emitter regions of bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41708—Emitter or collector electrodes for bipolar transistors
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
- Thyristors (AREA)
Abstract
ABSTRACT OF THE DISCLOSURE
A power transistor having improved turn-off characteristics and enhanced reversed second breakdown capabilities is described wherein the emitter of the transistor includes first and second regions, the first region being disposed within the second region and having lower gain than the second region. Turn off is enhanced as essentially no current flows under the lower gain first region during turn off thereby facilitating the removal of excess charge carriers when the device is in the turn-off stage.
A power transistor having improved turn-off characteristics and enhanced reversed second breakdown capabilities is described wherein the emitter of the transistor includes first and second regions, the first region being disposed within the second region and having lower gain than the second region. Turn off is enhanced as essentially no current flows under the lower gain first region during turn off thereby facilitating the removal of excess charge carriers when the device is in the turn-off stage.
Description
This invention relates in general to semiconduc-tor devices and more particularly to three-element transistor semiconductor devices having faster turn-off time and higher reverse second breakdown characteristics than has been heretofore found. As power semiconductor devices become more and more widely employed in a variety of applications and, especially, in applications where high speed, small size, low weight, high efficiency, and the like, are demanded, the utmost in device performance is required.
A particularly important characteristic in devices which are employed as solid state switches is that the speed of switching be as rapid as possible. This is due to the greatly increased power dissipation which is the result of low switching speed. ~ncreased power dissipation results in poor device performance, the requirement for large heat sinks, and the use of larger and more expensive devices for the same application than would be required were higher switching speed provided to reduce power dissipation to a minimum.
In general, ~.he greatest contribution ko power dissipation in switching semiconductor devices is made during the turn-off rather than the turn-on period. This is due to the fact that, during turn off, device current typically remains at its quiescent value during at least a portion of the time that devlce voltage is increasing from a low saturation state value to a high blocking state value.
During this period, substantial power may be dissipated by the device. It is advantageous, therefore, to provide a switching transistor in which the current through device begins to decrease rapidly as soon as possible after the application of a turn-off signal to the base~ To this end, it has recently been the practice to provide an ~r~5~3G 36~SP-lOg2 interdigitated structure for power semiconductor devices and particularly for transistor semiconductor devices which structure provides a longer base-emitter,,turn-off line ., than is achievable with noninterdigitated structures, other considerations being the same. While the interdigitated structure provides many advantages over noninterdigitated devices, it is nevertheless not the ultimate attainable transistor device, at least with respect to switching speed.
During turn o~f of the power transistor of the type including an interdigitated emitter including a spine portion for ready connection of a wire lead capable of sustaining the high current flow to the control by the device and a plurality of finger portions extending from the spine portion, which finger portions are interdigitated with like finger portions of the base of the device, turn off generally proceeds by first removi~g carriers from the edges of the fingers which are most closely proximate the base of the device followed by restrickion of current flow to an area closer and closer to the center of the finger until ultimately complete turn off ~s achieved. It is inherent in this turn-off mechanism that as turn oif proceeds and the current flow is increasingly restricted to the center portion of the . emitter fingers, turn off becomes increasingly difficult.
This is due to the fact that the current density becomes higher and the distance from the base of the device becomes ,~ greater. This results in both a time delay preceding the , : onset of current reduction during turn off, and, a reduction in the turn-off speed during the time when current is :~ rapidly decreasing. The not-insubstantial increase in 3Q current density duxing th.e turn-o~f pxocess not only ~:
increases the difficulty of turn off of the device and decreases the speed thereof but, in addition, produces 36-SP-l,O g2 ..3~
yet another phenomenon, reverse second breakdown. As the current density increases, the electric field ln the device becomes more and more dominated by the effect of mobile charge carriers rather than by background charge levels. As w.ill be demonstrated below, the increase in mobile charge carriers during turn off results in greatly increased electric fields which in extreme cases cause the device to undergo reverse second breakdown.
It is an object of this invention to provide a ~ :
semiconductor device having improved switching speed over prior art devices.
It is another object of this invention to provide a power transistor capable of controlling substantial amounts of current at high voltages which is not only aster than has been heretofore possible but which, also, exhibits improved reverse second breakdown characteristics.
It is still another object of this inventi.on to provide an improved power transistor of the type discussed which is not substantially more expensive to manufacture than prior art devices.
Briefly stated and in accordance with a presently : pxeferred embodiment of this invention, a new-and improved, ~ high-speed,,switching tranststor is provided haYing a collector re~ion o~ a first conducti~ity type a base region : of a second conductivity type opposite said first ~ conductiYity type and forming a first p-n junction ~ith said collecior xegion, and an emitter region interdigitated with ; said base regi.on and includin~ a plurality of relatively . narrow finger portions extending rom a relati~ely w.ide spine - 30 portion to which a h.igh current capacity lead may he conveniently connected. The base layer, interposed between the emitter layer and the collector layer exhibits a first ~3~ 36-SP-1082 sheet resistance under most o~ the emitter layer and a second, lower, sheet resistance under certain portions of the emitter layer for promoting rapid turn o~f of those portions. In accordance with a specific preferred embodiment of this invention, the sheet resistance of the base layer underlying the center portion of each of the emitter fingers is selected to be relatively lower than the sheet resistance underlying the other portions of the fingers. In accordance with another preferred embodimen-t of this invention, the sheet resistance of the base layer underlying thé
relatively wider spine portion of the emitter region and especially the center of the spine portion is selected to ke lower than the sheet resistance underlying the periphery of the spine portion of the emitter~ In accordance with a presently preferred embodiment of this invention, this decxease in base-layer sheet resis-tance is provided by forming an emitter which has a first thickness, as measured from the surface of the device, in the area o~ the periphery of the em:itter fingers and in the area of the periphery of the spine portion of the emitter layer, and a second, reIati~ely shallower thickness in the center portion o~ the emitter fingers and of the spine portion of the emitter layer.
In accordance with an alternative embodiment of this in~ention, an emitter electrode is pro~ided which is spaced from the emitter layer of the device as, fox example, by an intermediate oxide layer, essentially only in the center portion of the emitter finger and in the center portion o~ the spine region of the emitter layer. In this way, self~debiasing occurs in the emitter underlyiny said spaced poxtions o~ the emitter electrodes, reduciny the yain of the device in these areas and consequently xeduciny current cro~ding.
~ ~ 36 ~P-1082 In accordance with each of these embodirnents of this invention, high current densit;.es hereto~ore associated with the restriction of current during turn off to the center portion of the interdigitated emitter fingers is alleviated; the electric fields associated therewith are reduced substantially and reverse, second breakdown characteristics of the device are enhanced.
The features of the invention which are believed to be novel are pointed out with particularity in the .
a~pended claims. The invention itself, however, both as to its organization and method of operation together ~ith further objects and advantages thereof may best be understood : by reference to the following description taken in connection with the accompanying drawings in which: :
Figure 1 is a graphical representation of the current and voltage signals of a transistor during turn off;
Figure 2 is a cross sectional view of a portion of a transistor ~n accordance wi-th the prior art;
.Figure 3 is a view similar to that of Figure 2 ~ 20 including a schematic representation o:~ the turn-off p.rocess;
:~ Figure 4 is a graphical representa-tion of the -~ electric fields in transistors for various current densities;
Figure 5 is a cross sectional view of a portion of a transisto~ according to this invention;
. ~igu~e 6 is a cross section view of a portion of. .
a transistor according to another embodiment of this invention;
Figure 7 i,s a cross section view of a portion of a transistor accoxdin~ to another embodiment of this . 30 invention;
Figures 8 and 9 are top ~iews o~ a poxtion of a transistor in accordance with two embodlments of this .' ' .
.
~ ~tj5~ 36-SP-10~2 invention.
Figure 1 is a graphical representa-tion of the collector current, collector-emitter voltage and base current in a transistor of the type to which this invention relates, during the turn-off portion of a device switching cycle, an inductive load being presumed. Each of the turn-off parameters is separately plotted on the same time scale so that -the interrelationship between the base drive signal and the collector current and voltage may be readily observed.
The wave forms of ~igure 1 are understood to be exemplary, but are, in fact, typical of the wave forms which might be observed in switching circuits as would be expected to be found in inverter circuitsO Several portions of the turn-off current wave form are of interest. Between the onset of the fall of base current and the beginning of the change in collector current and voltage, a time delay is observed which - is conventionally designated tsv. During this period, relatively little power is dissipated in the device since, although the collector current remains high, the collector-emitter voltaye remains low. ~fter this time, the collector-emitter voltage, VcE, starts to rise at a rapid rate while the collector current, Ic, remains above about 90~ of its l;
quiescent value. This period of relatively high IC and rising VcE is referred to as trV. During this period, substantial amounts of power must be dissipated by the device. Immediately after trV has elapsed, IC and VCE are both near their maximum values and during this period the maximum amount of power dissipation occurs. Shortly ater the collector-emitter voltage has reached its blocking 3Q level, IC begins to fall rapidly during the period designated tfi. During this time, substantial amounts of power, although less than during the time when IC and VCE
~ 6 --'`' ~ 36-SP-10~
are both high, ,are dissi~ated. 'rhe overall pe~iod ~rom the time when VcE increases to about 10% of its maximum value and the time when IC decreases to 10% of its maximum value is designated 'tc and is a time period during which substantially all of the power dissipation which occurs during turn off occurs. This time period may be as long as several microseconds even in switching transistors such as interdigitated switching transistors which are designed for high speed.
Figure 2 is a cross section view of a conventional interdigitated switching transistor ~t in accordance ~ith the prior art. The section of Figure 2 is taken through an - emitter finger 26 and shows the current densities under that finger during turn on. As the device turns on,,the ef~ect of the base current signal in debiasing the base emitter junction 25 is most pronounced near the center of the emitter ,' fingers closest to the base electrode. This causes a non-uniform current distribution under the emitter fln~er with relatively larger current flowing near the edges and less current in the center portion oE the fingers. As the de~ice turns on, charge is stored both in the base 24 and collector 22 regions 'of the device. The greater the magnitude of the ~ase drive signal, the more stored charges accumulate, especially,,in the collector region.
Figure 3 is a cross-section view of the same ~ structure as illustrated in ~igure 2 showing the turn-off~
'~ mechanism in a transistor of the type to which this invention is addressed~ Like elements of Figures,~ and 2 are designated with'like reference numerals. During turn off, minorit~ carriers under emitter Z6 are ~irst swept from beneath the ed~es o~ the emitter closest to base electrodes 28 by the application of a turn-of current signal to base ;
~ 5~ 36-SP-1082 electrodes 28. As the deviee ceases to conduet under the outer edges of emitter 26~ the current density underlying the center of emitter 26, where stored eharge is the most diffieult to remove, inereases as the emitter starts to inject more heavily in the center region, thus making up for the injection whieh has eeased to oceur at the emitter edges. In addition, the base turn-off signal tends to debias the edges of the formerly forward-biased base emitter junction, thus further eausing restrietion of eurrent flow to the eenter portion of the emitter.
As the collector current is restricted or pinched toward the center region of the emitter, the eurrent density increases dramatieally insofar as the eollector current remains relatively eonstant during the initial phases of turn off. This inerease in eurrent density manifests ` itself in -two phenomenis: the inereasing diffieulty in achieving eomplete turn off, and, in extreme eases, reverse second breakdown. Reverse seeond breakdown may be readily understood by referriny now to Figure ~ wherein the eleetric field proile for the eolleetor region and the two junctions adjaeent the eollector region of a transistor of the type illustrated in Figure 3 are shown. The maynitude of the eleetric field may be obtained from the relationship of dE _ q rYc - m~x dx ~ s qVl L _ wherein the magnitude of the electric field is seen to increase rapidly as the current dansity Jmax increases while the baekground eharye level Ne remains constant.
Figure 4 illustrates the eleetric field profiles in a colleetor for three values of eolleetor eurrent: eurve 30 where the eurrent density equals zero, corresponding to the ~,.,. ' . . .
36-SP-10~2 cutofE state; curve 32 where the current equals the ~uiescent `~ O~ ~ 5-f" f~' s~ collector current; and the curve 34 where the current density is greater than the steady state value, J0, and wherein the increase in electric ~ields at the n -n+
junction is readily observed.
It is a feature of this invention that not only is turn o~f facilitated by the improved emitter design but, in addition r reverse second breakdown is substantially eli~inated.
Referring now to Fi~ure 5, a cross sectional view similar to that of Figures 2 and 3 is shown including an ~:~
e~itter according to the instant invéntion. Emitter finger 40 includes relati~ely thicker portions 42 and 44 w,hich surround relati~ely thinner portion 46. The thickness of ~ase layer 48, ,collector layer 50, and collector contact layer 52 are relatively unchanged ~ith respect to the ~: , corresponding layers in Figures 2 and 3. Figure 5 indicates, by arrows r ,the current distribution duxing the initial pha~e of turn o~ as current ~lows from base electrodes 54 and 56 ~hich aXe understood to be connected in the conventional manner ~or an inte~digitated s~itching transistor. For , completeness, emitter electrode 58 and collector electrode ; 60 are also shown. ~s has been hereinabove described, the current during turn off is squeezed towards the center of ` emitter 40. The relati~ely shallower portion 46 of emitter 40 h.as lower injection ef~iciency and lower transport factor, resulting in lo~er ~ain,,and there~ore during turn off, essenti~ no current flows in that region as the current density is zero or quite low. Therefore, whereas in the 3~ pxiox art transistoX, injection increased towards the center o the de~ice as current was squeezed during turn o~f, in accoxdance ~ith thi:s inYention, the current density _ g _ ' 36-SP~lOS2 in the center of the emitter is lo~.
It is preferred that the thickness o~ region 46 be as low as possible. Where the emitter is formed by diffusion in t~o steps, it is recognized that arbitrarily thin regions are difficult to form and may lead to short~ng where the dif~usion is not completely uni~orm. It has been found that where the nominal emitter diffusion depth is to 10 to 20 microns a depth in region 46 of one to two micxons provides satisfactory resul-ts.
It will be recognized that pro~iding a relatively thinner emitter inner portion 46 is but one way of achieving that decreased injection efficiency which limits the amount - of current flo~ under the emitter of a transistor in accordance ~ith thiS invention. Other methods which reduce the base sheet resistance ln the center portion o~ the emitter are equally e~fectual to provide the'desired function.
Referring now to Figure 6, an alternate embodiment of this inVention is illustra-ted wherein emitter electrode ; 64 i~ spaced ~xom emi,tter 66 by oxide layer 68 in the center poxtion o~ the emitter. In this way, an emitter may he ~ormed ~ithout the necessit~ for a two-step dif~u$ion or similax process inso~ar as the emitter itsel~ is o$ unifoxm ~ , ' thickness, the decrease in injecti4n e~iciency bei,ng achieved by physicall~ spacing the eIectrode from the emitter and electrically isolatiny it at least in the center portion of the emitter. In all other respects,,the structure of Fiyure 6 is ident~cal to that o~ ~iguxe 5~
Referxing now to ~i~uXe 7, still another ' alternative embodiment of this invention is illustr~ted ; 30 ~herein the'inne~ portion o~ emitter 74 is o~ zexo thickness,,base la~er 70 te~minating at sur~ace 72. The device o~ Figure 7 represents the limitln~ case o~ the _J ~ t~
_1!"~t~ O,~
36 SP-lOg2 embodiment of th.is lnvention illustr~ted at Fi~uxe 5 and requires the addition of oxide layer 76 to preVent shorting of the base emitter junction by eIectrode 7~. It ~ill be appreciated that although emitter layer 74 appears in the section vie~ of Figure 7 as -t~o discrete regions the two outer portions of the emitter are connected not only by electrode 78 but are joined at the spine portion of the comb-shaped emitter structure as well as at the ends of the :
individual ingers. The base layex sheet resistance under the center portion of emitter 74 will be appreciated to be :
much less than under the edge portion of the emitter and further it will be readily obser~ed that the injection :
efficiency in the center portion where the emi,tter layer is completely absent will be essentially zero. Therefore, no current will flow in this center portion either durin~ turn on or turn o~
Figure 8 is a top view of a portion o~ a transistor in accordance with this in~ention wherein the emitter 80 includes a xegion 82 o~ xeIatively lowe:r injection ef~iciency essentially only under the spine portion of the comb-shaped emitter structure. It is under this relatiYely wide spine portion (w;th respect to the emitter fingers~
that tuxn o~f is most difficult and that, -therefore,,is primarily responsible for poor turn-off speed characteristics.
It has been ~ound, ,howevex, that with the further addition of regions 84 under the finger portions of the emitter as illustrated in ~igure 9, eVen fuxther improvement in swi.tchin~ speed and, therefore,,in device dissipation may be obtained.
Th.e improvements achieved by the new emitter structuxe o~ this invention are substantial. In a controlled device, the .fall time, tfi~ was foun.d to be as lony as .4 u/sec~, while in a device haviny the emitter structure o~ this invention, the fall time o the collector current was on the order o~ 0.1 u/sec. The improvement in storage time, tsi, is likewise improved with the new emitter structure. During the storage time, carrier removal is, at least in part, aided by minority carrier recombination During the period when current is falling, the ra-te of minority carrier removal is almost entirely dependent upon base current and is therefore greatly improved in accordance with the new structure.
By far, the most important measure of device performance is power dissipation during switching. A
readily observed parameter indicative of switching loss is the change in temperature o the device during s~itching.
Devices in accordance with the emitter construction of this invention have been found -to exhibit improvements in power dissipation of at least three times over prior art devices and improvements in reverse bias safe operatiny areas in excess o~ lO~. The following table compares the characteristias o~ a prior art control device and a device according to the instant invention.
_ _ . ~ _ ~ ~ ~ ~ ~ ~ ~ _ ~ B V~Eo Device lHA~e~V ' 5HA~5eV lOA~V ~ 2~ 250V ( c) (Volts) , _ _ Control 35 28 15.8 2.9 .4 rlsing 551 ~ New Emitter .. Structure 29 25 15 2.2 .1 33 578 ~; While this invention has been described in ; accordance with several preferred embodiments therebf, it ~¦ will be appreciated b~ those skilled in the art that many ;` 30 modi~ications and chan~es ma~ be made herein ~lithout ~; deviating ~rom the true spirit and scope of the invention.
~or example, ~hile several methods for forming a two-level ~ 12 -~'t ~ SP-~082 emitter has been described ~herein di~usion is employed, it will be appreciated that other methods are applicable, For example~ the thicker portions of the emitter may be formed by diffusion while the center portions are formed by ion implanation or the like. Accordingly, it is intended that the scope of the invention be limited only by the appended claims.
;
A particularly important characteristic in devices which are employed as solid state switches is that the speed of switching be as rapid as possible. This is due to the greatly increased power dissipation which is the result of low switching speed. ~ncreased power dissipation results in poor device performance, the requirement for large heat sinks, and the use of larger and more expensive devices for the same application than would be required were higher switching speed provided to reduce power dissipation to a minimum.
In general, ~.he greatest contribution ko power dissipation in switching semiconductor devices is made during the turn-off rather than the turn-on period. This is due to the fact that, during turn off, device current typically remains at its quiescent value during at least a portion of the time that devlce voltage is increasing from a low saturation state value to a high blocking state value.
During this period, substantial power may be dissipated by the device. It is advantageous, therefore, to provide a switching transistor in which the current through device begins to decrease rapidly as soon as possible after the application of a turn-off signal to the base~ To this end, it has recently been the practice to provide an ~r~5~3G 36~SP-lOg2 interdigitated structure for power semiconductor devices and particularly for transistor semiconductor devices which structure provides a longer base-emitter,,turn-off line ., than is achievable with noninterdigitated structures, other considerations being the same. While the interdigitated structure provides many advantages over noninterdigitated devices, it is nevertheless not the ultimate attainable transistor device, at least with respect to switching speed.
During turn o~f of the power transistor of the type including an interdigitated emitter including a spine portion for ready connection of a wire lead capable of sustaining the high current flow to the control by the device and a plurality of finger portions extending from the spine portion, which finger portions are interdigitated with like finger portions of the base of the device, turn off generally proceeds by first removi~g carriers from the edges of the fingers which are most closely proximate the base of the device followed by restrickion of current flow to an area closer and closer to the center of the finger until ultimately complete turn off ~s achieved. It is inherent in this turn-off mechanism that as turn oif proceeds and the current flow is increasingly restricted to the center portion of the . emitter fingers, turn off becomes increasingly difficult.
This is due to the fact that the current density becomes higher and the distance from the base of the device becomes ,~ greater. This results in both a time delay preceding the , : onset of current reduction during turn off, and, a reduction in the turn-off speed during the time when current is :~ rapidly decreasing. The not-insubstantial increase in 3Q current density duxing th.e turn-o~f pxocess not only ~:
increases the difficulty of turn off of the device and decreases the speed thereof but, in addition, produces 36-SP-l,O g2 ..3~
yet another phenomenon, reverse second breakdown. As the current density increases, the electric field ln the device becomes more and more dominated by the effect of mobile charge carriers rather than by background charge levels. As w.ill be demonstrated below, the increase in mobile charge carriers during turn off results in greatly increased electric fields which in extreme cases cause the device to undergo reverse second breakdown.
It is an object of this invention to provide a ~ :
semiconductor device having improved switching speed over prior art devices.
It is another object of this invention to provide a power transistor capable of controlling substantial amounts of current at high voltages which is not only aster than has been heretofore possible but which, also, exhibits improved reverse second breakdown characteristics.
It is still another object of this inventi.on to provide an improved power transistor of the type discussed which is not substantially more expensive to manufacture than prior art devices.
Briefly stated and in accordance with a presently : pxeferred embodiment of this invention, a new-and improved, ~ high-speed,,switching tranststor is provided haYing a collector re~ion o~ a first conducti~ity type a base region : of a second conductivity type opposite said first ~ conductiYity type and forming a first p-n junction ~ith said collecior xegion, and an emitter region interdigitated with ; said base regi.on and includin~ a plurality of relatively . narrow finger portions extending rom a relati~ely w.ide spine - 30 portion to which a h.igh current capacity lead may he conveniently connected. The base layer, interposed between the emitter layer and the collector layer exhibits a first ~3~ 36-SP-1082 sheet resistance under most o~ the emitter layer and a second, lower, sheet resistance under certain portions of the emitter layer for promoting rapid turn o~f of those portions. In accordance with a specific preferred embodiment of this invention, the sheet resistance of the base layer underlying the center portion of each of the emitter fingers is selected to be relatively lower than the sheet resistance underlying the other portions of the fingers. In accordance with another preferred embodimen-t of this invention, the sheet resistance of the base layer underlying thé
relatively wider spine portion of the emitter region and especially the center of the spine portion is selected to ke lower than the sheet resistance underlying the periphery of the spine portion of the emitter~ In accordance with a presently preferred embodiment of this invention, this decxease in base-layer sheet resis-tance is provided by forming an emitter which has a first thickness, as measured from the surface of the device, in the area o~ the periphery of the em:itter fingers and in the area of the periphery of the spine portion of the emitter layer, and a second, reIati~ely shallower thickness in the center portion o~ the emitter fingers and of the spine portion of the emitter layer.
In accordance with an alternative embodiment of this in~ention, an emitter electrode is pro~ided which is spaced from the emitter layer of the device as, fox example, by an intermediate oxide layer, essentially only in the center portion of the emitter finger and in the center portion o~ the spine region of the emitter layer. In this way, self~debiasing occurs in the emitter underlyiny said spaced poxtions o~ the emitter electrodes, reduciny the yain of the device in these areas and consequently xeduciny current cro~ding.
~ ~ 36 ~P-1082 In accordance with each of these embodirnents of this invention, high current densit;.es hereto~ore associated with the restriction of current during turn off to the center portion of the interdigitated emitter fingers is alleviated; the electric fields associated therewith are reduced substantially and reverse, second breakdown characteristics of the device are enhanced.
The features of the invention which are believed to be novel are pointed out with particularity in the .
a~pended claims. The invention itself, however, both as to its organization and method of operation together ~ith further objects and advantages thereof may best be understood : by reference to the following description taken in connection with the accompanying drawings in which: :
Figure 1 is a graphical representation of the current and voltage signals of a transistor during turn off;
Figure 2 is a cross sectional view of a portion of a transistor ~n accordance wi-th the prior art;
.Figure 3 is a view similar to that of Figure 2 ~ 20 including a schematic representation o:~ the turn-off p.rocess;
:~ Figure 4 is a graphical representa-tion of the -~ electric fields in transistors for various current densities;
Figure 5 is a cross sectional view of a portion of a transisto~ according to this invention;
. ~igu~e 6 is a cross section view of a portion of. .
a transistor according to another embodiment of this invention;
Figure 7 i,s a cross section view of a portion of a transistor accoxdin~ to another embodiment of this . 30 invention;
Figures 8 and 9 are top ~iews o~ a poxtion of a transistor in accordance with two embodlments of this .' ' .
.
~ ~tj5~ 36-SP-10~2 invention.
Figure 1 is a graphical representa-tion of the collector current, collector-emitter voltage and base current in a transistor of the type to which this invention relates, during the turn-off portion of a device switching cycle, an inductive load being presumed. Each of the turn-off parameters is separately plotted on the same time scale so that -the interrelationship between the base drive signal and the collector current and voltage may be readily observed.
The wave forms of ~igure 1 are understood to be exemplary, but are, in fact, typical of the wave forms which might be observed in switching circuits as would be expected to be found in inverter circuitsO Several portions of the turn-off current wave form are of interest. Between the onset of the fall of base current and the beginning of the change in collector current and voltage, a time delay is observed which - is conventionally designated tsv. During this period, relatively little power is dissipated in the device since, although the collector current remains high, the collector-emitter voltaye remains low. ~fter this time, the collector-emitter voltage, VcE, starts to rise at a rapid rate while the collector current, Ic, remains above about 90~ of its l;
quiescent value. This period of relatively high IC and rising VcE is referred to as trV. During this period, substantial amounts of power must be dissipated by the device. Immediately after trV has elapsed, IC and VCE are both near their maximum values and during this period the maximum amount of power dissipation occurs. Shortly ater the collector-emitter voltage has reached its blocking 3Q level, IC begins to fall rapidly during the period designated tfi. During this time, substantial amounts of power, although less than during the time when IC and VCE
~ 6 --'`' ~ 36-SP-10~
are both high, ,are dissi~ated. 'rhe overall pe~iod ~rom the time when VcE increases to about 10% of its maximum value and the time when IC decreases to 10% of its maximum value is designated 'tc and is a time period during which substantially all of the power dissipation which occurs during turn off occurs. This time period may be as long as several microseconds even in switching transistors such as interdigitated switching transistors which are designed for high speed.
Figure 2 is a cross section view of a conventional interdigitated switching transistor ~t in accordance ~ith the prior art. The section of Figure 2 is taken through an - emitter finger 26 and shows the current densities under that finger during turn on. As the device turns on,,the ef~ect of the base current signal in debiasing the base emitter junction 25 is most pronounced near the center of the emitter ,' fingers closest to the base electrode. This causes a non-uniform current distribution under the emitter fln~er with relatively larger current flowing near the edges and less current in the center portion oE the fingers. As the de~ice turns on, charge is stored both in the base 24 and collector 22 regions 'of the device. The greater the magnitude of the ~ase drive signal, the more stored charges accumulate, especially,,in the collector region.
Figure 3 is a cross-section view of the same ~ structure as illustrated in ~igure 2 showing the turn-off~
'~ mechanism in a transistor of the type to which this invention is addressed~ Like elements of Figures,~ and 2 are designated with'like reference numerals. During turn off, minorit~ carriers under emitter Z6 are ~irst swept from beneath the ed~es o~ the emitter closest to base electrodes 28 by the application of a turn-of current signal to base ;
~ 5~ 36-SP-1082 electrodes 28. As the deviee ceases to conduet under the outer edges of emitter 26~ the current density underlying the center of emitter 26, where stored eharge is the most diffieult to remove, inereases as the emitter starts to inject more heavily in the center region, thus making up for the injection whieh has eeased to oceur at the emitter edges. In addition, the base turn-off signal tends to debias the edges of the formerly forward-biased base emitter junction, thus further eausing restrietion of eurrent flow to the eenter portion of the emitter.
As the collector current is restricted or pinched toward the center region of the emitter, the eurrent density increases dramatieally insofar as the eollector current remains relatively eonstant during the initial phases of turn off. This inerease in eurrent density manifests ` itself in -two phenomenis: the inereasing diffieulty in achieving eomplete turn off, and, in extreme eases, reverse second breakdown. Reverse seeond breakdown may be readily understood by referriny now to Figure ~ wherein the eleetric field proile for the eolleetor region and the two junctions adjaeent the eollector region of a transistor of the type illustrated in Figure 3 are shown. The maynitude of the eleetric field may be obtained from the relationship of dE _ q rYc - m~x dx ~ s qVl L _ wherein the magnitude of the electric field is seen to increase rapidly as the current dansity Jmax increases while the baekground eharye level Ne remains constant.
Figure 4 illustrates the eleetric field profiles in a colleetor for three values of eolleetor eurrent: eurve 30 where the eurrent density equals zero, corresponding to the ~,.,. ' . . .
36-SP-10~2 cutofE state; curve 32 where the current equals the ~uiescent `~ O~ ~ 5-f" f~' s~ collector current; and the curve 34 where the current density is greater than the steady state value, J0, and wherein the increase in electric ~ields at the n -n+
junction is readily observed.
It is a feature of this invention that not only is turn o~f facilitated by the improved emitter design but, in addition r reverse second breakdown is substantially eli~inated.
Referring now to Fi~ure 5, a cross sectional view similar to that of Figures 2 and 3 is shown including an ~:~
e~itter according to the instant invéntion. Emitter finger 40 includes relati~ely thicker portions 42 and 44 w,hich surround relati~ely thinner portion 46. The thickness of ~ase layer 48, ,collector layer 50, and collector contact layer 52 are relatively unchanged ~ith respect to the ~: , corresponding layers in Figures 2 and 3. Figure 5 indicates, by arrows r ,the current distribution duxing the initial pha~e of turn o~ as current ~lows from base electrodes 54 and 56 ~hich aXe understood to be connected in the conventional manner ~or an inte~digitated s~itching transistor. For , completeness, emitter electrode 58 and collector electrode ; 60 are also shown. ~s has been hereinabove described, the current during turn off is squeezed towards the center of ` emitter 40. The relati~ely shallower portion 46 of emitter 40 h.as lower injection ef~iciency and lower transport factor, resulting in lo~er ~ain,,and there~ore during turn off, essenti~ no current flows in that region as the current density is zero or quite low. Therefore, whereas in the 3~ pxiox art transistoX, injection increased towards the center o the de~ice as current was squeezed during turn o~f, in accoxdance ~ith thi:s inYention, the current density _ g _ ' 36-SP~lOS2 in the center of the emitter is lo~.
It is preferred that the thickness o~ region 46 be as low as possible. Where the emitter is formed by diffusion in t~o steps, it is recognized that arbitrarily thin regions are difficult to form and may lead to short~ng where the dif~usion is not completely uni~orm. It has been found that where the nominal emitter diffusion depth is to 10 to 20 microns a depth in region 46 of one to two micxons provides satisfactory resul-ts.
It will be recognized that pro~iding a relatively thinner emitter inner portion 46 is but one way of achieving that decreased injection efficiency which limits the amount - of current flo~ under the emitter of a transistor in accordance ~ith thiS invention. Other methods which reduce the base sheet resistance ln the center portion o~ the emitter are equally e~fectual to provide the'desired function.
Referring now to Figure 6, an alternate embodiment of this inVention is illustra-ted wherein emitter electrode ; 64 i~ spaced ~xom emi,tter 66 by oxide layer 68 in the center poxtion o~ the emitter. In this way, an emitter may he ~ormed ~ithout the necessit~ for a two-step dif~u$ion or similax process inso~ar as the emitter itsel~ is o$ unifoxm ~ , ' thickness, the decrease in injecti4n e~iciency bei,ng achieved by physicall~ spacing the eIectrode from the emitter and electrically isolatiny it at least in the center portion of the emitter. In all other respects,,the structure of Fiyure 6 is ident~cal to that o~ ~iguxe 5~
Referxing now to ~i~uXe 7, still another ' alternative embodiment of this invention is illustr~ted ; 30 ~herein the'inne~ portion o~ emitter 74 is o~ zexo thickness,,base la~er 70 te~minating at sur~ace 72. The device o~ Figure 7 represents the limitln~ case o~ the _J ~ t~
_1!"~t~ O,~
36 SP-lOg2 embodiment of th.is lnvention illustr~ted at Fi~uxe 5 and requires the addition of oxide layer 76 to preVent shorting of the base emitter junction by eIectrode 7~. It ~ill be appreciated that although emitter layer 74 appears in the section vie~ of Figure 7 as -t~o discrete regions the two outer portions of the emitter are connected not only by electrode 78 but are joined at the spine portion of the comb-shaped emitter structure as well as at the ends of the :
individual ingers. The base layex sheet resistance under the center portion of emitter 74 will be appreciated to be :
much less than under the edge portion of the emitter and further it will be readily obser~ed that the injection :
efficiency in the center portion where the emi,tter layer is completely absent will be essentially zero. Therefore, no current will flow in this center portion either durin~ turn on or turn o~
Figure 8 is a top view of a portion o~ a transistor in accordance with this in~ention wherein the emitter 80 includes a xegion 82 o~ xeIatively lowe:r injection ef~iciency essentially only under the spine portion of the comb-shaped emitter structure. It is under this relatiYely wide spine portion (w;th respect to the emitter fingers~
that tuxn o~f is most difficult and that, -therefore,,is primarily responsible for poor turn-off speed characteristics.
It has been ~ound, ,howevex, that with the further addition of regions 84 under the finger portions of the emitter as illustrated in ~igure 9, eVen fuxther improvement in swi.tchin~ speed and, therefore,,in device dissipation may be obtained.
Th.e improvements achieved by the new emitter structuxe o~ this invention are substantial. In a controlled device, the .fall time, tfi~ was foun.d to be as lony as .4 u/sec~, while in a device haviny the emitter structure o~ this invention, the fall time o the collector current was on the order o~ 0.1 u/sec. The improvement in storage time, tsi, is likewise improved with the new emitter structure. During the storage time, carrier removal is, at least in part, aided by minority carrier recombination During the period when current is falling, the ra-te of minority carrier removal is almost entirely dependent upon base current and is therefore greatly improved in accordance with the new structure.
By far, the most important measure of device performance is power dissipation during switching. A
readily observed parameter indicative of switching loss is the change in temperature o the device during s~itching.
Devices in accordance with the emitter construction of this invention have been found -to exhibit improvements in power dissipation of at least three times over prior art devices and improvements in reverse bias safe operatiny areas in excess o~ lO~. The following table compares the characteristias o~ a prior art control device and a device according to the instant invention.
_ _ . ~ _ ~ ~ ~ ~ ~ ~ ~ _ ~ B V~Eo Device lHA~e~V ' 5HA~5eV lOA~V ~ 2~ 250V ( c) (Volts) , _ _ Control 35 28 15.8 2.9 .4 rlsing 551 ~ New Emitter .. Structure 29 25 15 2.2 .1 33 578 ~; While this invention has been described in ; accordance with several preferred embodiments therebf, it ~¦ will be appreciated b~ those skilled in the art that many ;` 30 modi~ications and chan~es ma~ be made herein ~lithout ~; deviating ~rom the true spirit and scope of the invention.
~or example, ~hile several methods for forming a two-level ~ 12 -~'t ~ SP-~082 emitter has been described ~herein di~usion is employed, it will be appreciated that other methods are applicable, For example~ the thicker portions of the emitter may be formed by diffusion while the center portions are formed by ion implanation or the like. Accordingly, it is intended that the scope of the invention be limited only by the appended claims.
;
Claims
1. In a semiconductor switching transistor constituted by a semiconductor body having a major face inset into which is a comb-shaped emitter region including a longitudinal spine portion from which laterally extends a plurality of finger portions arranged for interdigitation with a base region, said emitter region being arranged to define with the base region a PN junction terminating in said major face, the improvement for increasing switching speed comprising said emitter spine portion and emitter finger portions having edge portions connected to form a continuous peripheral portion extending from said major face into said semiconductor body to a termination at said PN junction at a first depth below said major face, said emitter spine portion and emitter finger portions further having a common interior portion bordered by said peripheral portion and extending from said major face into said semiconductor body to a termination with said PN junction at a second depth below said major face less than said first depth, and an emitter electrode directly contacting said major face over the entirety of said interior portion and part of said peripheral portion.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US92645078A | 1978-07-20 | 1978-07-20 | |
| US926,450 | 1978-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1155236A true CA1155236A (en) | 1983-10-11 |
Family
ID=25453225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000331749A Expired CA1155236A (en) | 1978-07-20 | 1979-07-13 | Transistor having improved turn-off time and second breakdown characteristics |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS5522892A (en) |
| CA (1) | CA1155236A (en) |
| DE (1) | DE2929133C2 (en) |
| FR (1) | FR2438341A1 (en) |
| GB (1) | GB2026236B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0064614B1 (en) * | 1981-04-30 | 1987-09-16 | Kabushiki Kaisha Toshiba | Improved emitter structure for semiconductor devices |
| JPS589369A (en) * | 1981-07-08 | 1983-01-19 | Matsushita Electronics Corp | Transistor |
| JPS5818964A (en) * | 1981-07-28 | 1983-02-03 | Fujitsu Ltd | Semiconductor device |
| US4460913A (en) * | 1981-10-30 | 1984-07-17 | Rca Corporation | Fast switching transistor |
| FR2528233A1 (en) * | 1982-06-08 | 1983-12-09 | Thomson Csf | TRANSMITTER FINGER STRUCTURE IN A SWITCHING TRANSISTOR |
| JPS6457752A (en) * | 1987-08-28 | 1989-03-06 | Nec Corp | Semiconductor device |
| KR970024275A (en) * | 1995-10-10 | 1997-05-30 | 김광호 | Transistor with increased safe operating area and manufacturing method thereof |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3300694A (en) * | 1962-12-20 | 1967-01-24 | Westinghouse Electric Corp | Semiconductor controlled rectifier with firing pin portion on emitter |
| FR1519530A (en) * | 1965-03-17 | 1968-04-05 | Rca Corp | Semiconductor device |
| DE1514008B2 (en) * | 1965-04-22 | 1972-12-07 | Deutsche Itt Industries Gmbh, 7800 Freiburg | AREA TRANSISTOR |
| US3347720A (en) * | 1965-10-21 | 1967-10-17 | Bendix Corp | Method of forming a semiconductor by masking and diffusion |
| FR2374743A1 (en) * | 1976-12-20 | 1978-07-13 | Radiotechnique Compelec | MULTI-LAYER TRANSISTOR WITH COMPOUND EMITTER |
-
1979
- 1979-06-26 GB GB7922191A patent/GB2026236B/en not_active Expired
- 1979-07-13 CA CA000331749A patent/CA1155236A/en not_active Expired
- 1979-07-17 JP JP8994379A patent/JPS5522892A/en active Pending
- 1979-07-19 DE DE19792929133 patent/DE2929133C2/en not_active Expired
- 1979-07-19 FR FR7918682A patent/FR2438341A1/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| GB2026236B (en) | 1983-02-02 |
| JPS5522892A (en) | 1980-02-18 |
| FR2438341B1 (en) | 1984-01-27 |
| GB2026236A (en) | 1980-01-30 |
| DE2929133C2 (en) | 1987-05-14 |
| DE2929133A1 (en) | 1980-01-31 |
| FR2438341A1 (en) | 1980-04-30 |
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