CA1136282A - Dispositif de correction d'erreurs de decalage - Google Patents
Dispositif de correction d'erreurs de decalageInfo
- Publication number
- CA1136282A CA1136282A CA000326658A CA326658A CA1136282A CA 1136282 A CA1136282 A CA 1136282A CA 000326658 A CA000326658 A CA 000326658A CA 326658 A CA326658 A CA 326658A CA 1136282 A CA1136282 A CA 1136282A
- Authority
- CA
- Canada
- Prior art keywords
- data
- error
- data group
- memory
- instruction buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Detection And Correction Of Errors (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US93096578A | 1978-08-04 | 1978-08-04 | |
| US930,965 | 1978-08-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1136282A true CA1136282A (fr) | 1982-11-23 |
Family
ID=25460026
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000326658A Expired CA1136282A (fr) | 1978-08-04 | 1979-04-30 | Dispositif de correction d'erreurs de decalage |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JPS5525193A (fr) |
| AU (1) | AU529131B2 (fr) |
| CA (1) | CA1136282A (fr) |
| DE (1) | DE2915159A1 (fr) |
| FR (1) | FR2432738A1 (fr) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5245846A (en) * | 1975-10-08 | 1977-04-11 | Fujitsu Ltd | Error correction detection system |
| US4058851A (en) * | 1976-10-18 | 1977-11-15 | Sperry Rand Corporation | Conditional bypass of error correction for dual memory access time selection |
| JPS5447540A (en) * | 1977-09-22 | 1979-04-14 | Hitachi Ltd | Fault correction system for control memory |
| IT1089225B (it) * | 1977-12-23 | 1985-06-18 | Honeywell Inf Systems | Memoria con dispositivo rivelatore e correttore a intervento selettivo |
-
1979
- 1979-04-12 DE DE19792915159 patent/DE2915159A1/de active Granted
- 1979-04-30 CA CA000326658A patent/CA1136282A/fr not_active Expired
- 1979-06-14 JP JP7515579A patent/JPS5525193A/ja active Pending
- 1979-07-20 AU AU49118/79A patent/AU529131B2/en not_active Ceased
- 1979-07-30 FR FR7919606A patent/FR2432738A1/fr not_active Withdrawn
Also Published As
| Publication number | Publication date |
|---|---|
| AU4911879A (en) | 1980-02-07 |
| FR2432738A1 (fr) | 1980-02-29 |
| DE2915159A1 (de) | 1980-02-21 |
| DE2915159C2 (fr) | 1989-01-05 |
| AU529131B2 (en) | 1983-05-26 |
| JPS5525193A (en) | 1980-02-22 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |