CA1135812A - Train vehicle control microprocessor power reset - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE
There is disclosed a passenger vehicle operation control apparatus and method including program microproces-sor control apparatus for providing a dynamic output signal when the microprocessor completes a predetermined main computer control program subroutine and this dynamic output signal operates with a hardware logic circuit apparatus including a timing circuit such that a repetition rate in excess of that required to keep the timing circuit reset is required, otherwise the computer control program is reini-tialized.

Description

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CROSS-REFERENCE TO RELATED APPLICATIONS
The present application is related to the following Canadian applications ~hich are assigned to the same assignee as the present application:
lo Canadian Serial No. 315,162 fi:led on October 319 1978 by L~ W. Anderson and A~ P. Sahasrabudhe and entitled 'ISpeed Maintaining Control Of Passenger Vehicles";

2. Canadian Serial No~ 315,572 ~iled on Ootober 31, 1978 by Do L. Rush and entitled "Program Stop Control 0~ Train :~
Vehicles";

3. Canadian Serial No. 315,154 filed on October 319 1978 by D. LD Rush, L. W. ~nderson and MD P~ McDonald and entitled "~peed Decoding And Speed Error Determining Con~rol Apparatus And Method",

4. Canadian Serial No~ 315,576 ~iled on October 31, 1978 by M~ P. MoDonald, T. D. Clark and R. H~ Perry and entitled "Train Vehicle Control Multiplex Train Line'l;

5. Canadian Serial Noi 315,161 filed on October 319 1978 by D. Lo Rush and J. K. Kapadia and entitled "Door Control For Train Vehicles"; and

6. Canadi~n Serial No~ 315 9 337 ~iled on October 31, 1978 by D. L. Rush and A. P. Sahasrabudhe and entitled "Desired Velocity Control For Passenger Vehicles'l.
GRo~D Dr X lNV3NTION
~he present invention relates to the automatic 3L~ 3~
2- L~7 j 926 control of pas~enger vehicles, such as mass trans~t vehicles or the ll~e, an~ inoluding speed control and ~speed mainten~
ance while moving along a track, precise stopping of the vehicles in relation to passenger loading and unloading stations and the operation of the vehiole doors~
In an article entitled the BARTD Train Control System published in Railway Signaling ~nd Co~munications for December 1967 at pages 18 to 23, ~the train control system for the San Francisco Bay Area Rapid Transit District is 10 described~ Other articles relating to the same train con-;
trol system were published in the IEEE Transaction~ ~n Cor~munication Technology for June 1968 at pages 369 to 3749 in Railway Signaling and Communications ~or July 1969 at pages 27 to 38, in the Westinghouse Engineer for March 1970 at pages 51 to 54, in the Westinghouse Engineer for July ~: ~
1972 at pages 98 to 103, and in the Westlnghouse Engineer ~-for September 1972 at pages 145 -to 151~ A general descrip~
~. ~
tion o~ the train control syste~ to be provided ~or the East-West llne of the Sao Paulo Brazil Metro is provided in 20 an article published ln IAS 1977 Annual o~ the I~EE Industr~
~pplications Society at pages 1105 to llQ9~
It i~ known in the prio~ art to provide a periodic signal responsive apparatus for oontrolling the energlzation of an oscillator as described in U~S. Patent No~ 3,842,33 issued October 14, 1974 to JO H, Fr~n~ Jr.
A general description of the microprocessor~ ~nd the rela ted peripheral devices is pro~ided in the Intel 80~0 Microcomputer System~ User~ Manual currently available ~rom Intel Corp~ Santa Clara, California 950510 ,3~
~7, 926 ~3-~
SUMMARY OF THE LNV_NTIO
An improved passenger vehicle opera.tion control apparatus and method are provided ~or controlling the vehicle in relation to provided vehicle control programs with at least one microprocessor operatlng with those control programs. Each microprocessor includes a main computer control program that includes the provision o~ a dynamic output toggle signal each time the main computer control program is properly executed, and is operative with a dis~
crete hardware logic circuit responsive to the occurrence o.
that output toggle signal at a repetition rate in excess of a predetermined reset rate and if said repetition rate falls ~s ~ below that predetermined reset rate -~e to a power supply failure or signal noise interference or the like disturbance, the main control program is reinitialized and the computer is reset as though a power supply failure had occurredO
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a schematic showing o~ the passenger vehicle system operative wlth the present control apparatus, Figure 2 illustrates the flow chart for the micro~
processor CPUl main control program provided for operation `;.
with the vehicle control programs as interrupts~
Figure 3 illustrates the flow chart for the micro processor CPU2 main computer control program for operation with the vehicle control programs as interrupts;
Figure 4 illustrates the here described main com-puter control program reset operation for each of two control computers operative with a passenger vehicle, and Figure 5 shows the hardware logic circuit provided to respond to the microprocessor output toggle signal o~

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3~
47,926 -4~
each microprocessor CPU1 and CPU2.
DESCRIPTION OF A_PREFERRED EMBODIMENT
As shown in Figure 1~ the central control system ~1 1009 whlch is usually located in a headquarters building or the llke~ receives in~ormation about the transit system and individual vehicle train operation to apply desired perform-ance adjustments to the individual vehicle trains. The central control supervises the schedulesg spacing and rout~
ing of the train vehlcles. The passenger loading and unload-10ing stations 112~ 114 and so ~orth are provided to operate with the central control 100 as desired ~or any particular transit system. The wayside equipment 116, including track clrcuits and antennae, is located along the vehicle track between the stations and is provided to convey informakion in relation to the passenger vehicles passing along the track. A train 118 is shown including four vehicle cars in the arrangement of an A type car at each end o~ the train with intermediate B type cars. The train control apparatus ]20 carried by the ~ront A type car 121 o~ the train 118 is shown in greater detail in the phantom showing 120 t 0,~ the front car 121. The train control modules 124 in the train control apparatus 120' include the program stop receiver module, the speed code receiver module~ the vital interlock board, power supplies and all the modules required to inter ~ace with the other equipment carried hy the train vehicle 121. Information is sent in relation to the input/output modules 125 and the microprocessor computers 126~ 127 and 128. There is a direct communication link through the input/output modules 125 between the CPUl computer 126 and -the CPU2 computer 127, There is a direct communication link 3~
l7g926 ~rom the CPUl computer 126 to the multiplex traln l:lne MTL
CPU computer 128. A similar traln control apparatus 122 is provlded ~or the rear car 123. The ~ront car 121 and the rear car 123 are connected together t,hrough well-known train lines, which go through the couplers and the tndividual train vehicles. The multiplex train line connected between the frQnt multiplex CPU 128 and the rear multiple~ CPU 129 is one pair o~ lines in the train line.
In ~igure 2, there is shown the flow charts for the microprocessor computer CPUl. This main cont,rol program for the computer CPUl calls the vehicle control program subroutines and then comes back and repeats itself by operW
ating in a circle. The vehicle control programs as des-cribed in the above cross-re~erenced'patent applications work on an lnterrupt basis and are totally lndependent ~rom this main computer control program. The CPUl maln control program shown ln Figure 2 ls entered in two places. At block 200 one of a zero interrupt or a seven interrupt will enter the program as though a power OFF followed by a power ON sltuation had occurred. Anytime the CPUl power comes on, the computer operation starts in location 0 and goes through this main control program to initialize the system and start the control system running. Block 200 can be entered in two oases. One is when the power comes on and the ot,her one is from restart 7 instruction, which is e~ecuted ~.n the computer -when the program gets lost ~or some reason and a fault occurs, to reinitialize the program and start over. At block 202 any previous lnterrupts are disabled since the computer wants to know the present state of the ~ehlcle control system operation. At block 204 the stack pointer is .. . . .
.

.~ ~ 35 ~ ~ ~
-~ L~7,926 set u.p; this i.s a hardware register which keeps track of the interx~lpt and 3um~ locatlons, and at block 704 se~s it t~ a.n i~itial location -to know exactly ~here the counter i50 At block 206 selected P~A~I memory locations are cleared. At, block 208 af-ter the computer con-trol system has been do~n, it is desirecl to set an initial and kno~n pattern o~ opera- ;
tion, so block 208 presets initial condltions that should get out to -the train vehicle control operation as .~as-t as possible; for example, the vehicle re~erence velocity ~,s set ; .
to zero, and ~or eve~y output port shown in Fi~lres 4 and 5 o~ above-referenced Canadian application Serial No, 315,572~
a predetermined b.it pa-ttern which is the determ~ned best case is provided by sequentially going through the storage t~bles and provlding this known ou~put to ever~ output port. ~lock 210 clears out and initializes the interrupt system and gets it ready to go. Thuslyg blocks 200 through 210 lnitlalize the vehicle control system~ Block 212 enables the interrupts;
so the next interrupt received~ such as a speed code in-terrupt wlll be serviced. The main computer co~trol p~ogramJ which ~:
20 is jus-t a series o~ callsJ has been started, Block 214 calls MONT, which i5 the monitor program; and lt is shown on the side at bloc~ 216 to monitor the switches on the front ~ :
panel~ A location can be set up in memory to monitor or look at this program and display the contents of that loca-tionJ As soon as the monitor progra~ 216 is finished? a retu ~ îs made to the main pro~ram~ Block 218 calls TRDY, ~;
which routine at ~lock 220 does two things~ First 9 it clears the reset toggle bit by se-tt~ng it to O and sending it bU-t; and the nex~ part 222 of the s~me rout~ne does the ~"
30 train ready ~unction ~hioh indicates the ~ehîcle control 117~926

-7-system is ready ~or a new train dest:lrlation from the wayside.
The correspondlng memor~ location is zero and the ID system can now put a new number in that locationO It should be noted that the ID system that has actually operated ~or over two years in Sao Paulo, Brazil will provide the desired new destination code in~ormation for this purpose. Block 220 is specifically oriented towards this main computer control program by clearing the bit and sending out the zero; and block 222 ls doing the train ready function. Block 224 calls INSTR, which is a miscellaneous input and store routine to go out and bring in some bits and store them in ~~
known locations. Block 224 provides a call and block 226 provides the action. Block 228 calls ANUNl, or the annun-ciator routine, which lights the lights on the annunciator panel 1 in block 230 and at block 232 sets and outputs the reset toggle bit and then it returns to block 228. Block 234 calls the diagnostic program; and block 236 comprises the individual diagnostic programs that may be provided.
There are several well known prior art programs that could be used for dlagnostic purpose here to diagnose the oper-ating state o~ the train vehicle and the vehicle control system. For example, the diagnostic programs can check the antennas, check ramps and check selected power levels. The anntenna check is in relation to each antenna hanging at the ends of the train vehicle where a wire is placed around each antenna and a voltage is supplied to that wire with a check made to establish that the circuit is conkinuous and the antenna has not ~allen of~ the vehicle.
For the voltages thak are considered to be reason~
ably critical a each voltage is measured and brought in on an 3~
47,926

-8-analog input and checked against a desired limit; and if this check fails, then an alarm ls given. A~ter blocks 234 and 236, the program loops around to block 212 and repeatedly operates as here described in a loop manner. The time spacing between the clear and setting of the reset toggle output signal is selected as shown ln Figure 2 to first reset it as close to the front of the main control program as reasonable, and then try to set it as close to the end o~
the program as reasonable to get enough time in-between such that the hardware reset logic device can pick up the dynamic setting and resetting of this toggle output signal.
The CPU main control program shown in Figure 3 is generally similar to the main control program shown in Figure 2, with the exception that lt does not have the train ready routine 222 shown in Figure 2 and the name of the MCS
store and input routine 226 shown in Figure 2 is changed to MCS store and transfer at block 300 of Figure 3. Again, as early as reasonable, the reset toggle bit is cleared at bloc~ 302, and as late as reasonable, the reset toggle bit is set at block 304. The diagnostics are done after that because at the time of writing the main control programs shown in Figures 2 and 3 it was not known i~ the diagnostic program would be zero or e~tensive in terms of operation.
As shown ln Figure 4, the CPU1 computer 400 is going through the main control program 402, which is shown in Figure 2, when the computer 400 is not doing any of the specific interrupt routlne vehicle control programs 404.
Each of these interrupt vehicle control programs 404 is described in greater detall in one of the above cross-C C~
re~erenced related`patent applications. The computers CPUl 1i35B~L2 117~926

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400 and CPU2 4Q6 are physically on each A~type carJ but -they are used for a single set of ATO equipment for an AB pair of vehicle cars. Either end of the AB pair can be a head end;
and either end can be a tail end. If no interrupts are received at block 212 of Figure 2, the CPUl main control -~
program shown in ~igure 2 can be running substantially faster than 18 times a second. Only the computers CPU1 and CPU2 for the designated head end vehicle of a train of vehicles operate to control the train. For example, a train o~ six car vehicles has three sets of A~ pairs, the middle pair and the rear pair are constantly looking for designa- ;
tion as a head end; and if they are never set as the head ;
end of the train, they do not control the`train but continue looking to be designated as a head end pair. Slmilarly, the computer CPU2 406 goes through the main computer control program 48a which is shown in Figure 3, when the computer 406 is not doing any of the specific interrupt vehicle control progr~m routines 4040 When the computer 400 is operating properly and without a fault hang~up in regard to the main computer control program 402 or any one of the interrupt vehicle control programs 404~ then the output toggle signal 401 continues to be set and reset as a dynamic output signal applied to the reset logic device 403~ As long as the output toggle signal remains dynamic, the reset logic device 403 will not provide the reset signal 405 to `~
the block 200 of the main computer control program 402, shown in Figure 2. When the computer 406 is operating properly and without a fault hang~up in regard to the main computer control program 408 or any one of the interrupt vehicle control programs 404~ then the output toggle signal Bl~
ll 7 ~ 926

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4~.Q continues to be set and reset as a dynamic oukput signal applied to the reset loglc device 412; a.nd as long aæ the .;
output toggle signal 410 remains dynamic, the reset l.ogic device 412 will not provide the reset signal 41ll to the block 306 of the main computer control program 408 shown in Figure 3.
In relation to Figure 5, each of the reset logic devices 403 and 412 shown in Figure 4 is in accordance with t.he circuit apparatus shown in ~'igure 5. The outpuk toggle .signal which is the bit that gets set and reset in the normal operation of the main computer control program is applied to input 500. The æignal gets di~ferentiated by capacitor 502 and is buf~ered by gate AND`504 and then by gate AND 506. These gates are really just used as buf~ers.
Every time the signal at input 500 has a negative going edge, it wi].1 recharge and pull the bottom end of capacitor 508 to ground through diode 510. When the signal at input ~:
500 goes high, the diode 510 prevents the gate AND 506 ~rom trying to pull the bottom end of capacitor 508 towards a positi~e value. Capacitor 508 has a discharge path ~hrough resistor 512, having a very high impedance o~ 2.4 megohms, such that a fast charge and slow discharge time character-istic is provided for capacitor 508. When the signal a~
input 500 is dynamic, then input 514 of AND 516 will be low.
As long as input 514 stays low~ then output 518 stays high and output 520 of AND 522 stays low, such that transistor 524 stays off. If this high signal edge stops occurring on input 500, then eventually capacitor 508 will discharge and input 514 o~ AND 516 will go high. When that happens~ then AND 516 with resistors 526 and 528~ diode 530 and capacitor 3~
1l7,926 532 comprise a ~ree-running stable multivibrator which will generate a short pulse at a rate o:~ approximately once every twenty seconds. If ou-tput 518 of AND 516 is high and then goes low ~or a short period of time and then goes back high again, the multivibrator will wait twenty seconds and gen~
erate that same short pulse again with output 520 of AND 522 being the inverse of that so that a positive going pulse is provided once every approximately twenty seconds~ which turns the transistor 524 on for a short period of time once every twenty seconds. The collector of transistor 524 is connected to the reset signal output 534. For as long as the computer CPU runs normally, then the input 500 will be dynamic, and the output 534 will not output the reset pulse;
and the presence o~ a reset signal on output 534 determines lnitializing the main computer control program.

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Claims (8)

-12- 47,926 CLAIMS:

1. In apparatus for controlling a passenger vehicle, the combination of control means for providing a first operation per-iodically executing a sequence of steps to establish a desired performance of the passenger vehicle and developing an output signal for each periodic completion of the sequence of steps and for providing a second operation effecting a predetermined reinitialization of said first operation, and selection means responsive to the respective output signals being developed at an actual repetition rate in accordance with the periodic operations of the first operation for selecting one of the first operation and the second operation by a comparison of said actual repetition rate with a predetermined reference repetition rate.

2. The apparatus of claim 1, with said apparatus being operative with a power supply and with said reference repetition rate being predetermined such that a power supply failure will result in the actual repetition rate being less than the reference repetition rate.

3. The apparatus of claim 1, with said selection means being operative to select the second operation when the actual repetition rate is less than the reference repetition rate.

4. The apparatus of claim 1, with said selection means being operative to con-tinuously select the first operation while the actual repeti-tion rate remains greater than the reference repetition rate.

5. The apparatus of claim 1 including at least -13- 47,926 one digital computer device operative with a control program defining said sequence of steps, with said digital computer device developing said output signal for each periodic and completed execution of that control program, and with said selection means including a hardware logic circuit responsive to the occurrence of said output signal at a repetition rate in excess of the reference repetition rate for selecting the periodic execution of that control program.

6. The apparatus of claim 1, with one step in said sequence of steps being to develop said output signal during each periodic execution of that sequence of steps.

7. The method of controlling a passenger vehicle, including the steps of providing a sequence of control operations for said passenger vehicle during each of successive time periods, providing an output signal in relation to each of said successive time periods and the completion of said sequence of control operations, sensing the actual repetition rate of the provided output signals for comparison with an established reference repetition rate, and providing an initialization of said sequence of control operations in accordance with a predetermined rela-tionship established by said comparison between the actual repetition rate and the reference repetition rate.

8. The method of claim 7, 47,926 with said predetermined relationship being that the actual repetition rate is less than the reference repetition rate.