CA1118850A - Input circuit for digital control system - Google Patents
Input circuit for digital control systemInfo
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- CA1118850A CA1118850A CA000322905A CA322905A CA1118850A CA 1118850 A CA1118850 A CA 1118850A CA 000322905 A CA000322905 A CA 000322905A CA 322905 A CA322905 A CA 322905A CA 1118850 A CA1118850 A CA 1118850A
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Abstract
Abstract of the Disclosure An input circuit for a digital control system in-cludes a rectifier circuit. and a set of zener diodes which can be selectively employed to receive a wide variety of signals from industrial sensing devices.
The signal is generated to an output drive circuit by an optocoupler which provides electrical isolation.
The output drive circuit generates a logic level signal which is compatible with the digital electronic control system. The input circuit is particularly well suited for fabrication as an integrated circuit.
The signal is generated to an output drive circuit by an optocoupler which provides electrical isolation.
The output drive circuit generates a logic level signal which is compatible with the digital electronic control system. The input circuit is particularly well suited for fabrication as an integrated circuit.
Description
S~
The field of the invention is input circuits to digital control systems such as programmable control-lers, numerical control systems and process controls, and particularly, to input circuits which convert the signals ~rom various types of sensing devices into digital logic signals.
Digital control sys~ems are commonly connected to sensing devices on industrial machines such as limit switches, pushbutton and selector switches, pressure switches and photoelectric switches. In a progra~mable controller system, for example, hundreds or even thousands of such sensing devices may connect to an I/O inter~ace system which provides a separate input circuit for each device.
Each input circuit performs three primary functions.
Eirst, it converts the signal received ~rom the sensing device to a logic level signal which is compatible with the digital control system. Second, it provides elec-trical isolation of the control system electronics from the surrounding environment, and third, it provides filtering which immunizes the control system ~rom in-dustrial noise and contact "bounce."
Because there are numerous types o~ sensing devices employed on industrial machines, a ~ariety of input cir-cuits must be o~fered by the controls manufacturer tointer~ace his digital control system with the user's machine. For example, separate input circuits must be provided to interface with 220 volt a.c. signals, 120 volt a.c. signals, 42 to 53 volt d.c. signals or 10 to 26 volt d.c. signals. As a result, there is no known ~ IQ
standard input circuit and it is common practice in the art to provide a set o~ input circuits built from discrete components for each particular digital con-trol system o~fered by the manu~acturer.
The present invention relates to an input circuit for a digital control system which will adapt to operate with nearly all sensing devices encountered in indus-triaL applications and which is particularly suited for construction using integrated circuit techniques. The input circuit includes a recti~ier circuit having a pair of output terminals which connect in series circuit with a set of zener diodes and a light emitting diode of a photo coupler, and an output drive circuit which is driven by a light sensing element in the photo coupler and which converts the signal generated by the photo coupler to a logic level signal suitable for application to the data bus of a digital control system.
The invention will enable one to provide an input circuit for digital control systems which will interface with a wide variety oE sensing devices. The rectifier ci.rcuit enables the circuit to accommodate either a.c.
or d.c. input signals and the zener diodes may be selec-tively employed to accommodate various input voltage levels.
The invention will also enab:Le one to provide elec-trical isolation between the input and output of the circuit. The phoko coupler electric~lly isolates the output drive circuit from the remainder of the circuit and it t.hus isolates the digital circuitry to which the output drive circuit attaches from the surrounding environment~
~`'~
The invention will enable one to filter out elec-trical noise which may be induced in the lines that con-nect the input circuit to its associated sensing device.
; In addition to the filtering capability which is inherent in the zener diodes and the photo coupler, the output drive circuit includes an operational amplifier which connects to the photo coupler through an ~-C filter.
The time constant of the R-C filter is selected to accommodate the partic~lar sensing device used and hence it filters out electrical noise and contact bounce having a faster rise time.
The invention will also enable one to provide an input circuit which incorporates the advantages of integrated circuit technology. By providing an input circuit which is universally applicable regardless of the type of sensing device used, it becomes economically feasible to construct the input circuit using integrated circuit techniques. The elements of the input circuit are compatihle with this technique.
~n drawings which illustrate the embodiments of the invention, Fig. 1 is an electrical schematic diagram of the preferred embodiment of the invented input circuit;
Fig. 2 is an exploded perspective view of a dual in-line pac]cage which incorporates the input ciruit of Fig. l; and Figs. 3A and 3B are partial ~iews in cross section of two integrated circuit arrangements which form part of the pac~age of Fig. 2.
Referring particularly to Fig. 1, the electrical elements of the input circuit are contained within a case which is indicated schematically by a dashed line 55. The input circuit includes a full wave bridge rec-ti~ier circuit comprised of a set o~ four diodes 1-4 and it includes a pair of rectifier input terminals 5 and 6 which are connected through leads 7 and 8 to a pair o~ a.c. input terminals 9 and 10 respectively.
The a.c. input terminals 9 and 10 are outside the case 55 and are, therefore, accessible to the user. The recti~ier circuit also includes a pair of output ter-minals 12 and 13, one of which connects to the cathode of a light emitting diode 14 through a resistor 11, and the other of which connects through a set of three series connected zener diodes 15-17 to the anode of the light emitting diode 14. A shunt resistor 18 is con-; nected across the rectifier output terminals 12 and 13, and the terminals 12 and 13 are also connected through leads 19 and 20 to a pair o~ external d.c. input ter-minals 21 and 22. The anodes of the respective zener diodes 15-17 also connect through leads 23-25 to external terminals 26-28.
An a.c. input signal applied across the a.c. input terminals 9 and 10 is recti~ied b~ the diodes 1-4 an~
is applied to the zener diodes 15-17~ When the recti~ied signal reaches the zener breakdown voltage~ a current ~lows through them and through the light emitting diode 14 to indicate a logic high voltage state. The values o~ the respective zener diodes 15-17 are 3 volts, 7 volts and 20 volts and by selectively connecting shunting wires across the terminals 21 and 26-28 as indicated hy o dashed lines 29, the user may determine which, i~ any, zener diodes 15-17 are operative in the circuit.
Voltage drops of 0, 3, 7, 10, 20, 23, 27 and 30 volts are thus possible and are selected to properly reduce the applied input voltage. It should be apparent that if a d.c. signal is coupled to the input circuit, the ; rectifier circuit is not needed and the input signal is applied across the d.c. input terminals 21 and 22. As before, the zener diodes 15-17 may be selectively shorted out to drop the level of the applied d.c. voltage. The resistor 11 limits the current ~low through the diode 14 to an optimal value when a 5 volt d.c~ signal is applied directly across terminals 22 and 28.
Shunt resistor 1~ serves to provide a maximum input impedance across the a.c. and d.c. input terminals. When the zener diodes 15-17 are nonconductive, they present a very high impedance to electrical noise which may appear across terminals 9 and 10 or terminals 21 and 22. The shunt resistor 18 provides a lower impedance current path for such noise to reduce its voltage level and to thus prevent the electrical noise from generating a current through the light emitting diode 1~. It should be apparent that the user could add external resistors across the input terminals 9 and 10 or 21 and 22 to fur-ther reduce the input impedance of the circuit and thatexternal resistors may also be connected in series with the applied a.c. or d.c. input signal to further reduce the applied voltage level. ~he input circuit oE the present invention is thus adaptable to nearly all sensing devices which may be encountered in industrial applications.
O
The light emitting diode 14 forms part of an optical coupler which electrically isolates the above-described input circuitry from an output drive circuit. When current flows through the light emitting diode 1~, it emits light across an ins.ulating gap~ and this light impinges on the base of an opto-transistor 30. The opto-transistor 30 is connected to a second transistor 31 in a Darlington configuration and their collectors are commonly connected through a load resistor 32 to a ; 10 positive d.c. supply terminal 33 and commonly connected through a lead 74 to an external terminal 75. The emitter o~ second transistor 31 connects to a negative d.c.
supply terminal 34 and its collector connects through a coupling resistor 35 to the inverting input of an opera-tional amplifier 36. The coupling resistor 35 also connects through a lead 37 to a time delay terminal 38 which is accessbile to the user.
The operational ampli~ier 36 is connected through leads 39 and 40 to.the respective positive and negative supply terminals 33 and 3~ and its output terminal is coupled through a feedback resistor 41 to its noninverting input. The noninverting input conneats through a lead 42 to a first threshold terminal 43 and through a voltage divide.r resistor 44 to a second threshold terminal 45.
~he oukput of the operational amplifier 36 connects to the input of a tri-state inverter gate 46. The output of the inverter gate 46 connects through a lead 47 to an output terminal 4~ and its enable input connects through a lead 49 to an external enable terminal 50.
When there is no input signal to the circuit no light is emitted by the light emitting diode 14 and the transistors 30 and 31 are nonconductive. The non-inverting input of the operational amplifier 3~ thus rises to a high positive voltage and its output is driven low. This logic low output voltage is inverted to a logic high by the inverter gate 46 and is generated at the external output terminal 4~ when a logic low enabling voltage is applied to the enable terminal 50.
When an input signal is applied to the circuit, the transistors 30 and 31 are driven to their conductive state by the light emitted from diode 14. ~he voltage at the inverting input of the operational amplifier 36 is thus pulled below the voltage at its noninverting input and the output of the operational amp ~ifier 36 is driven sharply to a logic high voltage. I'his high vol-tage is inverted by the gate 46 and is generated at external output terminal 48 when a logic low enabling voltage is applied to the enable terminal 50.
The voltage divider network formed by resistors 41 and 4~ establish the input voltage at which the opera tional amplifier switches logic state. When the trans-iskors 30 and 31 are nonconductive the output of the operational amplifier is low and hence the voltage at its noninverting input is also relatively low. The transistors 30 and 31 must thus be driven quite hard in order to bring the inverting input voltage down to the switching point. Once this switching point is reached, however, the output of the operational amplifier goes high and the voltage at the noninverting input rises to change the switch point. This "hyste~esis" insures that ~i8~
when the operational amplifier output is driven high by an input signal, it stays high for a time period which is sufficiently long to be recognized by the digital system connected to the circuit output ter-minal 48. The difference between the two switchpoints of the operational amplifier 36 can be altered by the user by adding an external resistor in series with resistor 4~ at the threshold terminal 45 or by adding an external resistor in parallel with resistor 44 across the threshold terminals 43 and 45 as shown by the dashed lines 52.
~ hen sensing devices such as switches are closed, their contacts often bounce and generate a series of voltage spikes of very short duration. To prevent the input circuit from interpreting such "contact bounce"
as a series of changes in logic state, an R-C filter formed by resistor 35 and an external capacitor 53 is provided. The value of capacitor 53 is selected by the user to slow the response of the input circuit to 2D a point where it is compatible with the particular sensing device used. Of course, in addition to filtering out voltage spikes caused by contact bounce, the R-C circuit also acts as a hiqh ~re~uency noise filter.
Referring particularly to Fig. 2, the input circuit o~ the present invention is preEerably embodied in an integrated circuit which is housecl in a clual in-line package, or case 55. The case 55 includes a ceramic base 56 having a rectangular shaped top surEace 57 bounded by a pair oE spacecl end walls 58 and 59 and a pair of spaced side walls 60 and 61. A rectangular shaped . ~.
` - ~
depression, or recess 62 is formed at the center of this top surface 57 and it is in this recess that the electrical elements of the above~described input circuit are mounted.
Referring particularly to Figs. 2 and 3A, the out-put drive circuit elements including the transistors 30 and 31 are fabricated on a ~irst silicon substrate 63 using well known microelectronic techniques. The light emitting diode 14 is formed on a separate silicon sub-strate 64 and this is bonded to the first substrate 63 with a sheet of optically clear insulating material 65 sandwiched therebetween. The light emitting diode sub-strate 64 is positioned directly over the photo transistor 30 formed on the substrate 63 and it directs its qenerated light downward through the insulating material 65.
The remainder of the input circuit elements are formed on a third silicon substrate 66 which is bonded in place alongside, but spaced from the first substrate 63. A pair of fine wire leads 67 and 6S connect to bonding pads on the seocnd and third substrates 64 and 66 to electrically con-nect the light emitting diode 14 to the circuit elements on the third substrate 66. The circuit elements on the third substrate 66 are thus electrically isolated from the out,put drive circuit elements on the first substrate 63. The degree 2S of eleatrical isolation is determined primarily by the thickness and dielectric characteristlcs of the insulating material 65. ~n the preferred embodiment optical glass is employed r however, other high dielectric materials which are transparent to light are also suitable for this pur~
pose.
_g_ .
If greater electrica] isolation is needed the structure shown in Fig. 3B can be substituted for that in Fig. 3A. In this embodiment the output drive circuit elements are fabricated on a first silicon substrate 69 along with the photo transistor 30. The remaining elements, including the light emit~ing diode 14, are formed on a second silicon substrate 70 which is bonded in place alongside the first substrate 69. The substrates are spaced apart to electrically isolate them from one ; 10 another and the light emitting diode 14 on the second substrate 70 emits light upward into a mass of trans-parent epoxy 71 which overlaps both substrates 69 and 70.
The transparent epoxy has a high inaex of refraction and a relatively hiyh dielectric constant. As a result, it maintains electrical isolation between the two sub-strates 69 and 70 and it reflects the light from the diode 14 on the second substrate 70 to the photo transistor 30 on the first substrate 69 with minimal loss.
Other arrangements of the integrated circuit chips in the recess 62 are, of course, possible.
Referring particularly to Fig. 2, the external con-nections to the electrical elements on the integrated circuit chips mounted in the recess 62 are made through a set of conductive paths 72 formed on the top surface 57 of the ceramic base 56. The conductive paths 72 are Eormed by depositin~ a layer of gold on the ceramic base 56 in the desired pattern. Each conductive path leads Erom a point adjacent the r~cess 62 to a point along one oE the side walls 60 or 61 where it is soldered to one o fourteen leads 73. Each conductive path 72 is electrically connected to a bonding pad on the first or second substrates 63 or 66 by a fine wire. The particular points of connection are indicated in Fig. 1 as the terminals 9, 10, 21, 22, 26, 27, 28, 33, 34, 38, 43, 45, 48, 50 and 75.
The size of the base 56 and the locations and spacing of the leads 73 are the same as a conventional twenty-pin dual in-line package. ~ ceramic cover 74 having a recess 75 on its underside is bonded in place to fully enclose and protect the circuit elements and their connections to the leads 73. To insure electrical isolation of the output drive circuit elements from the circuit input terminals, all leads 73 which connect to the first substrate 63 are located at one end of the dual in-line package and all leads 73 connected to the second substrate 66 are located at the other end of the package.
A gap along each side wall 60 and 61 is thus formed by unused pin positions to provide an additional margin of isolation.
The field of the invention is input circuits to digital control systems such as programmable control-lers, numerical control systems and process controls, and particularly, to input circuits which convert the signals ~rom various types of sensing devices into digital logic signals.
Digital control sys~ems are commonly connected to sensing devices on industrial machines such as limit switches, pushbutton and selector switches, pressure switches and photoelectric switches. In a progra~mable controller system, for example, hundreds or even thousands of such sensing devices may connect to an I/O inter~ace system which provides a separate input circuit for each device.
Each input circuit performs three primary functions.
Eirst, it converts the signal received ~rom the sensing device to a logic level signal which is compatible with the digital control system. Second, it provides elec-trical isolation of the control system electronics from the surrounding environment, and third, it provides filtering which immunizes the control system ~rom in-dustrial noise and contact "bounce."
Because there are numerous types o~ sensing devices employed on industrial machines, a ~ariety of input cir-cuits must be o~fered by the controls manufacturer tointer~ace his digital control system with the user's machine. For example, separate input circuits must be provided to interface with 220 volt a.c. signals, 120 volt a.c. signals, 42 to 53 volt d.c. signals or 10 to 26 volt d.c. signals. As a result, there is no known ~ IQ
standard input circuit and it is common practice in the art to provide a set o~ input circuits built from discrete components for each particular digital con-trol system o~fered by the manu~acturer.
The present invention relates to an input circuit for a digital control system which will adapt to operate with nearly all sensing devices encountered in indus-triaL applications and which is particularly suited for construction using integrated circuit techniques. The input circuit includes a recti~ier circuit having a pair of output terminals which connect in series circuit with a set of zener diodes and a light emitting diode of a photo coupler, and an output drive circuit which is driven by a light sensing element in the photo coupler and which converts the signal generated by the photo coupler to a logic level signal suitable for application to the data bus of a digital control system.
The invention will enable one to provide an input circuit for digital control systems which will interface with a wide variety oE sensing devices. The rectifier ci.rcuit enables the circuit to accommodate either a.c.
or d.c. input signals and the zener diodes may be selec-tively employed to accommodate various input voltage levels.
The invention will also enab:Le one to provide elec-trical isolation between the input and output of the circuit. The phoko coupler electric~lly isolates the output drive circuit from the remainder of the circuit and it t.hus isolates the digital circuitry to which the output drive circuit attaches from the surrounding environment~
~`'~
The invention will enable one to filter out elec-trical noise which may be induced in the lines that con-nect the input circuit to its associated sensing device.
; In addition to the filtering capability which is inherent in the zener diodes and the photo coupler, the output drive circuit includes an operational amplifier which connects to the photo coupler through an ~-C filter.
The time constant of the R-C filter is selected to accommodate the partic~lar sensing device used and hence it filters out electrical noise and contact bounce having a faster rise time.
The invention will also enable one to provide an input circuit which incorporates the advantages of integrated circuit technology. By providing an input circuit which is universally applicable regardless of the type of sensing device used, it becomes economically feasible to construct the input circuit using integrated circuit techniques. The elements of the input circuit are compatihle with this technique.
~n drawings which illustrate the embodiments of the invention, Fig. 1 is an electrical schematic diagram of the preferred embodiment of the invented input circuit;
Fig. 2 is an exploded perspective view of a dual in-line pac]cage which incorporates the input ciruit of Fig. l; and Figs. 3A and 3B are partial ~iews in cross section of two integrated circuit arrangements which form part of the pac~age of Fig. 2.
Referring particularly to Fig. 1, the electrical elements of the input circuit are contained within a case which is indicated schematically by a dashed line 55. The input circuit includes a full wave bridge rec-ti~ier circuit comprised of a set o~ four diodes 1-4 and it includes a pair of rectifier input terminals 5 and 6 which are connected through leads 7 and 8 to a pair o~ a.c. input terminals 9 and 10 respectively.
The a.c. input terminals 9 and 10 are outside the case 55 and are, therefore, accessible to the user. The recti~ier circuit also includes a pair of output ter-minals 12 and 13, one of which connects to the cathode of a light emitting diode 14 through a resistor 11, and the other of which connects through a set of three series connected zener diodes 15-17 to the anode of the light emitting diode 14. A shunt resistor 18 is con-; nected across the rectifier output terminals 12 and 13, and the terminals 12 and 13 are also connected through leads 19 and 20 to a pair o~ external d.c. input ter-minals 21 and 22. The anodes of the respective zener diodes 15-17 also connect through leads 23-25 to external terminals 26-28.
An a.c. input signal applied across the a.c. input terminals 9 and 10 is recti~ied b~ the diodes 1-4 an~
is applied to the zener diodes 15-17~ When the recti~ied signal reaches the zener breakdown voltage~ a current ~lows through them and through the light emitting diode 14 to indicate a logic high voltage state. The values o~ the respective zener diodes 15-17 are 3 volts, 7 volts and 20 volts and by selectively connecting shunting wires across the terminals 21 and 26-28 as indicated hy o dashed lines 29, the user may determine which, i~ any, zener diodes 15-17 are operative in the circuit.
Voltage drops of 0, 3, 7, 10, 20, 23, 27 and 30 volts are thus possible and are selected to properly reduce the applied input voltage. It should be apparent that if a d.c. signal is coupled to the input circuit, the ; rectifier circuit is not needed and the input signal is applied across the d.c. input terminals 21 and 22. As before, the zener diodes 15-17 may be selectively shorted out to drop the level of the applied d.c. voltage. The resistor 11 limits the current ~low through the diode 14 to an optimal value when a 5 volt d.c~ signal is applied directly across terminals 22 and 28.
Shunt resistor 1~ serves to provide a maximum input impedance across the a.c. and d.c. input terminals. When the zener diodes 15-17 are nonconductive, they present a very high impedance to electrical noise which may appear across terminals 9 and 10 or terminals 21 and 22. The shunt resistor 18 provides a lower impedance current path for such noise to reduce its voltage level and to thus prevent the electrical noise from generating a current through the light emitting diode 1~. It should be apparent that the user could add external resistors across the input terminals 9 and 10 or 21 and 22 to fur-ther reduce the input impedance of the circuit and thatexternal resistors may also be connected in series with the applied a.c. or d.c. input signal to further reduce the applied voltage level. ~he input circuit oE the present invention is thus adaptable to nearly all sensing devices which may be encountered in industrial applications.
O
The light emitting diode 14 forms part of an optical coupler which electrically isolates the above-described input circuitry from an output drive circuit. When current flows through the light emitting diode 1~, it emits light across an ins.ulating gap~ and this light impinges on the base of an opto-transistor 30. The opto-transistor 30 is connected to a second transistor 31 in a Darlington configuration and their collectors are commonly connected through a load resistor 32 to a ; 10 positive d.c. supply terminal 33 and commonly connected through a lead 74 to an external terminal 75. The emitter o~ second transistor 31 connects to a negative d.c.
supply terminal 34 and its collector connects through a coupling resistor 35 to the inverting input of an opera-tional amplifier 36. The coupling resistor 35 also connects through a lead 37 to a time delay terminal 38 which is accessbile to the user.
The operational ampli~ier 36 is connected through leads 39 and 40 to.the respective positive and negative supply terminals 33 and 3~ and its output terminal is coupled through a feedback resistor 41 to its noninverting input. The noninverting input conneats through a lead 42 to a first threshold terminal 43 and through a voltage divide.r resistor 44 to a second threshold terminal 45.
~he oukput of the operational amplifier 36 connects to the input of a tri-state inverter gate 46. The output of the inverter gate 46 connects through a lead 47 to an output terminal 4~ and its enable input connects through a lead 49 to an external enable terminal 50.
When there is no input signal to the circuit no light is emitted by the light emitting diode 14 and the transistors 30 and 31 are nonconductive. The non-inverting input of the operational amplifier 3~ thus rises to a high positive voltage and its output is driven low. This logic low output voltage is inverted to a logic high by the inverter gate 46 and is generated at the external output terminal 4~ when a logic low enabling voltage is applied to the enable terminal 50.
When an input signal is applied to the circuit, the transistors 30 and 31 are driven to their conductive state by the light emitted from diode 14. ~he voltage at the inverting input of the operational amplifier 36 is thus pulled below the voltage at its noninverting input and the output of the operational amp ~ifier 36 is driven sharply to a logic high voltage. I'his high vol-tage is inverted by the gate 46 and is generated at external output terminal 48 when a logic low enabling voltage is applied to the enable terminal 50.
The voltage divider network formed by resistors 41 and 4~ establish the input voltage at which the opera tional amplifier switches logic state. When the trans-iskors 30 and 31 are nonconductive the output of the operational amplifier is low and hence the voltage at its noninverting input is also relatively low. The transistors 30 and 31 must thus be driven quite hard in order to bring the inverting input voltage down to the switching point. Once this switching point is reached, however, the output of the operational amplifier goes high and the voltage at the noninverting input rises to change the switch point. This "hyste~esis" insures that ~i8~
when the operational amplifier output is driven high by an input signal, it stays high for a time period which is sufficiently long to be recognized by the digital system connected to the circuit output ter-minal 48. The difference between the two switchpoints of the operational amplifier 36 can be altered by the user by adding an external resistor in series with resistor 4~ at the threshold terminal 45 or by adding an external resistor in parallel with resistor 44 across the threshold terminals 43 and 45 as shown by the dashed lines 52.
~ hen sensing devices such as switches are closed, their contacts often bounce and generate a series of voltage spikes of very short duration. To prevent the input circuit from interpreting such "contact bounce"
as a series of changes in logic state, an R-C filter formed by resistor 35 and an external capacitor 53 is provided. The value of capacitor 53 is selected by the user to slow the response of the input circuit to 2D a point where it is compatible with the particular sensing device used. Of course, in addition to filtering out voltage spikes caused by contact bounce, the R-C circuit also acts as a hiqh ~re~uency noise filter.
Referring particularly to Fig. 2, the input circuit o~ the present invention is preEerably embodied in an integrated circuit which is housecl in a clual in-line package, or case 55. The case 55 includes a ceramic base 56 having a rectangular shaped top surEace 57 bounded by a pair oE spacecl end walls 58 and 59 and a pair of spaced side walls 60 and 61. A rectangular shaped . ~.
` - ~
depression, or recess 62 is formed at the center of this top surface 57 and it is in this recess that the electrical elements of the above~described input circuit are mounted.
Referring particularly to Figs. 2 and 3A, the out-put drive circuit elements including the transistors 30 and 31 are fabricated on a ~irst silicon substrate 63 using well known microelectronic techniques. The light emitting diode 14 is formed on a separate silicon sub-strate 64 and this is bonded to the first substrate 63 with a sheet of optically clear insulating material 65 sandwiched therebetween. The light emitting diode sub-strate 64 is positioned directly over the photo transistor 30 formed on the substrate 63 and it directs its qenerated light downward through the insulating material 65.
The remainder of the input circuit elements are formed on a third silicon substrate 66 which is bonded in place alongside, but spaced from the first substrate 63. A pair of fine wire leads 67 and 6S connect to bonding pads on the seocnd and third substrates 64 and 66 to electrically con-nect the light emitting diode 14 to the circuit elements on the third substrate 66. The circuit elements on the third substrate 66 are thus electrically isolated from the out,put drive circuit elements on the first substrate 63. The degree 2S of eleatrical isolation is determined primarily by the thickness and dielectric characteristlcs of the insulating material 65. ~n the preferred embodiment optical glass is employed r however, other high dielectric materials which are transparent to light are also suitable for this pur~
pose.
_g_ .
If greater electrica] isolation is needed the structure shown in Fig. 3B can be substituted for that in Fig. 3A. In this embodiment the output drive circuit elements are fabricated on a first silicon substrate 69 along with the photo transistor 30. The remaining elements, including the light emit~ing diode 14, are formed on a second silicon substrate 70 which is bonded in place alongside the first substrate 69. The substrates are spaced apart to electrically isolate them from one ; 10 another and the light emitting diode 14 on the second substrate 70 emits light upward into a mass of trans-parent epoxy 71 which overlaps both substrates 69 and 70.
The transparent epoxy has a high inaex of refraction and a relatively hiyh dielectric constant. As a result, it maintains electrical isolation between the two sub-strates 69 and 70 and it reflects the light from the diode 14 on the second substrate 70 to the photo transistor 30 on the first substrate 69 with minimal loss.
Other arrangements of the integrated circuit chips in the recess 62 are, of course, possible.
Referring particularly to Fig. 2, the external con-nections to the electrical elements on the integrated circuit chips mounted in the recess 62 are made through a set of conductive paths 72 formed on the top surface 57 of the ceramic base 56. The conductive paths 72 are Eormed by depositin~ a layer of gold on the ceramic base 56 in the desired pattern. Each conductive path leads Erom a point adjacent the r~cess 62 to a point along one oE the side walls 60 or 61 where it is soldered to one o fourteen leads 73. Each conductive path 72 is electrically connected to a bonding pad on the first or second substrates 63 or 66 by a fine wire. The particular points of connection are indicated in Fig. 1 as the terminals 9, 10, 21, 22, 26, 27, 28, 33, 34, 38, 43, 45, 48, 50 and 75.
The size of the base 56 and the locations and spacing of the leads 73 are the same as a conventional twenty-pin dual in-line package. ~ ceramic cover 74 having a recess 75 on its underside is bonded in place to fully enclose and protect the circuit elements and their connections to the leads 73. To insure electrical isolation of the output drive circuit elements from the circuit input terminals, all leads 73 which connect to the first substrate 63 are located at one end of the dual in-line package and all leads 73 connected to the second substrate 66 are located at the other end of the package.
A gap along each side wall 60 and 61 is thus formed by unused pin positions to provide an additional margin of isolation.
Claims (20)
1. An input circuit for a digital system, the com-bination comprising:
a rectifier circuit having a pair of a.c. input terminals and a pair of output terminals;
a plurality of series connected zener diodes con-nected to one of said rectifier circuit output terminals;
a photo coupler including a light emitting element connected in series circuit with said zener diodes and the other of said rectifier circuit output terminals and including a light sensing element which generates an electrical signal when current flows through said light emitting element; and an output drive circuit which connects to said light sensing element and which converts the signal generated thereby to a logic level signal at an output terminal which is suitable for application to the data bus of the digital system.
a rectifier circuit having a pair of a.c. input terminals and a pair of output terminals;
a plurality of series connected zener diodes con-nected to one of said rectifier circuit output terminals;
a photo coupler including a light emitting element connected in series circuit with said zener diodes and the other of said rectifier circuit output terminals and including a light sensing element which generates an electrical signal when current flows through said light emitting element; and an output drive circuit which connects to said light sensing element and which converts the signal generated thereby to a logic level signal at an output terminal which is suitable for application to the data bus of the digital system.
2. The input circuit as recited in claim 1 in which said output drive circuit includes a logic gate having one input coupled to the light sensing element, a second input connected to an enable terminal and an output which forms the output of said output drive circuit, wherein said logic gate decouples the signal generated by said light sensing element from said output terminal when said enable terminal is driven to a pre-selected logic state.
3. The input circuit as recited in claim 2 in which the logic gate is coupled to said light sensing element through a filter comprised of a resistor and capacitor.
4. The input circuit as recited in claim 1 in which a current limiting resistor is connected in series circuit with said light emitting element.
5. The input circuit as recited in claim 1 in which a shunt resistor is connected across said rectifier circuit output terminals.
6. An input circuit for a digital system, the com-bination comprising:
a rectangular base having a pair of spaced side walls;
first and second sets of electrically conductive leads mounted along the respective side walls of said base, a first substrate mounted on said base and having formed integrally thereon circuit elements which include:
(a) a light sensing element for generating an electrical signal when light impinges on it; and (b) means connected to said light sensing element for converting the signal generated by said light sensing element to a logic level signal at a circuit out-put terminal;
a second substrate mounted on said base and having formed integrally thereon circuit elements which include:
(a) a rectifier having a pair of a.c. input terminals and a pair of out-put terminals; and (b) a plurality of series connected zener diodes connected to one of said rectifier circuit output terminals and having terminals formed at the inter-connection of each zener diode;
a light emitting element connected in series circuit with the plurality of zener diodes and connected to the other of said rectifier circuit output terminals, said light emitting element being responsive to current flow therethrough to generate light and being positioned to direct said generated light onto the light sensing ele-ment on said first substrate; and electrical conductors connecting each of said circuit output terminal, a.c. input terminals, rectifier output terminals and zener diode terminals with respective ones of said electrically conductive leads.
a rectangular base having a pair of spaced side walls;
first and second sets of electrically conductive leads mounted along the respective side walls of said base, a first substrate mounted on said base and having formed integrally thereon circuit elements which include:
(a) a light sensing element for generating an electrical signal when light impinges on it; and (b) means connected to said light sensing element for converting the signal generated by said light sensing element to a logic level signal at a circuit out-put terminal;
a second substrate mounted on said base and having formed integrally thereon circuit elements which include:
(a) a rectifier having a pair of a.c. input terminals and a pair of out-put terminals; and (b) a plurality of series connected zener diodes connected to one of said rectifier circuit output terminals and having terminals formed at the inter-connection of each zener diode;
a light emitting element connected in series circuit with the plurality of zener diodes and connected to the other of said rectifier circuit output terminals, said light emitting element being responsive to current flow therethrough to generate light and being positioned to direct said generated light onto the light sensing ele-ment on said first substrate; and electrical conductors connecting each of said circuit output terminal, a.c. input terminals, rectifier output terminals and zener diode terminals with respective ones of said electrically conductive leads.
7. The input circuit as recited in claim 6 in which said light emitting element is integrally formed on said second substrate.
8. The input circuit as recited in claim 7 in which said second substrate is mounted adjacent said first sub-strate in a substantially common plane and a light conductive element formed from an electrically insulating material is disposed over said light emitting and light sensing elements to convey light therebetween.
9. The input circuit as recited in claim 7 in which a logic gate is integrally formed on said first substrate and is electrically connected between said light sensing element and said circuit output terminal, said logic gate having an enable terminal which connects to one of said electrically conductive leads through an electrical conductor and which is operable when a pre-selected logic signal is applied to said enable terminal to decouple said circuit output terminal from said light sensing element.
10. The input circuit as recited in claim 9 in which a resistor is integrally formed on said first substrate and is electrically connected between said light sensing element and said logic gate, said resis-tor having a terminal which connects to one of said electrically conductive leads through an electrical conductor.
11. The input circuit as recited in claim 10 in which a resistor is integrally formed on said second substrate and is electrically connected across said rectifier circuit output terminals.
12. The input circuit as recited in claim 11 in which a resistor is integrally formed on said second substrate and is electrically connected in series with said light emitting element.
13. The input circuit as recited in claim 6 in which said light emitting element is formed on a third substrate which is mounted over the light sensing ele-ment on said first substrate with a light conductive electrical insulating material therebetween.
14. The input circuit as recited in claim 13 in which a logic gate is integrally formed on said first substrate and is electrically connected between said light sensing element and said circuit output terminal, said logic gate having an enable terminal which connects to one of said electrically conductive leads through an electrical conductor and which is operable when a pre-selected logic signal is applied to said enable terminal to decouple said circuit output terminal from said light.
sensing element.
sensing element.
15. The input circuit as recited in claim 14 in which a filter resistor is integrally formed on said first substrate and is electrically connected between said light.
sensing element and said logic gate, said filter resistor having a terminal which connects to one of said electrically conductive leads through an electrical conductor.
sensing element and said logic gate, said filter resistor having a terminal which connects to one of said electrically conductive leads through an electrical conductor.
16. The input circuit as recited in claim 15 in which a resitor is integrally formed on said second sub-strate and is electrically connected across said rectifier circuit output terminals.
17. The input circuit as recited in claim 16 in which a resistor is integrally formed on said second substrate and is electrically connected in series with said light emitting element.
18. The input circuit as recited in claim 15 in which said means for converting the signal generated by said light sensing element includes an operational ampli-fier which is electrically connected between said filter resistor and said logic gate, said operational amplifier including a d.c. supply terminal which connects to one of said electrically conductive leads through an electrical conductor.
19. The input circuit as recited in claim 18 in which the electrically conductive leads connected to said first substrate elements are spaced apart from the elec-trically conductive leads connected to said second sub-strate elements by gaps along each side wall of said base.
20. The input circuit as recited in claim 10 in which the electrically conductive leads connected to said first substrate elements are spaced apart from the electrically conductive leads connected to said second substrate elements by gaps along each side wall of said base.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US89768178A | 1978-04-19 | 1978-04-19 | |
| US897,681 | 1978-04-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1118850A true CA1118850A (en) | 1982-02-23 |
Family
ID=25408250
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000322905A Expired CA1118850A (en) | 1978-04-19 | 1979-03-07 | Input circuit for digital control system |
Country Status (1)
| Country | Link |
|---|---|
| CA (1) | CA1118850A (en) |
-
1979
- 1979-03-07 CA CA000322905A patent/CA1118850A/en not_active Expired
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