CA1106002A - Impulse noise limiter circuit - Google Patents

Abstract

Abstract of the Disclosure A circuit for limiting impulse noise contained in a signal is disclosed. The circuit comprises a delay circuit connected in parallel with a clamp circuit which is formed of two oppositely directed parallel diodes. When a signal is applied to an input of the parallel connected delay and clamp circuits, the clamp circuit prevents the voltage of the input signal from rising higher than a value (positive or negative) which will cause one of the diodes to conduct. Thus, impulse noise can be re-moved from the input to the delay circuit which provides an output signal essentially noise free and delayed with respect to the original signal.

Description

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The present invention relates to an impulse noise limiter circuit for limiting impulse noise contained in a signal.
One of the conventional methods for removing impulse noise employs a low pass filter to allow only the signal to pass therethrough while re-moving the noise. Another example of the conventional methods extracts the impulse noise by means of a high pass filter, and inverts the extracted impulse noise and applies it to the signal containing the impulse noise so that noise component may be cancelled. The residual noise component may further be removed by the use of a low-pass filter.
However, with the former method, the impulse noise can not be removed sufficiently. Even in the latter method, it is difficult to remove perfectly the impulse noise. A modification of these conventional methods is disclosed in U.S. Patent 3,810,067 issued on May 7, 1974 to Robert F.
Heidecker. However, the modification is complicated in construction and operation.
One object of the present invention is to provide an impulse noise limiter circuit that is free from the aforementioned disadvantages.
According to the present invention, there is provided an impulse noise limiter circuit for removing impulse noise contained in a signal, comprising: a delay circuit having an input and an output for delaying said signal; a voltage follower circuit having an inverting input, a non-invert-ing input and an output, the output of said delay circuit being connected to said non-inverting input and the output of said voltage follower circuit being coupled to said inverting input; and a pair of diodes connected in parallel and in opposite polarity to each other and connected between the input of said delay circuit and the output of said voltage follower circuit, whereby said voltage follower circuit provides isolation between the output of said delay circuit and said pair of diodes.
Now the present invention will be described in greater detail with reference to the accompanying drawings, in which:

Figure 1 shows one example of a conventional circuit for removing impulse noise;

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Figure 2 shows one example of waveforms at various points in the circuit shown in Figure l;
Figure 3 shows one preferred embodiment of the present invention;
Figure 4 shows waveforms at various points in the circuit shown -la-~;

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Figure 5 shows another preferred embodiment of the present inven-tion; and Figure 6 shows waveforms at various points in the circuit shown in Figure 5.
The construction and operation of the conventional circuit shown in Figure 1 will be described first, referring also to Figure 2. In Figure 1, reference numeral 1 designates a high-pass filter for extracting only an impulse noise component. A cut-off frequency of this filter 1 is selected at a sufficiently high value to prevent the signal component from being removed. With such provision the extracted impulse noise Xl as shown in Figure 2(b) is somewhat different from the impulse noise contained in the input signal X0 as shown in Figure 2~a). Reference numeral 2 designates a circuit for inverting the extracted impulse noise Xl. The output X2 (Figure 2(c)) of this inverter circuit 2 and the input signal X0 are added to each other by means of a circuit 3 (for example, an operational amplifier).
The output X3 of the circuit 3 has residual impulse noise as shown in Figure 2(d). The waveform X3 is then passed through a low-pass filter 4 for further removing the residual noise component. However, as shown in Figure 2(e), the effect of the impulse noise still remains in the output X4 of the filter 4. According to this method, the larger the impulse noise, the greater is the effect of the impulse noise at the output X4.
A limiter circuit according to the first preferred embodiment of the present invention is illustrated in Figure 3, with the waveforms at various points in the circuit shown in Figure 4. In Figure 3, reference numeral 5 designates a resistor; 6, an analog delay element for delaying an analog quantity; and 7, a non-linear circuit (clamp circuit) which uses diodes 8 and 9. More particularly, when a voltage difference between the input and output of the analog delay element 6 becomes larger than a given value, one of the diodes 8 and 9 turns conductive to cause a current to flow abruptly therethrough, so that the input X of the delay element 6 taXes a substantially equal value to the output X7. It is assumed here that an input signal X5 containing impulse noise as shown in Figure 4(a) has been applied to the inpu~ of the limiter circuit. An output signal X7 is delayed in phase relative to the signal X5 by time interval ~ ~1 because the signal X7 is an output of the delay element 6. Accordingly, if the signal X5 rises abruptly due to the impulse noise, then at the moment when the signal X5 has risenJ the signal X7 is still kept at the state ~1 before rising of the signal X5, so that the diode 9 becomes conducting and thus the input X6 of the delay element 6 cannot rise higher than the voltage required for the diode 9 to conduct. Consequently, the signal X6 has its impulse noise suppressed in comparison to the signal X5 as shown in Figure 4(b). This signal X6 is passed through the delay element 6 and appears at its output as an output signal X7 with a delay of ~ rl as shown in Figure 4(c). As will be obvious from the above explanationS however large the impulse noise in the input signal X5 may be, it would not greatly affect the signal X7 because the effect upon the signal X6 is limited by the diode 8 or 9.
The second preferred embodiment of the present invention is illustrated in Figure 5 with the waveforms at various points in the circuit shown in Figure 6. In Figure 5, a delay circuit is composed of a low-pass filter 10 consisting of a resistor 100 and a capacitor 101, and a buffer ci.rcuit (in the illustrated embodiment, a voltage follower circuit) 11. The input signal X12 of the filter 10 is converted into an output signal Xll as delayed by time interval ~ r2 and having a high frequency component in the waveform X12 removed as shown in Figure 6(b) and (c~. Accordingly, a~ the moment when the impulse noise has been applied to the input of the limiter circuit resulting in the abrupt rise of the waveform as shown in Figure 6(a), the output X~l is still keptat the state ~-2 before the signal X10 has risen so that the diode 13 conducts and thus the input signal of the delay circuit is clamped in the form of the waveform X12 as shown in Figure 6(b). In the ~6~2 embodiment shown in Figure 5, since the waveform X12 is further passed .~ through the filter 10 before it appears as the output Xll, the effect of ;~
the impulse noise becomes very small.
It is to be noted that the diodes 8 and 14 in the circuits shown in Figures 3 and 5, respectively, operate in the above-described manner for impulse noise of the opposite polarity. Furthermore, as the above-described delay circuit, a CCD (Charge Coupled Device) or a BBD ~Bucket Brigade Device) can be employed. Furthermore, it is to be noted that the impulse noise limiter circuit according to the present invention can be used as an IDC ~Instantaneous Deviation Control) circuit.
As described above, the impulse noise limiter of the present invention is capable of suppressing the adverse effect of the noise to an unharmful level even if it is very large in intensity.

Claims (2)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. An impulse noise limiter circuit for removing impulse noise contained in a signal, comprising: a delay circuit having an input and an output for delaying said signal; a voltage follower circuit having an in-verting input, a non-inverting input and an output, the output of said delay circuit being connected to said non-inverting input and the output of said voltage follower circuit being coupled to said inverting input; and a pair of diodes connected in parallel and in opposite polarity to each other and connected between the input of said delay circuit and the output of said voltage follower circuit, whereby said voltage follower circuit pro-vides isolation between the output of said delay circuit and said pair of diodes.

2. An impulse noise limiter circuit as claimed in claim 1, wherein said delay circuit comprises a low pass filter.