JPS617714A - Inserted filter - Google Patents

Abstract

PURPOSE:To minimize waveform deterioration to data transmission by means of an aperture equalizer so as to simplify the circuit configuration of an inserted filter, by giving a characteristic which drops in the vicinity of zero frequency when compared with ordinary waveform shaping filters to the roll-off frequency of the inserted filter. CONSTITUTION:The 1st and 2nd LPFs 10 and 20, 3rd subtractor 40, multiplier 50, and adder 60 are installed to an aperture equalizer. The LPFs 10 and 20 are respectively composed of differentiation circuits 7, delay circuits 8, and the 1st and 2nd subtractors 9. The roll-off frequency of the filters 10 and 20 is set in such a way that the roll-off frequency drops at 1/T-3/T in the vicinity of zero frequency when compared with ordinary waveform shaping filters. When these filters are used, the waveform deterioration in the data transmission by means of the equalizer can be minimized and the circuit configuration can be made simpler.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an interpolation filter for obtaining signal values at times other than sample points from a time series of sample values of a band-limited signal.

(Prior art and its problems) In recent years, data modulation and demodulation technology based on digital signal processing has been widely used. The signal handled in this technique is a series of sample values sampled at a constant period, but in principle, signal values at times other than sample points can also be determined by interpolation of these sample values. However, to perform interpolation, unless the baud rate and sample rate are an integer multiple, the sample period will be much shorter than the previous sample value + m (for example, a period complementary to the frequency that is the least common multiple of the baud rate and sample rate). A working interpolation filter is required. In order to realize such an interpolation filter, it goes without saying that K requires elements that can operate at high speeds, but as the operating frequency increases, many ingenuity in circuit design such as parallel processing is required. It is unavoidable that the scale of the device becomes large.

As a result, it is strange that the interpolation filter itself occupies only a small part from the point of view of the original function of the data modulator/demodulator, but it occupies a small proportion from the point of view of the equipment scale. I love the colander.

FIG. 1 shows a block diagram of a data signal demodulator using digital signal processing. ±1 binary band-limited signal (
The waveform-shaped superimposed signal of pulses with a peak value ±1) is converted into a digital value time series by an analog-to-digital converter (A/D converter) 1, and this digital value is
The signal enters the demodulator and reproduces the transmitted code. The demodulator 2 typically also has the important function of providing sample timing to the A/Df converter i. In other words, by sampling 100 input signals at the sampling time (a) shown in Figure 1, the transmission code ±1 can be observed as is, but at other points (points where the eye is not fully open), the weighted before and after The transmitted code cannot be observed as it is due to the influence of the pulse. Therefore, the demodulator 2 normally performs all timing control to maintain the sample timing of the A/D converter 1 at the position (a). For this demodulator,
The feature is that the input signal can be sampled at the most convenient timing for signal demodulation.

FIG. 2 shows an A/D device whose input signal is completely independent of the operation of the subsequent demodulator and is included in a separate device 3 operating with a lock source 4.
A case is shown in which the sample is sampled by converter 1'.

Such an example can be seen when a plurality of data signal groups having different transmission carrier frequencies are collectively subjected to digital signal processing to output a digital value time series corresponding to each data signal.

FIG. 3 shows an example of a system that receives such a sample value time series 101 and regenerates the transmitted code. A/D converter 1.
The demodulator 2 demodulates the signal. It is of course possible to digitize the interpolation filter 5, and it is also possible to receive a timing control signal from the later demodulator 2 as shown by the broken line. In this case, if the baud rate and the sample rate of the device 3 in FIG. Therefore, the necessary interpolated value can be obtained in a relatively simple way. On the other hand, baud rate and sample
If the rate is a non-integer multiple, the above does not hold, and complex and high-speed processing becomes essential.

(Object of the Invention) An object of the present invention is to provide an interpolation filter that can be implemented with a small circuit scale even when the baud rate and sample rate are not in an integral multiple relationship.

(Structure of the Invention) According to the present invention, (a low-pass filter to which 81 digital sample value sequences are supplied, from a first delay circuit and a first subtracter that obtains an input-output difference of the first delay circuit) (b) a second filter to which the output of the low-pass filter is supplied;
delay circuit.

(e) a second subtractor that obtains the difference between the low-pass filter output and the second delay circuit output;

(d) A multiplier that multiplies the output of the second subtracter by a value between O and 1, the multiplier multiplying the output of the second subtracter by a value that becomes larger as the sample value goes away from the open value.

(,) an adder that sums the output of the kernel multiplier and the output of the low-pass filter to obtain the interpolated value.

An interpolation filter consisting of at least the following is obtained.

(Example) As already mentioned, the present invention aims at how to make an interpolation filter as simple as possible in the relevant situations.

FIGS. 4(1k) and 4(b) show the configuration of a low-pass filter which is an element of the present invention, including an integrator 7 and a delay circuit 8. It consists of a subtracter 9 and a subtracter 9. Although the positions of the differentiator and integrator are different in (a) and (b), the input/output characteristics are exactly the same.

Figure 5 shows the input/output characteristics of the low-pass filter in Figure 4 (a
) is the impulse input (b) is the impulse response of the low-pass filter, and a rectangular wave corresponding to the delay amount T (seconds) of the delay circuit is output.

FIG. 6 shows the Fourier transform of the impulse response in FIG. 5(b), that is, the frequency characteristics of the low-pass filter in FIG. 4, and shows that the low-pass characteristics change depending on the amount of delay T. Therefore, by appropriately setting the delay amount Ti, it is possible to approximate the waveform shaping filter.

FIG. 7 shows an output waveform when the fourth integrator A is configured with a digital circuit, and is a staircase wave that changes every input accumulation period τ3 of the integrator. Values other than both ends of the step of this staircase must be found by interpolation from the values at both ends. To this end, interpolated values between steps can be obtained by preparing two sets of low-pass filters shown in FIG. 4 whose outputs have a time difference of τ (seconds).

÷ Rumor → 1 Figure 8 is a professional diagram showing one embodiment of the present invention. In the figure, 10 and 20' have the same structure as the low-pass filter shown in FIG. 4(a), but they may have the structure shown in FIG. 4(b). Also, the delay circuit 30 connected after the block 20' and creating the delay amount τ is connected to the block 20'.
It may be placed before the integrator 7' or after the integrator 7'. Next, the interpolated value F (kr, +t) between steps is output from the output terminal 120 of the low-pass filter 1o, and the low-pass filter 2C
The output terminals 130 of L are respectively F((k+1.)τ,), p
(kr, ), when τ3 is small, F(kta+t)=(F((k+t)rIl)−p(
kr, ))−+p(scr,)τ1 is sufficient, so the subtractor 40. Multiplier 5
0. Only the adder 60 is composed of K. Values from 0 to l are input to the input terminal 140 of the multiplier corresponding to ('/,), and when (/1)=0, the value of the low-pass filter 20 is input to the output terminal 150, corresponding to (t/r). ) = t, the value of the low-pass filter 10 is output as is, and 0 < , (t
/T, ) <1, the interpolated values of the two low-pass filters are output.

In the case of the embodiment shown in FIG. 8, since the same human power is applied to the low-pass filter 10° block 20', it is also possible to leave one of them and share them. These are integrators 7, 7' and delay circuits 8, 8'.

The same applies to subtractor 9.9'.

FIG. 9 shows an embodiment in which the first and second low-pass filters are simplified.

(Effects of the Invention) As explained above, the interpolation filter according to the present invention is realized by addition/subtraction of at most 4 degrees and one multiplication. Note that the roll-off (how the amplitude-frequency characteristic is attenuated near the cut-off) of this interpolation filter falls slowly from near zero frequency compared to a normal waveform shaping filter. A simple aperture filter (filter that raises the entire area near the cutoff) K can sufficiently reduce waveform deterioration for normal data transmission.

[Brief explanation of drawings]

Figure 1 is a block diagram showing a conventional demodulation system using digital signal processing, and Figure 2 shows a system that samples an input signal at a timing unrelated to the timing constraints of the demodulator and sends it to the demodulator. 3 is a block diagram of a demodulation system that receives and demodulates the digital sample sequence of the system of FIG. 2; FIG. 4 is a block diagram showing a low-pass filter, which is one of the components of the present invention; Fig. 5 is a diagram showing the impulse response of the low-pass filter shown in Fig. 4, Fig. 6 is a diagram showing the amplitude frequency characteristics of the low-pass filter shown in Fig. 4, and Fig. 7 is a diagram showing the interpolation of the rectangular output waveform. 8 and 9 are diagrams showing one embodiment of the present invention. In the figures, 10...first low-pass filter, 20...second low-pass filter, 40... third low-pass filter. 50...multiplier, 60...adder.

Claims (1)

[Scope of Claims] (a) A low-pass filter to which a digital sample value series is supplied, comprising a first delay circuit and a first subtracter for obtaining an input-output difference of the first delay circuit; (b) a second delay circuit to which the low-pass filter output is supplied; (c) the low-pass filter output and the low-pass filter; a second subtractor that obtains a difference from the output of the second delay circuit; (d) a multiplier that multiplies the output of the second subtracter by a value between 0 and 1, which is different from the sample time; an interpolation filter comprising at least a multiplier that multiplies a larger value according to , and (e) an adder that adds the output of the multiplier and the output of the low-pass filter to obtain the interpolated value.