CA1085946A - Photovoltaic cell array - Google Patents

Photovoltaic cell array

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Publication number
CA1085946A
CA1085946A CA290,513A CA290513A CA1085946A CA 1085946 A CA1085946 A CA 1085946A CA 290513 A CA290513 A CA 290513A CA 1085946 A CA1085946 A CA 1085946A
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substrate
metal
semiconductor material
percent
weight
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French (fr)
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Lee R. Ullery, Jr.
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Ses Inc
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Ses Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/0328Inorganic materials including, apart from doping materials or other impurities, semiconductor materials provided for in two or more of groups H01L31/0272 - H01L31/032
    • H01L31/0336Inorganic materials including, apart from doping materials or other impurities, semiconductor materials provided for in two or more of groups H01L31/0272 - H01L31/032 in different semiconductor regions, e.g. Cu2X/CdX hetero- junctions, X being an element of Group VI of the Periodic Table
    • H01L31/03365Inorganic materials including, apart from doping materials or other impurities, semiconductor materials provided for in two or more of groups H01L31/0272 - H01L31/032 in different semiconductor regions, e.g. Cu2X/CdX hetero- junctions, X being an element of Group VI of the Periodic Table comprising only Cu2X / CdX heterojunctions, X being an element of Group VI of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0224Electrodes
    • H01L31/022408Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042PV modules or arrays of single PV cells
    • H01L31/0445PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Sustainable Development (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photovoltaic Devices (AREA)

Abstract

PHOTOVOLTAIC CELL ARRAY
Abstract of the Disclosure In a photovoltaic cell which comprises: a substrate, a bottom electrode, a first layer of cadmium sulfide, a second layer of cuprous sulfide forming a barrier junction with said first layer and a top electrode, the improvement wherein said substrate is an insulative ceramic material and the bottom electrode is a conductive ceramic layer fused to said substrate.
Said conductive layer is optionally coated with a metal having a high electrical conductivity.

Description

~085946 Background of the Invention Field of the Invention This invention relates generally to solar cell arrays and a method of making them. More particularly, the invention relates to an integrated array of thin-film, photovoltaic cells connected in series and/or parallel and a method of making it.
The Prior Art Since each commonly known, individual solar cell generates only a small amount of power, usually much less power than is required for most applications, the desired voltage and current is realized by-interconnecting a plurality of solar cells in a series and parallel matrix. This matrix is generally referred to as a solar cell array, and generates electrical energy from solar radiation for a variety of uses.
Solar cell arrays can be made manually by bonding the individual cells to a suitable support in the desired configuration and connecting, e.g.
by soldering, the electrical leads of the individual cells in the necessary manner to give the desired voltage and current. Manual construction of arrays suffers from a number of disadvantages, including cumbersome and , difficult construction methods, expense, faulty connections, and the like.
:1 An integrated array and method of making it is described in ~nited States Patent No. 3,483,038, issued December 9, 1969 to Hui et al. The patented ~ array comprises a substrate of flexible plastic insulating material such as '~ polyimide plastic to which a plurality of serially connected individual cells are integrally united. The individual cells comprise a bottom elec-trode of a three-layered metal film covered by a film of an n-type semi-~.

;
~;, conductor such as cadmium sulfide and a film of p-type semiconductor such as cuprous sulfide to form a barrier layer, and a top electrode of a thin film of metal such as tellurium.
The use of flexible plastic films of the prior art as substrates has certain disadvantages. Many of the plastics are air and water permeable to a certain degree which makes it impossible to completely hermetically seal the final cell array and can result in degradation of the cell components over a period of time as air and water diffuse into the cell. It is fre-quently difficult to bond the metal electrode to the plastic. The plastic substrate is too flexible for many uses and cell manufacturing techniques, so rigidity must be built in by later encapsulation, or the flexible substrate must be supported with a rigid structure. Bonding the plastic film to a rigid structure can produce degradation of the film by mechanical deforming of the film from bonding pressures, or from heat used in thermal bonding or from solvents used in adhesives. Many plastics have absorption peaks in the ~ -infared, resulting in high temperatures in use when these plastics are used in photovoltaic cell construction. Flexing of the substrate over a period of time of use tends to break down the films in the cells, reducing their output and shortening their life. The inherent flexibility of plastic substrate material increases processing complexity, since in order to obtain high resolution of array cells, the plastic film can not be subjected to stresses during the manufacturing process which would cause stretching and buckling.
Use of a plastic substrate limits the temperature to which the cell can be subjected during fabrication. -Abrahamsohn in United States 3,376,163, issued April 2, 1968, illus-trates the use of commercially available conductive glass as a cell substrate.
These are glasses that have a thin layer of conductive tin oxide on the sur-face. These glasses are typically produced by spraying a solution of tin chloride on hot glass, above 800F. See United States 2,648,753, issued August 11, 1953, to Lytle for a description of the process. This process has several disadvantages. Because the tin salt solution is sprayed onto a hot - .. ~ . .
', glass surface, the conductive layer is continuous on the surface of the glass and it is not possible to obtain the complicated grid pattern needed to obtain a parallel or series array of cells on a simple substrate.
Summary of the Invention The integrated array of the present invention comprises a plurality of thin-film photovoltaic cells connected in series and/or parallel and integrally united to a substrate of insulating ceramic. Each of the cells comprises a bottom electrode of conducting ceramic bonded to the substrate, a film of a first semiconductor material of one type conduc-tivity covering the bottom electrode except for a-minor portion which serves as a lead electrically connected with an electrode of an adjacent cell, a film of a second semiconductor material of an opposite type conductivity forming a p-n junction with the first semiconductor material, and a top electrode extending to and connecting with an electrode of an adjacent cell.
One of the electrodes in each end cell in the array serves as a terminal for the array. A thin metallic film can be deposited on the bottom electrode to produce good adhesion and good ohmic contact between the bottom elec-trode and the first semiconductor film.
The insulative ceramic substrate and conductive ceramic electrode provide a number of advantages over the prior art. Good bonds between the substrate and bottom electrode and good adhesion of the cadmium sulfide film to the bottom electrode are obtained. The ceramic substrate provides sufficient rigidity to reduce flexurally induced damage to finished arrays.
Higher temperatures can be used in the manufacture of the arrays. The ceramic substrate and conductive ceramic electrode have excellent vacuum processing characteristics, allowing high temperatures of operation with minimal outgassing. The rigidity of the substrate of this invention allows a high degree of resolution of array cells to be obtained during manufacture.
Good hermetic seals can be obtained to exclude air and water.

~ _ 3 _ -~V8S9~6 Thus, in accordance with one aspect of the invention, there is ~ -provided, in an integrated array of connected, thin film, photovoltaic cells comprising: a substrate of electrically insulative material; a plurality of thin film photovoltaic cells integrally united to a major surface of said substrate in a spaced-apart relationship, each of said cells comprising: an electrically conductive bottom electrode united to said major surface of said substrate; a film of first semiconductor material of one type conductivitycovering and overlapping all but a portion adjacent an edge of said bottom electrode; a film of second semiconductor material of opposite type conductivity and forming a p-n junction with the first semiconductor material and; a top electrode, in contact with said -:;
second semiconductor material and which allows radiant energy to pass into the second semiconductor material, selected ones of said top and bottom electrodes of one cell being connected to selected top and bottom electrodes of adjacent cells to connect said cells in a series or parallel arrangement;
the improvement wherein said substrate comprises an insulative ceramic and said bottom electode comprises an electrically conductive ceramic united to said major surface of said substrate. .

In accordance with another aspect of the invention there is provided, in a method of making an integrated array of connected, thinfilm, -photovoltaic cells comprising: providing a substrate of insulating material; coating a major surface of said substrate with a plurality of electrically conductive bottom electrodes, a separate one of said bottom electrodes being for each of said cells; coating each of said bottom electrodes, except for a portion adjacent an edge thereof, with a film of first semiconductor material of one type conductivity; coating each of said films of one type conductivity with a relatively thin film of second semiconductor material of an opposite type conductivity, and forming a p-n junction therewith; attaching a light transmitting top electrode -on each of said second semiconductor films, and connecting top and bottom electrodes of one cell with selected top and bottom electrodes of adjacent ~ 3~

~ '.

.

cells to provide series or parallel arrangement of the cells; the improvement wherein a paste of electrically conductive ceramic is coated on a substrate of insulating ceramic, and heat treating the coated substrate to dry and remove screening materials from said paste and to bond said electrically conductive ceramic to said substrate.

~b 1~8S946 Brief Description of the Drawings Figure 1 is a plan view of one embodiment of an integrated array with cells in a side by side relationship and connected serially.
Pigure 2 is a cross-sectional view of cell 13 taken along line 22 of Pigure 1 showing the layers of the individual cell.
Description of the Preferred Embodiments Referring to Figures 1 and 2 of the drawings, there is shown an integrated array of a plurality of serially connected, thin-film photovoltaic cells 11, 12 and 13, integrally formed on and united to a substrate 10 of insulating ceramic material. Although the integrated array described and illustrated herein has only three cells for the sake of clarity of explanation, the integrated array may have as many cells as are convenient and practical for any particular application. A row of cells in a side by side configura-tion and connected in series is shown; however, a plurality of rows of cells can be provided wherein some or all of the rows are connected in parallel with each other, as desired, to provide a predetermined power output.
The substrate is an insulative ceramic and is capable of with-standing high temperatures. The ceramic substrate has sufficient rigidity to structurally support a number of individual cells. While glass or other ceramic materials can be used, a particularly suitable substrate is sheet metal coated, preferably on one side, with a thin layer of ceramic. The metal imparts structural strength to an array and can be made sufficiently thin to impart some degree of flexibility i desired. Moreover, the use of metal facilitates overall fabrication of solar collectors, especially where heat exchange means are provided to remove thermal energy. Ceramic coated metal is readily available as it is used within the appliance industry for refrigerators, stoves, and the like and in the construction industry as panels for commercial buildings such as service stations. A suitable material is, for example, "Mirawal," a trademark product of Kaiser Aluminum Company for cold rolled low-carbon steel sheets having a continuous coating of vitreous enamel on at least one side of the sheet. Desirable thickness of the sheet ,' ' ' ' '''., ~:
.

1~)85946 metal ranges from about 0.005 to about 0.030 inches, although thicknesses from about 0.012 to about 0.025 inches are also suitable. The thickness of the ceramic coat should be sufficient to insulate the sheet metal from the bottom electrode and desirably ranges rom about .0015 to about 0.012 inches, although thicknesses from about 0.0025 to about 0.0065 are also suitable.
The ceramic coating should be free from pinholes or other defects which would tend to result in short circuits to the sheet metal.
The individual cells are integrally formed on-and united to the substrate. Any desired design configuration can be used other than that given in Figure 1 for illustrative purposes. Eachicell comprises a number of thin layers which, for the sake of clarity, are shown in an exaggerated manner in the drawing. The construction of a typical cell, e.g. cell 12, will be described in detail.
Substrate 10 comprising mild steel 16 coated with a thin film of insulating vitreous enamel 17 is coated wi*h a thin layer of conductive ceramic material 18. This conductive ceramic layer 18 provides the bottom electrode of the cell assembly and is represented by the area ABCDEF in Figure 1 for cell 11. The conductive ceramic layer is applied as a paste to substrate 10 by suitable means such as silk screening, hand or machine dipping or by spraying through a suitably apertured mask. After application to sub-strate 10, ceramic conductive layer 18 is suitably cured. Such curing process typically involves first drying at temperatures of from about 75C to about 150C for times ranging from about 0.05 to about 1 hour, preferably from about 0.1 to about 1 hour. Higher temperatures will require short drying times and vice-versa. Temperatures outside the above limits are useful but too low a temperature will require long drying time which will be uneconomical, where-as too high a drying temperature can result in poor adherance of and/or voids in the conductive ceramic layer due to rapid evaporation of solvent from the paste. Drying is followed by burn-out in air of organic materials such as organic screening materials such as resins, plasticisers, hardeners, wetting agents, thickeners and the like used in the paste formulations. Burn-out _ ~ _ 1~5946 is typically carried out in air for from about 0.05 to about 1 hour and at temperatures ranging from about 100C to about 500C, preferably from about 150C to about 500C and more preferably from about 250C to about 400C.
After burn-out, the conductive ceramic paste is fired in a neutral atmosphere such as nitrogen, argon, helium, and the like for about 0.05 to about 1 hour at peak temperatures ranging from about 500C to about 1200C, preferably from about 500C to about 1100C, more preferably from about 500C to about 1000C
and yet more preferably from about 500C to about 950C. This firing results in the sintering of the paste into a solid layer, and the adherence of the layer to the ceramic surface 17 of the substrate. Upon sintering the edges of the bottom electrode will be found to be rounded rather than sharp, which facilitates vapor deposition of the cadmium sulfide film 20 over the edges of the bottom electrode to the substrate 10, thus protecting the bottom electrode from deposition of copper during the barriering process. A copper layer would establish electrical contact between the bottom electrode and the barrier lay-er. Also, if sharp corners were present instead of rounded corners, the pos-sibility of thin spots or pin holes in the cadmium sulfide film exists.
Suitable conductive ceramic pastes comprise: from about 30 to about 85 percent by weight and preferably from about 40 to about 75 percent by weight of a metal having a high electrical conductivity, such as, for example, nickel, silver, gold, palladium, platinum and copper with copper being prefer-red; from about 1 to about 40, preferably from about 1 to about 20 percent by weight of a metal oxide capable of forming, upon firing, a metal oxide - silica complex, thus ailowing the conductive metal to wet the complex of the fired paste, copper oxide being preferred and of the copper oxides, cuprous and cup-ric, cuprous oxide being preferred; from about 3 to about 30 percent by weight, preferably from about 3 to about 20 percent by weight of a ground (400 mesh) glass frit (powder), optionally from about 1 to about 20 percent by weight of a fluxing agent such as bismuth trioxide, antimony trioxide, lead oxide and the like, bismuth trioxide being preferred; from about 1 to about 10 percent by weight of a suitable screening agent such as ethyl cellulose, nitro-. . : , . .

cellulose and the like; and from about 1 to about 50, preferably from about 5 to about 45 percent by weight of a suitable solvent such as turpentine, pine oil,naphtha, and the like. The screening agent is typically used in solution with a suitable solvent such as turpentine, pine oil, naptha, and the like.
The concentration of the screening agent in the solvent typically ranges from about 10 to about 50 percent by weight. A paste composition that when dried and fired has been found to produce a copper-containing conductor with good electrical characteristics, excellent soldering and electroplating character-istics and good adhesion to the substrate is as follows: 66% wt. copper powder sieved to 400 mesh (37 microns), (Fernlock D-100, U.S. Bronze, Flemington, N.J.), 9% wt. cuprous oxide, 5% wt. bismuth trioxide, 5% wt. glass frit (Pemco S-2120-P manufactured by SCM Corp. of Baltimore, Maryland), 12%
wt. of MM5 ethyl cellulose based screening vehicle (1.2% ethyl cellulose;
0.6% Poly-Pale resin hardener, Hercules; 0.12% C0-430 non-ionic wetting agent, GAF; 10.08% pine oil) and 3% wt. pine oil (solvent). The fired conductive ceramic layer typically has a thickness ranging from about 0.3 mils to about
2.0 mils, preferably from about 0~7 mils to about 1.2 mils. After sintering of this type of paste, the electrically conductive metal-containing bottom electrode will contain from about 70 to about 85 percent by weight of a metal in the zero valent state, from about 10 to about 20 percent by weight of ceramic and from about 5 to about 10 percent by weight of the metal oxide which is believed to form a complex with said ceramic.
Ceramic pastes having lower metal contents than the above described pastes can also be used. With lo~er metal content, the sintered conductive ceramic layer is advantageously electroplated with a metal having a high electrical conductivity such as, for example, silver, gold, platinum or copper, with copper being the preferred metals. The electrodeposition processes used are those which are well known in the art and are suitably adapted by those skilled in the art to the particular metal being deposited.
Suitable conductive ceramic pastes encompassing the lower metal contents comprise from about 5 to about 40 and preferably from about lO to about 30 ~ 5946 percent by weight of metal having a high electrical conductivity; such as, for example, nickel, silver, gold, palladium, platinum and copper with copper being preferred; from about 15 to about 75, preferably from about 20 to about 40 percent by weight of a metal oxide capable of forming, upon firing, a metal oxide-silica complex, thus allowing the conductive metal to wet the complex of the fired paste, copper oxide being preferred; and of the copper oxides, cuprous and cupric, cuprous being preferred; from about 2 to about 60, preferably from about 3 to about 50 percent by weight of a ground glass frit ( 400 mesh): optionally from about 1 to about 20 percent by weight of a fluxing agent such as bismuth trioxide, antimony trioxide, lead oxide and the like, bismuth trioxide being preferred; from about 0.05 to about 10 percent by weight of a suitable screening agent such as ethyl cellulose, nitro- ;;
cellulose and the like; and from about 1 to about 50, preferably from about 5 to about 45 percent by weight of a suitable solvent such as turpentine, pine oil, naptha, and the like. The screening agent is typically used in solution with a suitable solvent such as turpentine, pine oil, naptha, and the like.
The concentration of the screening agent in the solvent typically ranges from about 2 to about 40 percent by weight. A paste composition that when dried and fired has been found to produce a low metal-containing conductive ceramic film that is readily electroplatable and has good adhesion to the substrate is as follows: 15% wt. copper flake powder with the individual flakes having, on the average, a length of about 5-15 microns and a width of about 1-5 -microns (MD 955 copper Flake-Alcan Metals), 28% wt. cuprous oxide, 12.4% wt.
bismuth trioxide, 12.4% glass frit (S-2120-P Glass, 400 mesh (37 microns) PEMC0), 28.2% MM22 ethylcellulose based screening vehicle (2.82% ethyl cellulose; 1.41% Poly-Pale resin hardener, Hercules; 0.28% C0-430 non-ionic wetting agent, GAF; 23.69% pine oil), 4% wt. pine oil. After sintering of this type of paste, the electrically conductive, metal-containing bottom electrode will contain from about 15 to about 70 percent by weight of a metal in the zero valent state, from about 5 to about 50 percent by weight of ceramic and from about 5 to about 60 percent by weight of the metal oxide.

-''', ' , -:" 1085946 In general, the conductive ceramic paste will comprise from about 5 to about 85 percent by weight and preferably from about 10 to about 75 per-cent by weight of the metal having a high electrical conductivity, such as, for example, nickel, silver, gold, palladium, platinum and copper with copper being preferred; from about 1 to about 75, preferably from about 1 to about 60 percent by weight of a metal oxide capable of forming, upon firing, a metal oxide - silica complex, thus allowing the conductive metal to wet the complex of the fired paste, copper oxide being preferred, and of the copper oxides, cuprous and cupric, cuprous oxide being preferred; from about 2 to about 60, preferably from about 3 to about 50 percent by weight of a ground glass frit (400 mesh); optionally from about 1 to about 20 percent by weight of a fluxing agent such as bismuth trioxide, antimony trioxide, lead oxide and the like, bismuth trioxide being preferred; from about 0.05 to about 10 percent by weight of a suitable screening agent such as ethyl cellulose, nitrocellulose and the like; and from about 1 to about 50, preferably nitrocellulose and the like;
and from about 1 to about 50, preferably from about 5 to about 45 percent by weight of a suitable solvent such as turpentine, pine oil, naphtha, and the like. The screening agent is typically used in solution with a suitable sol-vent such as turpentine, pine oil, naph*ha, and the like. The concentration of the screening agent in the solvent typically ranges from:about 2 to about 40 percent by weight. After sintering, the electrically conductive, metal-containing bottom electrode will contain from about 15 to about 85 percent by weight of zero valent metal, from about 5 to about 50 percent by weight of ceramic and from about 5 to about 60 percent by weight of the metal oxide which.is believed to form a complex with said ceramic.
Other methods of producing metal-containing conductive ceramic films are known in the art and are considered within the scope of this invention.
~hen the conductive metal in the conductive ceramic layer is a metal of the type which would form a rectifying barrier with.cadmium sulfide or would 30 oxidize on the surface to form a poor ohmic contact with cadmium sulfide, then it is desirable to coat the conductive ceramic with a transition layer 19 of metal or metal alloy which does not have the above drawbacks. Copper, for example, would form a barrier with cadmium sulfide. Aluminum would oxidize and the layer of exposed aluminum oxide would be an insulator and would give a high resistance contact with cadmium sulfide. Suitable metals for the metal transition layer include gold, silver, platinum, cadmium, zinc and alloys thereof. Zinc is preferred. More than one layer of metal may be deposited on the conductive ceramic substrate.
The metal transition layer is applied to the conductive ceramic layer in any suitable manner. For example,-it may be applied by vapor deposi-tion through a suitably apertured mask, by electrodeposition from a solution of salts of the metal, or by contact with a molten bath of metal. These pro-cesses are well known in the art and will be suitably adapted by one skilled in the art to the particular metal being deposited. The metal transition layer will be applied in an amount, for example, ranging from about .0001 to about 0.01 gm/sq cm. preferably from about 0.001 to about 0.002 gm/sq cm, with zinc being a preferred metal.
The bottom electrode of the cell comprises either the conductive ceramic layer, or the conductîve ceramic layer covered with a metal transition layer when used. Upon this bottom electrode a semiconductor material of n-type conductivity such as cadmium sulfide film 20 is deposited. This can be done in a known manner, such as through a suitably apertured mask from the vapor state, in an amount of between about 0.05 gm/sq cm and about 0.005 gm/sq cm. The cadmium sulfide film 20 covers and completely overlaps all but a small portion of the bottom electrode, this area being represented by ADEF shown in Figure l for cell 11. The uncovered portion is represented by the area ABCD
and can be used subsequently either for electrical connecting means to an adjacent cell, such as the top electrode of an adjacent cell to make a series connection therewith as shown in Figure 1, or for a negative output terminal such as 14. It is important that the cadmium sulfide film 20 in each of the cells 11-13, for example, overlaps the periphery-of the bottom electrode 19, such as, the edges AF, DE, and F~ thereof, and ex*ends to the surface of substrate 10 because the subsequent overlapping films and the top electrode in each cell must not contact the bottom electrode layers 19 or 18 thereof.
As discussed before, the use of a sintered ceramic bottom electrode facilitates this covering, since the sintering process produces rounded and filleted edge surfaces which are easily covered by cadmium during the vapor deposition pro-cess.
After deposition of the cadmium-sulfide, a strip of insulating material 24, such as silicon dioxide or cured epoxy resin is deposited along the edge AD of the cadmium sulfide layer 20 as well as upon most of the sub-strate area extending beyond edge AD. The purpose of the insulating film is to prevent the cuprous sulfide film 21 from coming in contact with the bottom electrode 19 which would short out the p-n junction between the cadmium sulfide and cuprous sulfide layers. This insulating layer 24 also allows the top electrode from one cell to be connected to the exposed part of the bottom electrode of an adjacent cell-without shorting to its own bottom electrode.
The surface of the cadmium sulfide film 20 may be etched with hydro-chloric acid for about 4-5 seconds, if desired, before the cuprous sulfide films are formed thereon, as described in Tanos, United States 3,480,473. The cuprous sulfide film 21 is formed in a suitable fashion such as, for example, deposition from the vapor state through a suitably-apertured mask, over the cadmium sulfide film 20, or by contacting the cadmium sulfide film 20 with an aqueous solution of a cuprous salt as, for example, a cuprous chloride or bromide solution, as described in Keramidas, United States 3,374,108. The cuprous sulfide film 21 will have a thickness between about lOOOA and about lO,OOOA.
A top electrode is fixed to each cell. The top electrode can suit-ably be any material of high electrical conductivity. It must allow, or be shaped to allow, light to reach the cuprous sulfide layer. Such electrodes are known in the art. Preferably, and as shown ln Figure 1, the top electrode comprises a plurality of electrode strips 22 which terminate in tab 23 at one end, AU, and in a bar at end FE. The electrode strîps are placed in electri-cal contact with the cuprous sulfide film 21 while tab 23 extends over in-sulating strip 24 to electrically contact a portion, BCJI, of bottom electrode 15 of an adjacent cell to electrically connect the two cells in series. As shown, the top electrode for cell 12 connects with the bottom electrode of cell 11, and the bottom electrode of cell 11, and the bottom electrode of cell 12 is connected to the top electrode of cell l3. For end cell 11, the top elec-trode tab will be the positive terminal 15 for the array.
The top electrode may be provided in any known manner, such as by deposition through a suitably apertured mask from the vapor state over the cuprous sulfide film 21. Alternatively, the top electrode may be vapor deposit-ed on a flexible insulating film such as Mylar, Aclar, or TFE and then the film 25 pressed onto the cell with top electrode strips 22 in contact with cuprous sulfide film 21 and held in place with light transmissive epoxy cement 26. The top electrode can also be a grid, or mesh, of fine metal wire which is attached to the cuprous sulfide film, The top electrode may be any suitable electrical conductor having a high electrical conductivity, which forms a good ohmic contact with cuprous sulfide film 21, and which will not form a p-n barrier junction with the cuprous sulfide film. Suitable electrical conductors ~ -are, for example, metals such as gold, platinum and silver.
The finished cell assembly is typically heat treated, e.g., at 200C
for 10 minutes and sealed with a pro*ective light transmitting coating, a film or plate 27 of a material such as glass or the like. The film should be impervious to oxygen and water vapor which would degrade the cell.
In operation, the cells, 11, 12, and 13 convert light into electrical energy when they are exposed to light. In each cell, light energy passes ` through the area not covered by top electrode strips 22 to the cuprous sulfide film 21 where it is at least partially absorbed thereby producing a voltage :- .

between the bottom electrode and the top electrode. Since this voltage for a photovoltaic, cadmium sulfide cell is typically about 0.4-0.5 volts, the cells 11-13 are connected in series to provide a desired voltage. The current capacities at the desired voltage may be increased by connecting a plurality of the serially connected rows of cells in parallel.
In generic terms the invention provides an integrated array of con-nected, thinfilm photovoltaic cells comprising:
a substrate of electrically insulating ceramic material;
a plurality of said cells integrally united to a major surface of said substrate in a spaced-apart relationship, each of said cells comprising:
an electrically conduc*ive, metal-containing, ceramic bottom elec-trode coated on said substrate and bonded thereto by fusing or sintering;
a film of first semiconductor material of one type conductivity covering and overlapping all but a portion adjacent an edge of said bottom electrode;
a film of second semiconductor material of an opposite~type conduc-tivity on said first film of semiconductor material and forming a p-n junction therewi~h; and, a top electrode, capabl-e of transmitting radiant energy, in contact with said second semiconductor material;
said top electrode of one cell being connected to selected top and bottom electrode of an adjacent cell to provide electrically series or parallel arrangement of the cells.
This invention further provides a method of making an integrated array of connected, thin-film photovoltaic cells comprising:
providing a substrate of insulating ceramic;
providing on a major surface of said substrate a plurality of elec-trically conductive, ceramic bottom electrodes, a separate one of said bottom electrodes being for each of said cells, by coating the substrate with a paste of conducting ceramic, and heat treating to dry and bond the conductive ceramic to the substrate;

10~5946 coating each of said bottom electrodes, except for a portion ad- .
jacent an edge thereof, with a film of first semiconductor material of one type conductivity;
coating each of said films of one type conductivity with a relative-ly thin film of second semiconductor material of an opposite type conductivity, and forming a p-n junction therewith;
attaching a top electrode on each of said second films, selected ones of said top and bottom electrodes of one cell extending to, and making connection with, selected top and bottom electrodes of adjacent cells to connect the cells in series or in parallel arrangement.

,~

, ; . :

Claims (21)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. In an integrated array of connected, thin film, photovoltaic cells comprising:
a substrate of electrically insulative material;
a plurality of thin film photovoltaic cells integrally united to a major surface of said substrate in a spaced-apart relationship, each of said cells comprising:
an electrically conductive bottom electrode united to said major surface of said substrate;
a film of first semiconductor material of one type conductivity covering and overlapping all but a portion adjacent an edge of said bottom electrode;
a film of second semiconductor material of opposite type conductivity and forming a p-n junction with the first semiconductor material and;
a top electrode, in contact with said second semiconductor material and which allows radiant energy to pass into the second semiconductor material, selected ones of said top and bottom electrodes of one cell being connected to selected top and bottom electrodes of adjacent cells to connect said cells in a series or parallel arrangement; the improvement wherein said substrate com-prises an insulative ceramic and said bottom electrode comprises an electrical-ly conductive ceramic united to said major surface of said substrate.
2. The integrated array of claim 1 wherein said substrate comprises sheet metal coated at least on one side with a thin layer of insulating ceramic.
3. The integrated array of claim 1 wherein the bottom electrode com-prises from about 15 to about 85 percent by weight of a metal, from about 5 to about 50 percent by weight of ceramic material and from about 5 to about 60 percent by weight of a metal oxide.
4. The integrated array of claim 3 wherein the bottom electrode com-prises from about 70 to about 85 percent by weight of the metal, from about 10 to about 20 percent by weight of the ceramic material and from about 5 to about 10 percent by weight of the metal oxide.
5. The integrated array of claim 3 wherein the bottom electrode com-prises from about 15 to about 70 percent by weight of the metal.
6. The integrated array of claim 3, wherein said conductive ceramic is coated with at least one metal layer, one of which makes an ohmic contact with the first semiconductor material.
7. The integrated array of claim 6, wherein said bottom electrode com-prises copper and cuprous oxide, said metal coating is zinc, said first semiconductor material is cadmium sulfide and said second semiconductor material is cuprous sulfide.
8. The integrated array of claim 7, wherein the substrate comprises sheet metal coated on at least one side with a thin layer of insulating ceramic.
9. The integrated array of claim 5, wherein said bottom electrode com-prises copper and cuprous oxide, having deposited thereon a layer of copper and having further deposited thereon a layer of zinc, said first semiconductor material is cadmium sulfide and said second semiconductor material is cuprous sulfide.
10. The integrated-array of claim 9, wherein the substrate comprises sheet metal coated on at least one side with a thin layer of insulating ceramic.
11. In a method of making an integrated array of connected, thinfilm, photovoltaic cells comprising:
providing a substrate of insulating material;
coating a major surface of said substrate with a plurality of elec-trically conductive bottom electrodes, a separate one of said bottom electrodes being for each of said cells;
coating each of said bottom electrodes, except for a portion ad-jacent an edge thereof, with a film of first semiconductor material of one type conductivity;
coating each of said films of one type conductivity w?th a relative-ly thin film of second semiconductor material of an opposite type conductivity, and forming a p-n junction therewith;
attaching a light transmitting top electrode on each of said second semiconductor films, and connecting top and bottom electrodes of one cell with selected top and bottom electrodes of adjacent cells to provide series or parallel arrangement of the cells; the improvement wherein a paste of elec-trically conductive ceramic is coated on a substrate of insulating ceramic, and heat treating the coated substrate to dry and remove screening materials from said paste and to bond said electrically conductive ceramic to said substrate.
12. The method of claim 11, wherein said substrate comprises sheet metal coating at least on one side with a thin layer of ceramic and said elec-trically conductive ceramic paste comprises from-about 5 to about 85 percent by weight of finely divided metal particles, from about 1 to about 75 percent by weight of a metal oxide, from about 2 to about 60 percent by weight of a glass frit compatible with and capable of bonding with said substrate, and the remainder being a liquid carrying vehicle.
13. The method of claim 12, wherein said paste comprises from about 30 to about 85 percent by weight of the finely divided metal particles, from about 1 to about 40 percent by weight of the metal oxide and from about 3 to about 30 percent by weight of the glass frit.
14. The method of claim 12, wherein said paste comprises from about 5 to about 40 percent by weight of the metal particles.
15. The method of claim 12, wherein the conducting ceramic is coated with at least one metal layer, one of which provides ohmic contact with the first semiconductor material, prior to coating the first semiconductor metal film.
16. The method of claim 15, wherein said metal particles are copper, said metal oxide comprises cuprous oxide, said metal coating is zinc, said first semiconductor material is cadmium sulfide, and said second semiconductor material is cuprous sulfide.
17. The method of claim 12, wherein said paste is dried at a temperature of from about 75°C to about 150°C for about 0.05 to about 1 hour, heated at from about 100°C to about 500°C in air to burn out organic material, and fired at from about 500°C to about 1100° for from about 0.05 to about 1 hour in an inert atmosphere to fuse the conductive ceramic to the insulating ceramic substrate.
18. The method of claim 12, wherein the paste comprises a fluxing agent of from about 1 to about 20 percent by weight of a second metal oxide.
19. The method of claim 14, wherein the conductive ceramic is coated with at least one metal layer, one of which provides ohmic contact with the first semiconductor material, prior to coating the first semiconductor material.
20. The method of claim 19 wherein said metal particles are copper, said metal oxide comprises cuprous oxide, said metal coating is a layer of copper and a layer of zinc with the zinc in ohmic contact with the first semiconduc-tor material, said first semiconductor material is cadmium sulfide, and said second semiconductor material is cuprous sulfide.
21. The method of claim 20, wherein said paste is dried at a temperature of from about 75°C to about 150°C for about 0.05 to about 1 hour, heated at from about 100°C to about 500°C in air to burn out organic material, and fired at from about 500°C to about 1100°C for from about 0.05 to about 1 hour in an inert atmosphere to fuse the conductive ceramic to the insulating ceramic substrate.
CA290,513A 1976-12-06 1977-11-09 Photovoltaic cell array Expired CA1085946A (en)

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US74784976A 1976-12-06 1976-12-06
US747,849 1976-12-06
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US05/827,927 US4127424A (en) 1976-12-06 1977-08-26 Photovoltaic cell array

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JPS5821827B2 (en) * 1979-02-09 1983-05-04 三洋電機株式会社 photovoltaic device
GB2117971A (en) * 1982-04-05 1983-10-19 Hitachi Ltd Amorphous silicon photovoltaic device
JPH0530369Y2 (en) * 1984-10-09 1993-08-03
JPS62211060A (en) * 1986-03-12 1987-09-17 オリンパス光学工業株式会社 High frequency treatment tool
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US2820841A (en) * 1956-05-10 1958-01-21 Clevite Corp Photovoltaic cells and methods of fabricating same
FR1315539A (en) * 1961-03-14 1963-01-18 Western Electric Co Set of solar cells for artificial satellites
US3833425A (en) * 1972-02-23 1974-09-03 Us Navy Solar cell array
AU7005674A (en) * 1974-03-01 1975-12-18 Univ Delaware Photovoltaic cell

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IT1091265B (en) 1985-07-06
IN148687B (en) 1981-05-09
GB1559247A (en) 1980-01-16
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DE2751393A1 (en) 1978-06-08
MX144753A (en) 1981-11-19
FR2373165A1 (en) 1978-06-30
JPS5370781A (en) 1978-06-23
ES464679A1 (en) 1978-09-01
NL7712838A (en) 1978-06-08
FR2373165B1 (en) 1981-03-20
IL53276A (en) 1980-06-30
BR7707957A (en) 1978-09-05

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