CA1079986A

CA1079986A - Digital alarm and subsidiary time electronic timepiece

Info

Publication number: CA1079986A
Application number: CA263,939A
Authority: CA
Inventors: Takuro Fukuichi
Original assignee: Seiko Instruments Inc
Current assignee: Seiko Instruments Inc
Priority date: 1975-10-24
Filing date: 1976-10-22
Publication date: 1980-06-24
Also published as: FR2329005A1; GB1551857A; JPS5251974A; CH620089GA3; DE2647635A1; CH620089B; IT1073765B; HK49382A; BR7607064A

Abstract

ABSTRACT OF THE DISCLOSURE
An electronic timpiece which has a main time keeping circuit, an alarm, a counter for providing an alarm time set function, and a subsidiary time function for providing a display of time different from the main time for which the timepiece is set. The counter can be actuated between an up-count and a down-count mode, the alarm time setting being introduced into the counter when in its up-count mode, and providing the alarm operating function when the counter is set to its down-count mode. The counter provides the subsidiary time information by being held in its up-count mode and being driven from the main time keeping circuit, with which connection is broken when subsidiary time is being set into the counter. A display selectively gives main time or a reading of counter count,and therefore displays main time,alarm set time,or subsidiary time.

Description

1~i7~986 This invention relates to a digital alarm electronic timepiece includ-ing an up/down counter, which functions as an up counter in the timer setting condition and as a down counter after the timer has been set.
It is known to include counters in timers in digital alarm timepieces, however, conventlonally these have been only down counters, which have been very difficult for the operator to set as the sequence of the time being set steps backwards.
The present disclosure overcomes this problem, and also provides a mechanism for displaying both main time of the timepiece and a subsidiary time, such as may be required when the wearer of the piece travels to differ-ent time zones from that for which the main time setting applies, without the need to reset the main time. The counter for the alarm and for the subsidiary time are the same.
A specific embodiment of the invention will now be described having reference to the accompanying dra~ings in which:
~ Figure 1 shows a basic circuit block diagram of a timepiece.
P~ In Figure l,seconds pulses generated by an oscillator divider ~; circuit 1 are applied to a seconds counter 2. The output of the seconds ' counter 2 is connected to the input terminal of a minutes counter 3, and the , 20 output of the minutes counter 3 is applied to an hours counter 4. The count-ers 2, 3 and 4 thus form a main time display counter.
A signal from selecting switch 8 which may select either a subsidiary ' time function or an alarm function is connected to one input terminal of a s NOR-circuit 17,and one input terminal of an AND-circuit 26 respectively, via an inverter 15. The signal from selecting switch 8 is also directly connected to one input terminal of a NOR-circuit 16. The output terminal 9a of an alarm setting circuit 9 which carries a signal at "1" level during the alarm setting operation is connected to the other input of NOR-circuit 16. The output terminal 10a of a subsidiary time setting circuit 10 which carries a ' 30 signal at "1" level during the amending operation is connected to the other input of NOR-circuit 17.

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The output of NOR 16 is connected to one input of an AND-clrcuit 20, and the output of NOR 17 is connected to one input of an AND-circult 21. The 1 Hz seconds signal obtained from the oscillator divider 1 is connected to ~ the other inputs of AND-circuits 20 and 21. The outputs of AND 20 and 21 ;~ are respectively connected to the inputs of an OR-circuit 22, and the output of OR 22 is connected to the input of an alarm/subsidiary time seconds counter 5 (hereafter also called A/S seconds counter). The output signal of ~' the A/S seconds counter 5 (divided from the seconds pulses to 1/60 Hz) is applied to the alarm/subsidiary time minutes counter 6 (hereafter also called A/S minutes counter)~ and the output of the A/S minutes counter 6 at 1/3600 Hz is applied to the alarm/subsidiary time hours counter 7 (hereafter also called A/S hours counter). The A/S counters 5, 6 and 7 form a reversible up/down counter.
An OR-circuit 24 receives respectively the output of selecting switch 8,and output 9a of alarm setting circuit 9. OR-circuit 24 is connected to the counters 5, 6 and 7. When a signal at level "1" is output from circuit 24, the counters 5, 6 and 7 operate as an up counter. However, when output from OR-circuit 24 is at "O" level the counters 5, 6 and 7 function to count down.
The output terminal 9b of the alarm setting circuit 9(which develops the , . necessary counter setting signal during alarm set) is connected to one input of an AND-circuit 18. Output terminal 9a (which develops a "1" during alarm set) is connected to the other input of AND-circuit 18. The output of AND-circuit 18 is in turn connected to one input of an OR-circuit 23. Terminal lOb of the subsidiary time setting circuit 10 (which develops the necessary counter setting signal during subsidiary time set) is connected to one input of an AND circuit 19; output lOa (which develops a "1" during subsidiary time :~, 3~

- 2 set) ls connected to the other lnput o[ AND-circuit 19. The output of AND-circuit 19 ls ~n turn connected to the other input of OR-circuit 23. The output of OR-circuit 23 is connected to the settin8 lnput terminals of A/S
counters 5, 6 and 7.
Main time counters 2, 3 and 4 are connected to one set of input terminals of a display selecting circuit 12, whereas the A/S counters 5, 6 and 7 are connected to the other set of input terminals of the circuit 12.
This circuit 12 selects one or other of its sets of inputs and applies them to the decoder/driver 13 in accordance with a signal from main time/subsidiary time or alarm display selecting switch 11. The decoder/driver 13 applies the ~ appropriate output to the display device 14, so that the chosen one of the ¦ main time or subsidiary time or alarm setting is shown as a numeral display.
. The outputs of A/S counters 5, 6 and 7 are also applied respectively to the three inputs of a NOR-circuit 25, the output of which is fed to one , input terminal of an AND-circuit 26. The other input of AND-circuit 26 receives the output of inverter 15. The output of AND-circuit 26 is connected to the input terminal of the alarm driver 27, which is connected to the alarm device 28.
, In alarm operation, when the display selecting switch 11 is switched f 20 to the alarm/subsidiary time display position, the display selecting circuit 12 applies only the output of the A/S counters 5, 6 and 7 to the decoder/driver 13, so that the content of the A/S counters 5, 6 and 7 is shown on the display , 14. Further when the switch 8 is set to alarm function (the "O" signal level) the output of NOR-circuit 16 connected to switch 8 becomes "1", provided the other input of NOR-circuit 16 is "O", that is during no alarm setting condi-tion. AND-circuit 20 thus receives a "1" input. The other input of the AND-circuit 20 receives the 1 Hz signal from oscillator divider 1 and the 1 Hz ~,- signal is thus applied to the A/S seconds counter 5 via the OR-circuit 22.
,,- In this case, since output 9a is at "O" both inputs of OR-circuit 24 are "O", and A/S counters 5, 6 and 7 thus operate as a down counter, whereby , the contents of said counters are stepped down in accordance with the 1 Hz ,.
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seconds signal applied through OR-circuit 22. When the content6 of all of the A/S counters 5, 6 and 7 become "O", NOR-circuit 25 generates the signal "1". At this time, both inputs of AND-circult 26 and "1~' 00 that the alar~
driver 27 is brought to ON-condition, the alarm device 28 operates.
On the other hand, the output of inverter 15 is "1" so that the output of said NOR-circuit 17 is "0", and AND-circuit 21 is blocked and has "0" output.
When the alarm time is being set, that is when circuit 9 is operated, a "1" is generated at output terminal 9a. The output of NOR-circuit 16 becomes "0", and AND-circuit 20 gives a "0" output. Since AND-circuit 21 also has "0" output, no output is generated from OR-circuit 22 so that continuous "0" is applied to the A/S seconds counter 5. The "1~' signal at terminal 9a instantaneously provides a "1" signal at the output of OR 24, so that counters 5, 6 and 7 are changed from the down to the up counting mode.
Thus, the alarm time can be set as desired by stepping the timer in the up-count mode in accordance with the appropriate signal developed at terminal 9b.
When the alarm time has been set, the ouptut terminal 9a returns to "0", the output of OR-circuit 24 becomes "0" and A/S counters 5, 6 and 7 are returned to the down-count mode. NOR-circuit 16 generates the signal "1"
when the signal on terminal 9a becomes "0" (select switch 8 also is in the "alarm" condition), and thus the AND-circuit 20 passes the 1 Hz signal to the input of A/S seconds counter through the OR-circuit 22. As a result, count down occurs from the set alarm time. When all of the A/S counters 5, 6 and 7 become "O", the alarm is operated.
Reference will now be made to operation in the subsidiary time function.
When the selecting switch 8 is placed in the subsidiary time setting, it produces a "1" output. The output of NOR-circuit 16 becomes "0", and AND-circuit 20 provides a steady "0" output. The output of NOR-circuit 17, however, is "1" (since the output of inverter 15 is "0") when the subsidiary time is not being set (that is when the output terminal 10a is "0"). Hence, 1~7998~i AND-circuit 21 glves a 1 ~Iz output to OR 22, and hence to seconds counter 5.
One input terminal o f OR circuit 24 is "1" and thus counters 5, 6 and 7 operate in the up-count mode in accordance with the 1 Hz slgnal.
When it is desired to set the subsidiary time display select 11 is set to alarm/subsidiary time position,and switch ~ is placed in the subsidiary time position and setting circuit 10 is actuated to change the output 10a from "O" to "1". The output of NOR-circuit 17 becomes "O", and AND-circuit 21 is blocked. AND-circuit 20 is also blocked by the "0" output from OR 16, so that OR 22 has "0" output. Thus, the 1 Hz signal from circuit 1 is not applied to the A/S seconds counter 5.
Suppose it were necessary to set Eastern Standard Time as the subsid-iary, and suppose Japanese time was already set as the main time, it would then be necessary to set the subsidiary time 14 hours delayed against the , .
main time. The subsidiary time setting signal is generated from the output terminal lOb of the circuit 10 when the circuit 10 is operated, and is applied to the setting input terminals of said A/S counters 5, 6 and 7 via the AND-circuit 19 and the OR-circuit 23, whereby one numeral is sequentially s advanced by each respective pulse of said setting signal.
s When the numeral display selecting switch 11 is put into the subsidiary time, alarm display position, the contents of the A/S counters 5, 6 and 7 are displayed on display device 14. It is thus possible to set the subsidiary time by watching the display.
When setting the subsidiary time is completed the output terminals , 10a and 10b of circuit 10 return to "0", the output of NOR-circuit 17 becomes "1" and again AND-circuit 21 is unblocked. The lHz signal is then, once more, applied to the A/S seconds counter 5 via AND-circuit 21 and OR-circuit 22, the content of the counter is advanced one unit for every pulse. The output of OR-circuit 24 is maintained at "1", and A/S counter thus operates as an ~ up counter.
'? 30 Accordingly, it is possible to read the main time by putting the s selecting switch 11 to th= twin tite display position, and it is possible to , 5 ,~

1~799~16 read the subsidiary time by putting the switch 11 in the subsldiary time/
alarm display position.
When the contents of the A/S counters 5, 6 and 7 are "O~', that is 0 hours OO minutes OO seconds, NOR-circuit 25 will generate a "1" signal.
However, AND 26 will not produce an output to actuate alarm 28, because a "O" signal appears on the other input terminal of AND 26 from the inverter 15, whose input is "1".

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Claims

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY OR
PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. An electronic timepiece comprising, a main time keeping circuit, alarm means, a counter connectible to the main time keeping circuit and with said alarm means for operating said alarm means when said counter is at zero count, means for alternatively actuating said counter into an up-count mode and into a down-count mode, and means for setting said counter to a chosen alarm setting when said counter is actuated to said up-count mode, and means for connecting said counter to said main time keeping circuit when said counter is actuated to said down-count mode.

2. An electronic timepiece as defined in claim 1 further comprising, means for holding said counter in said up-count mode, means for setting said counter to a chosen subsidiary time setting, and means for driving said counter from the main time keeping circuit, said subsidiary time setting means being operative to inhibit said means for driving when said subsidiary time setting means is operated.

3. An electronic timepiece as defined in claim 1 or 2 further comprising, display means, and selective means connecting said display means to said main time keeping circuit and to said counter.