CA1076708A - Circuit de decalage bidirectionnel et parallele - Google Patents

Circuit de decalage bidirectionnel et parallele

Info

Publication number
CA1076708A
CA1076708A CA280,669A CA280669A CA1076708A CA 1076708 A CA1076708 A CA 1076708A CA 280669 A CA280669 A CA 280669A CA 1076708 A CA1076708 A CA 1076708A
Authority
CA
Canada
Prior art keywords
word
shifting
input
network
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA280,669A
Other languages
English (en)
Inventor
Caesar Cesaratto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nortel Networks Ltd
Original Assignee
Northern Telecom Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northern Telecom Ltd filed Critical Northern Telecom Ltd
Priority to CA280,669A priority Critical patent/CA1076708A/fr
Priority to GB15005/78A priority patent/GB1575158A/en
Priority to JP53065886A priority patent/JPS6036612B2/ja
Priority to SE7806741A priority patent/SE438044B/sv
Priority to FR7817997A priority patent/FR2394869A1/fr
Application granted granted Critical
Publication of CA1076708A publication Critical patent/CA1076708A/fr
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/015Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Shift Register Type Memory (AREA)
  • Executing Machine-Instructions (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
CA280,669A 1977-06-16 1977-06-16 Circuit de decalage bidirectionnel et parallele Expired CA1076708A (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CA280,669A CA1076708A (fr) 1977-06-16 1977-06-16 Circuit de decalage bidirectionnel et parallele
GB15005/78A GB1575158A (en) 1977-06-16 1978-04-17 Parallel bidirectional shifter
JP53065886A JPS6036612B2 (ja) 1977-06-16 1978-06-02 並列双方向シフタ
SE7806741A SE438044B (sv) 1977-06-16 1978-06-09 Sett for skiftning av ett inkommande binert dataord och en parallell dubbelriktad skiftkrets for genomforande av settet
FR7817997A FR2394869A1 (fr) 1977-06-16 1978-06-15 Procede et circuit de decalage bidirectionnel parallele

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA280,669A CA1076708A (fr) 1977-06-16 1977-06-16 Circuit de decalage bidirectionnel et parallele

Publications (1)

Publication Number Publication Date
CA1076708A true CA1076708A (fr) 1980-04-29

Family

ID=4108895

Family Applications (1)

Application Number Title Priority Date Filing Date
CA280,669A Expired CA1076708A (fr) 1977-06-16 1977-06-16 Circuit de decalage bidirectionnel et parallele

Country Status (5)

Country Link
JP (1) JPS6036612B2 (fr)
CA (1) CA1076708A (fr)
FR (1) FR2394869A1 (fr)
GB (1) GB1575158A (fr)
SE (1) SE438044B (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56109156U (fr) * 1980-01-18 1981-08-24
JPS58144947A (ja) * 1982-02-23 1983-08-29 Toshiba Corp デ−タシフト方式
JPS59161731A (ja) * 1983-03-07 1984-09-12 Hitachi Ltd バレルシフタ
JPS60179839A (ja) * 1984-02-28 1985-09-13 Fujitsu Ltd ディジタル信号処理用デ−タシフト回路
JPH02145364A (ja) * 1988-11-28 1990-06-04 Olympus Optical Co Ltd 記録ヘッド
US5988974A (en) * 1997-03-21 1999-11-23 Zackovich; Stanley E. Vehicle lifting and towing apparatus

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3781819A (en) * 1971-10-08 1973-12-25 Ibm Shift unit for variable data widths
US3768077A (en) * 1972-04-24 1973-10-23 Ibm Data processor with reflect capability for shift operations

Also Published As

Publication number Publication date
JPS546740A (en) 1979-01-19
FR2394869B1 (fr) 1984-10-26
SE438044B (sv) 1985-03-25
SE7806741L (sv) 1978-12-17
GB1575158A (en) 1980-09-17
JPS6036612B2 (ja) 1985-08-21
FR2394869A1 (fr) 1979-01-12

Similar Documents

Publication Publication Date Title
US4122534A (en) Parallel bidirectional shifter
EP0100511B1 (fr) Processeur de multiplication rapide
US3702988A (en) Digital processor
US4591981A (en) Multimicroprocessor system
US3924144A (en) Method for testing logic chips and logic chips adapted therefor
CA1325281C (fr) Processeur de donnees a fonctions multiples
US4621318A (en) Multiprocessor system having mutual exclusion control function
US4674032A (en) High-performance pipelined stack with over-write protection
US4733346A (en) Data processor with multiple register blocks
US3296426A (en) Computing device
EP0045634B1 (fr) Appareil de traitement de données digitales arrangé pour l'exécution d'instructions simultanées
US4383304A (en) Programmable bit shift circuit
US4835672A (en) Access lock apparatus for use with a high performance storage unit of a digital data processing system
NL8900608A (nl) Programmeerbare verwerkingsinrichting voor integratie op grote schaal.
WO1996032724A1 (fr) Procede a rendement eleve permettant de selectionner une microplaquette parmi plusieurs mais n'exigeant qu'un nombre minimal de lignes de selection et systeme correspondant
US4149263A (en) Programmable multi-bit shifter
EP0128194A1 (fr) Reseau logique programme.
US5125011A (en) Apparatus for masking data bits
CA1076708A (fr) Circuit de decalage bidirectionnel et parallele
DE3687085T2 (de) Mit hoher geschwindigkeit arbeitende kellerschaltung fuer ein datenregister in einem mikrorechner.
GB1567536A (en) Data processors
US3624611A (en) Stored-logic real time monitoring and control system
US4387294A (en) Shift register-latch circuit driven by clocks with half cycle phase deviation and usable with a serial alu
US4641278A (en) Memory device with a register interchange function
US4009468A (en) Logic network for programmable data concentrator

Legal Events

Date Code Title Description
MKEX Expiry